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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-05 20:46:50 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-06 02:18:08 +0200 |
| commit | e951db00727e858fc11a78af7e33de12567575df (patch) | |
| tree | a5a96f63a3130fe1f6d28bbd9c2532c079caa728 /src/simul | |
| parent | a060bbe2f05b222b977989c2baa04faa72c5d4fd (diff) | |
| download | ghdl-e951db00727e858fc11a78af7e33de12567575df.tar.gz ghdl-e951db00727e858fc11a78af7e33de12567575df.tar.bz2 ghdl-e951db00727e858fc11a78af7e33de12567575df.zip | |
synth-vhdl_eval: handle std_logic_signed and std_logic_unsigned
Diffstat (limited to 'src/simul')
0 files changed, 0 insertions, 0 deletions