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| author | Tristan Gingold <tgingold@free.fr> | 2022-09-06 20:43:13 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2022-09-06 20:43:13 +0200 |
| commit | d23ad4452b1b8728fe546f25f97fe9a8bdcaf288 (patch) | |
| tree | 06a5fc5ab793c3f2ca54b9e180cc28cd0413d51b /src/simul | |
| parent | 5954723f26a0600e2f3f69de482c30e585e75ba2 (diff) | |
| download | ghdl-d23ad4452b1b8728fe546f25f97fe9a8bdcaf288.tar.gz ghdl-d23ad4452b1b8728fe546f25f97fe9a8bdcaf288.tar.bz2 ghdl-d23ad4452b1b8728fe546f25f97fe9a8bdcaf288.zip | |
simul: fix computation for number of drivers
Diffstat (limited to 'src/simul')
| -rw-r--r-- | src/simul/simul-vhdl_elab.adb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb index 1332b479b..c71345ec5 100644 --- a/src/simul/simul-vhdl_elab.adb +++ b/src/simul/simul-vhdl_elab.adb @@ -906,7 +906,8 @@ package body Simul.Vhdl_Elab is Signals_Table.Table (E.Collapsed_By) .Nbr_Sources (J - 1); begin - C_Ns.Total := C_Ns.Total + Ns.Total; + -- Remove 1 for the connection. + C_Ns.Total := C_Ns.Total + Ns.Total - 1; end; end if; end; |