src/simul: rewrite of ghdl/simul based on synth

1 files changed, 22 insertions, 0 deletions

diff --git a/src/simul/simul-vhdl_debug.ads b/src/simul/simul-vhdl_debug.ads
new file mode 100644
index 000000000..71715fa1d
--- /dev/null
+++ b/src/simul/simul-vhdl_debug.ads
@@ -0,0 +1,22 @@
+--  Debugger for VHDL simulation
+--  Copyright (C) 2022 Tristan Gingold
+--
+--  This file is part of GHDL.
+--
+--  This program is free software: you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation, either version 2 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program.  If not, see <gnu.org/licenses>.
+
+package Simul.Vhdl_Debug is
+   --  Append new commands
+   procedure Init;
+end Simul.Vhdl_Debug;