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authorPatrick Lehmann <Patrick.Lehmann@plc2.de>2021-01-09 01:10:22 +0100
committertgingold <tgingold@users.noreply.github.com>2021-01-10 10:14:16 +0100
commit936a25178d085c7dbc651ea8889718eb302c012b (patch)
tree20788774623fb7e6c626119bc063f926b776e6a4 /pyGHDL/libghdl/vhdl
parentb2a98ec0674c031688ebf479664db6fd4975b428 (diff)
downloadghdl-936a25178d085c7dbc651ea8889718eb302c012b.tar.gz
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Fixes for Python files.
Diffstat (limited to 'pyGHDL/libghdl/vhdl')
-rw-r--r--pyGHDL/libghdl/vhdl/ieee.py7
-rw-r--r--pyGHDL/libghdl/vhdl/nodes_utils.py16
-rw-r--r--pyGHDL/libghdl/vhdl/scanner.py9
-rw-r--r--pyGHDL/libghdl/vhdl/sem.py8
4 files changed, 22 insertions, 18 deletions
diff --git a/pyGHDL/libghdl/vhdl/ieee.py b/pyGHDL/libghdl/vhdl/ieee.py
index 2241188e7..953b6c64c 100644
--- a/pyGHDL/libghdl/vhdl/ieee.py
+++ b/pyGHDL/libghdl/vhdl/ieee.py
@@ -37,6 +37,13 @@ from ctypes import c_int
from pyGHDL.libghdl import libghdl
+__all__ = [
+ 'Std_Logic_1164_Pkg',
+ 'Std_Logic_Type',
+ 'Std_Logic_Vector_Type'
+]
+
+
Std_Logic_1164_Pkg = c_int.in_dll(
libghdl, "vhdl__ieee__std_logic_1164__std_logic_1164_pkg"
)
diff --git a/pyGHDL/libghdl/vhdl/nodes_utils.py b/pyGHDL/libghdl/vhdl/nodes_utils.py
index b2cbef56f..2045e50bd 100644
--- a/pyGHDL/libghdl/vhdl/nodes_utils.py
+++ b/pyGHDL/libghdl/vhdl/nodes_utils.py
@@ -71,7 +71,7 @@ def Is_Second_Subprogram_Specification(Spec: Iir) -> bool:
:param Spec: Specification
:return: ``True`` if subprogram specification and previously declared subprogram body match
- """
+ """
return libghdl.vhdl__utils__is_second_subprogram_specification(Spec)
@@ -80,14 +80,12 @@ def Get_Entity_From_Entity_Aspect(Aspect: Iir) -> Iir:
"""
Extract the entity from :obj:`Aspect`.
- .. note::
-
- If :obj:`Aspect` is a component declaration, return :obj:`Aspect`. |br|
- If :obj:`Aspect` is open, return ``Null_Iir``
+ If :obj:`Aspect` is a component declaration, return :obj:`Aspect`. If it's
+ open, return ``Null_Iir``
:param Aspect: Aspect
:return: Entity
- """
+ """
return libghdl.vhdl__utils__get_entity_from_entity_aspect(Aspect)
@@ -97,7 +95,7 @@ def Get_Interface_Of_Formal(Formal: Iir) -> Iir:
Get the interface corresponding to the formal name :obj:`Formal`. This is
always an interface, even if the formal is a name.
- :param Formal: The formal.
- :return: The corresponding interface.
- """
+ :param Formal: The formal.
+ :return: The corresponding interface.
+ """
return libghdl.vhdl__utils__get_interface_of_formal(Formal)
diff --git a/pyGHDL/libghdl/vhdl/scanner.py b/pyGHDL/libghdl/vhdl/scanner.py
index 1215c97a2..24b41d7bf 100644
--- a/pyGHDL/libghdl/vhdl/scanner.py
+++ b/pyGHDL/libghdl/vhdl/scanner.py
@@ -76,14 +76,13 @@ def Scan() -> None:
@export
def Get_Current_Line() -> int:
"""
- Get the current token's line.
+ Get the current location, or the location of the current token.
+
+ Since a token cannot spread over lines, file and line of the current token are
+ the same as those of the current position. The offset is the offset in the current line.
:return: Current token's line.
"""
- """ -- Get the current location, or the location of the current token.
- -- Since a token cannot spread over lines, file and line of the current
- -- token are the same as those of the current position.
- -- The offset is the offset in the current line."""
return libghdl.vhdl__scanner__get_current_line()
diff --git a/pyGHDL/libghdl/vhdl/sem.py b/pyGHDL/libghdl/vhdl/sem.py
index 24a9b44c3..65805ce3c 100644
--- a/pyGHDL/libghdl/vhdl/sem.py
+++ b/pyGHDL/libghdl/vhdl/sem.py
@@ -43,9 +43,9 @@ def Semantic(DesignUnit) -> None:
"""
Do the semantic analysis of design unit :obj:`DesignUnit`.
- Also add a few node or change some nodes, when for exemple an identifier is
- changed into an access to the type.
+ Also add a few node or change some nodes, when for example an identifier is
+ changed into an access to the type.
- :param DesignUnit: Design unit to semantically analyze. Type: ``Iir_Design_Unit``
- """
+ :param DesignUnit: Design unit to semantically analyze. Type: ``Iir_Design_Unit``
+ """
libghdl.vhdl__sem__semantic(DesignUnit)