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| author | Tristan Gingold <tgingold@free.fr> | 2023-04-19 20:50:29 +0200 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2023-04-19 20:55:57 +0200 |
| commit | e14a831260a11f241bb4cf393e75faae21308bbe (patch) | |
| tree | c63ac424cdc1cd42896364c3d57666e520d68320 | |
| parent | a71010fd4a37a164b68afc1b124adee21b56fd10 (diff) | |
| download | ghdl-e14a831260a11f241bb4cf393e75faae21308bbe.tar.gz ghdl-e14a831260a11f241bb4cf393e75faae21308bbe.tar.bz2 ghdl-e14a831260a11f241bb4cf393e75faae21308bbe.zip | |
synth: support aggregate when target is a dynamic slice
Fix #2418
| -rw-r--r-- | src/synth/elab-vhdl_objtypes.adb | 6 | ||||
| -rw-r--r-- | src/synth/elab-vhdl_objtypes.ads | 6 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_aggr.adb | 3 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 4 |
4 files changed, 14 insertions, 5 deletions
diff --git a/src/synth/elab-vhdl_objtypes.adb b/src/synth/elab-vhdl_objtypes.adb index 745151c2c..ad2d50fa2 100644 --- a/src/synth/elab-vhdl_objtypes.adb +++ b/src/synth/elab-vhdl_objtypes.adb @@ -422,8 +422,8 @@ package body Elab.Vhdl_Objtypes is Arr_El => El_Type))); end Create_Vector_Type; - function Create_Slice_Type (Len : Uns32; El_Type : Type_Acc) - return Type_Acc + function Create_Slice_Type + (Base_Type : Type_Acc; Len : Uns32; El_Type : Type_Acc) return Type_Acc is subtype Slice_Type_Type is Type_Type (Type_Slice); function Alloc is new Areapools.Alloc_On_Pool_Addr (Slice_Type_Type); @@ -437,6 +437,8 @@ package body Elab.Vhdl_Objtypes is Is_Bnd_Static => False, Sz => Size_Type (Len) * El_Type.Sz, W => Len * El_Type.W, + Slice_Base => Base_Type, + Slice_Len => Len, Slice_El => El_Type))); end Create_Slice_Type; diff --git a/src/synth/elab-vhdl_objtypes.ads b/src/synth/elab-vhdl_objtypes.ads index 12c770eb5..b6db6d46c 100644 --- a/src/synth/elab-vhdl_objtypes.ads +++ b/src/synth/elab-vhdl_objtypes.ads @@ -187,6 +187,8 @@ package Elab.Vhdl_Objtypes is when Type_Float => Frange : Float_Range_Type; when Type_Slice => + Slice_Base : Type_Acc; + Slice_Len : Uns32; Slice_El : Type_Acc; when Type_Array | Type_Array_Unbounded @@ -282,8 +284,8 @@ package Elab.Vhdl_Objtypes is El_Type : Type_Acc) return Type_Acc; function Create_Unbounded_Vector (El_Type : Type_Acc; Idx : Type_Acc) return Type_Acc; - function Create_Slice_Type (Len : Uns32; El_Type : Type_Acc) - return Type_Acc; + function Create_Slice_Type + (Base_Type : Type_Acc; Len : Uns32; El_Type : Type_Acc) return Type_Acc; function Create_Array_Type (Bnd : Bound_Type; Static_Bnd : Boolean; Last : Boolean; diff --git a/src/synth/synth-vhdl_aggr.adb b/src/synth/synth-vhdl_aggr.adb index 1abe5a7b2..82760ab25 100644 --- a/src/synth/synth-vhdl_aggr.adb +++ b/src/synth/synth-vhdl_aggr.adb @@ -718,6 +718,9 @@ package body Synth.Vhdl_Aggr is when Type_Vector | Type_Array => return Synth_Aggregate_Array (Syn_Inst, Aggr, Aggr_Type); + when Type_Slice => + return Synth_Aggregate_Array + (Syn_Inst, Aggr, Aggr_Type.Slice_Base); when Type_Record | Type_Unbounded_Record => return Synth_Aggregate_Record (Syn_Inst, Aggr, Aggr_Type); diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 6fb438356..63505c9b5 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -182,6 +182,7 @@ package body Synth.Vhdl_Stmts is Sl_Voff : Net; Sl_Off : Value_Offsets; Err : Boolean; + Arr_Typ : Type_Acc; begin if Dest_Base.Val /= null then Strip_Const (Dest_Base); @@ -218,7 +219,8 @@ package body Synth.Vhdl_Stmts is (Get_Build (Syn_Inst), Dest_Dyn.Voff, Sl_Voff); Set_Location (Dest_Dyn.Voff, Pfx); end if; - Dest_Typ := Create_Slice_Type (Res_Bnd.Len, El_Typ); + Arr_Typ := Create_Array_Type (Res_Bnd, False, True, El_Typ); + Dest_Typ := Create_Slice_Type (Arr_Typ, Res_Bnd.Len, El_Typ); end if; end Synth_Assignment_Prefix_Slice_Name; |