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author | Tristan Gingold <tgingold@free.fr> | 2020-04-11 07:48:06 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-04-11 07:48:06 +0200 |
commit | ba140c09d7b9f21cbccdd29e1fdda67e110a38f0 (patch) | |
tree | 119bd8e94a0827dbe28a6a4f37b82aa8f73fefef | |
parent | 068df2adb05ad8de4fb574a408b1e43ab99fb3c3 (diff) | |
download | ghdl-ba140c09d7b9f21cbccdd29e1fdda67e110a38f0.tar.gz ghdl-ba140c09d7b9f21cbccdd29e1fdda67e110a38f0.tar.bz2 ghdl-ba140c09d7b9f21cbccdd29e1fdda67e110a38f0.zip |
testsuite/synth: add a test for #1208
-rw-r--r-- | testsuite/synth/issue1208/adders_4.vhdl | 21 | ||||
-rwxr-xr-x | testsuite/synth/issue1208/testsuite.sh | 9 |
2 files changed, 30 insertions, 0 deletions
diff --git a/testsuite/synth/issue1208/adders_4.vhdl b/testsuite/synth/issue1208/adders_4.vhdl new file mode 100644 index 000000000..1da64794b --- /dev/null +++ b/testsuite/synth/issue1208/adders_4.vhdl @@ -0,0 +1,21 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +entity adders_4 is + port(A,B : in std_logic_vector(7 downto 0); + CI : in std_logic; + SUM : out std_logic_vector(7 downto 0); + CO : out std_logic); +end adders_4; + +architecture archi of adders_4 is + signal tmp: std_logic_vector(8 downto 0); +begin + + tmp <= conv_std_logic_vector((conv_integer(A) + conv_integer(B) + conv_integer(CI)),9); + SUM <= tmp(7 downto 0); + CO <= tmp(8); + +end archi; diff --git a/testsuite/synth/issue1208/testsuite.sh b/testsuite/synth/issue1208/testsuite.sh new file mode 100755 index 000000000..e0e4757fa --- /dev/null +++ b/testsuite/synth/issue1208/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=-fsynopsys + +synth adders_4.vhdl -e > syn_adders_4.vhdl + +echo "Test successful" |