blob: 3252763c721e875b90413669fbfe025e5c653abd (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
|
library ieee;
use ieee.std_logic_1164.all;
entity repro4 is
port(
clk : in std_logic;
iftrue : out std_logic);
end;
architecture arch of repro4 is
type variables_t is record
iftrue : std_logic;
return_output : std_logic;
end record;
begin
process (clk) is
variable read_pipe : variables_t;
variable write_pipe : variables_t;
begin
write_pipe := read_pipe;
iftrue <= write_pipe.iftrue;
read_pipe := write_pipe;
end process;
end arch;
|