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path: root/polycom_recv/uart.c
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#include "project.h"



LOCAL void ICACHE_FLASH_ATTR
uart0_config (uint32_t baud)
{


//        ETS_UART_INTR_ATTACH(uart0_rx_intr_handler,  &(UartDev.rcv_buff));

  PIN_PULLUP_DIS (PERIPHS_IO_MUX_U0TXD_U);
  PIN_FUNC_SELECT (PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);



  uart_div_modify (UART0, UART_CLK_FREQ / baud);

  SET_PERI_REG_MASK (UART_CONF0 (UART0), UART_RXFIFO_RST | UART_TXFIFO_RST); //RESET FIFO
  CLEAR_PERI_REG_MASK (UART_CONF0 (UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);

  WRITE_PERI_REG (UART_CONF1 (UART0),
                  ((100 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S)
                  | (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
                  UART_RX_TOUT_EN | ((0x10 & UART_TXFIFO_EMPTY_THRHD) <<
                                     UART_TXFIFO_EMPTY_THRHD_S));
  SET_PERI_REG_MASK (UART_INT_ENA (UART0),
                     UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA);



  WRITE_PERI_REG (UART_INT_CLR (UART0), 0xffff);
  //enable rx_interrupt
  //SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_OVF_INT_ENA);
}



STATUS
uart0_tx_one_char (uint8 TxChar)
{
  while (true)
    {
      uint32 fifo_cnt =
        READ_PERI_REG (UART_STATUS (UART0)) & (UART_TXFIFO_CNT <<
                                               UART_TXFIFO_CNT_S);
      if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126)
        {
          break;
        }
    }
  WRITE_PERI_REG (UART_FIFO (UART0), TxChar);
  return OK;
}


void ICACHE_FLASH_ATTR
uart_init (void)
{
  uart0_config (115200);
}