diff options
author | root <root@no.no.james.local> | 2015-11-17 12:54:57 +0000 |
---|---|---|
committer | root <root@no.no.james.local> | 2015-11-17 12:54:57 +0000 |
commit | ea4510dfe03f891340985594c4de15134e548853 (patch) | |
tree | e9f8df4d1c45a5781aea7d74b9973b5b92ca7d5f /polycom_recv/uart.c | |
parent | 7059fd523d6514d04e232f1d0acbc983856bd2e6 (diff) | |
download | polycom-ea4510dfe03f891340985594c4de15134e548853.tar.gz polycom-ea4510dfe03f891340985594c4de15134e548853.tar.bz2 polycom-ea4510dfe03f891340985594c4de15134e548853.zip |
recvr
Diffstat (limited to 'polycom_recv/uart.c')
-rw-r--r-- | polycom_recv/uart.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/polycom_recv/uart.c b/polycom_recv/uart.c new file mode 100644 index 0000000..5d7b5d3 --- /dev/null +++ b/polycom_recv/uart.c @@ -0,0 +1,61 @@ +#include "project.h" + + + +LOCAL void ICACHE_FLASH_ATTR +uart0_config (uint32_t baud) +{ + + +// ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); + + PIN_PULLUP_DIS (PERIPHS_IO_MUX_U0TXD_U); + PIN_FUNC_SELECT (PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); + + + + uart_div_modify (UART0, UART_CLK_FREQ / baud); + + SET_PERI_REG_MASK (UART_CONF0 (UART0), UART_RXFIFO_RST | UART_TXFIFO_RST); //RESET FIFO + CLEAR_PERI_REG_MASK (UART_CONF0 (UART0), UART_RXFIFO_RST | UART_TXFIFO_RST); + + WRITE_PERI_REG (UART_CONF1 (UART0), + ((100 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) + | (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | + UART_RX_TOUT_EN | ((0x10 & UART_TXFIFO_EMPTY_THRHD) << + UART_TXFIFO_EMPTY_THRHD_S)); + SET_PERI_REG_MASK (UART_INT_ENA (UART0), + UART_RXFIFO_TOUT_INT_ENA | UART_FRM_ERR_INT_ENA); + + + + WRITE_PERI_REG (UART_INT_CLR (UART0), 0xffff); + //enable rx_interrupt + //SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_OVF_INT_ENA); +} + + + +STATUS +uart0_tx_one_char (uint8 TxChar) +{ + while (true) + { + uint32 fifo_cnt = + READ_PERI_REG (UART_STATUS (UART0)) & (UART_TXFIFO_CNT << + UART_TXFIFO_CNT_S); + if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) + { + break; + } + } + WRITE_PERI_REG (UART_FIFO (UART0), TxChar); + return OK; +} + + +void ICACHE_FLASH_ATTR +uart_init (void) +{ + uart0_config (115200); +} |