diff options
Diffstat (limited to 'boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c')
| -rw-r--r-- | boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c b/boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c index 56d3b16a..e0be3b23 100644 --- a/boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c +++ b/boards/base/STM32F746-Discovery/stm32f746g_raw32_system.c @@ -66,11 +66,11 @@ #include "stm32f7xx.h" #if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ + #define HSE_VALUE ((gU32)25000000) /*!< Default value of the External oscillator in Hz */ #endif /* HSE_VALUE */ #if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ + #define HSI_VALUE ((gU32)16000000) /*!< Value of the Internal oscillator in Hz*/ #endif /* HSI_VALUE */ /** @@ -125,9 +125,9 @@ is no need to call the 2 first functions listed above, since SystemCoreClock variable is updated automatically. */ - uint32_t SystemCoreClock = 16000000; - const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; - const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + gU32 SystemCoreClock = 16000000; + const gU8 AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + const gU8 APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; /** * @} @@ -163,19 +163,19 @@ void SystemInit(void) #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; + RCC->CR |= (gU32)0x00000001; /* Reset CFGR register */ RCC->CFGR = 0x00000000; /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; + RCC->CR &= (gU32)0xFEF6FFFF; /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x24003010; /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; + RCC->CR &= (gU32)0xFFFBFFFF; /* Disable all interrupts */ RCC->CIR = 0x00000000; @@ -230,7 +230,7 @@ void SystemInit(void) */ void SystemCoreClockUpdate(void) { - uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + gU32 tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; @@ -287,8 +287,8 @@ void SystemCoreClockUpdate(void) */ void SystemInit_ExtMemCtl(void) { - register uint32_t tmpreg = 0, timeout = 0xFFFF; - register __IO uint32_t index; + register gU32 tmpreg = 0, timeout = 0xFFFF; + register __IO gU32 index; /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG and GPIOH interface clock */ |