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authorJoel Bodenmann <joel.bodenmann@hevs.ch>2012-10-23 17:59:31 +0200
committerJoel Bodenmann <joel.bodenmann@hevs.ch>2012-10-23 17:59:31 +0200
commite46b6b60249632d8a9b9a81f669a46188e74bbca (patch)
tree0ba8cd8c472cdabc304e1bcb1054287ff19bbffa /drivers/gdisp/S6D1121
parentc51096f8f271a3f1d8b5254ac920e1eae263ad5a (diff)
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S6D1121 FSMC timing cleanup
Diffstat (limited to 'drivers/gdisp/S6D1121')
-rw-r--r--drivers/gdisp/S6D1121/gdisp_lld.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gdisp/S6D1121/gdisp_lld.c b/drivers/gdisp/S6D1121/gdisp_lld.c
index bf2e60f5..9496b076 100644
--- a/drivers/gdisp/S6D1121/gdisp_lld.c
+++ b/drivers/gdisp/S6D1121/gdisp_lld.c
@@ -105,7 +105,7 @@ bool_t GDISP_LLD(init)(void) {
int FSMC_Bank = 0;
/* FSMC timing */
- FSMC_Bank1->BTCR[FSMC_Bank+1] = (10) | (10 << 8) | (10 << 16);
+ FSMC_Bank1->BTCR[FSMC_Bank+1] = FSMC_BTR1_ADDSET_1 | FSMC_BTR1_DATAST_1;
/* Bank1 NOR/SRAM control register configuration */
FSMC_Bank1->BTCR[FSMC_Bank] = FSMC_BCR1_MWID_0 | FSMC_BCR1_WREN | FSMC_BCR1_MBKEN;