Removed software PDI/TPI emulation from the AVRISP-MKII clone project, as it was very buggy. PDI and TPI must now be implemented via seperate headers instead of the one unified ISP/TPI/PDI header.

3 files changed, 8 insertions, 293 deletions

diff --git a/Projects/AVRISP-MKII/AVRISP.txt b/Projects/AVRISP-MKII/AVRISP.txt
index 610903110..034df6717 100644
--- a/Projects/AVRISP-MKII/AVRISP.txt
+++ b/Projects/AVRISP-MKII/AVRISP.txt
@@ -56,17 +56,12 @@
  *  Note that this design currently has the following limitations:

  *    - Minimum ISP target clock speed of 500KHz due to hardware SPI module prescaler limitations

  *    - No reversed/shorted target connector detection and notification

- *    - Very slow TPI and PDI programming when in software emulated USART mode

+ *    - A seperate header is required for each of the ISP, PDI and TPI programming protocols that the user wishes to use

  *

  *  On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be

  *  set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models

  *  without an ADC converter, VTARGET will report a fixed 5V level at all times.

  *

- *  When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the

- *  XPLAIN's XMEGA AVR, and will enable hardware PDI/TPI only programming support (since ISP mode is not needed). Note that

- *  the first revision XPLAIN board lacks a bootloader on the AT90USB1287, and thus for this firmware to be loaded, an external

- *  programmer will be required.

- *

  *  While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more

  *  of FLASH is required. On 8KB devices, ISP or PDI/TPI programming support can be disabled to reduce program size.

  *

@@ -128,7 +123,7 @@
  *    <td><b>PDI 6 Pin Layout:</b></td>

  *   </tr>

  *   <tr>

- *    <td>MISO <b><sup>2</sup></b></td>

+ *    <td>Tx/Rx <b><sup>2</sup></b></td>

  *    <td>DATA</td>

  *    <td>1</td>

  *   </tr>

@@ -148,7 +143,7 @@
  *    <td>4</td>

  *   </tr>

  *   <tr>

- *    <td>PORTx.y <b><sup>2, 3</sup></b></td>

+ *    <td>XCLK</td>

  *    <td>CLOCK</td>

  *    <td>5</td>

  *   </tr>

@@ -160,9 +155,7 @@
  *  </table>

  *

  *  <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n

- *  <b><sup>2</sup></b> <i>When XPROG_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together

- *                         via a pair of 220 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i> \n

- *  <b><sup>3</sup></b> <i>See AUX line related tokens in the \ref SSec_Options section</i>

+ *  <b><sup>2</sup></b> <i>The AVR's Tx and Rx become the DATA line when connected together via a pair of 220 ohm resistors</i> \n

  *

  *  \section Sec_TPI TPI Connections

  *  Connections to the device for TPI programming<b><sup>1</sup></b> (when enabled):

@@ -174,7 +167,7 @@
  *    <td><b>TPI 6 Pin Layout:</b></td>

  *   </tr>

  *   <tr>

- *    <td>MISO <b><sup>2</sup></b></td>

+ *    <td>Tx/Rx <b><sup>2</sup></b></td>

  *    <td>DATA</td>

  *    <td>1</td>

  *   </tr>

@@ -184,7 +177,7 @@
  *    <td>2</td>

  *   </tr>

  *   <tr>

- *    <td>SCLK <b><sup>2</sup></b></td>

+ *    <td>XCLK <b><sup>2</sup></b></td>

  *    <td>CLOCK</td>

  *    <td>3</td>

  *   </tr>

@@ -206,8 +199,7 @@
  *  </table>

  *

  *  <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n

- *  <b><sup>2</sup></b> <i>When XPROG_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together

- *                         via a pair of 220 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i> \n

+ *  <b><sup>2</sup></b> <i>The AVR's Tx and Rx become the DATA line when connected together via a pair of 220 ohm resistors</i> \n

  *  <b><sup>3</sup></b> <i>See AUX line related tokens in the \ref SSec_Options section</i>

  *

  *  \section SSec_Options Project Options

@@ -261,14 +253,6 @@
  *    <td>Define to enable PDI and TPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  

  *   </tr>

  *   <tr>

- *    <td>XPROG_VIA_HARDWARE_USART</td>

- *    <td>Makefile CDEFS</td>

- *    <td>Define to force the PDI and TPI protocols (when enabled) to use the much faster hardware USART instead of bit-banging

- *        to match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires 

- *        seperate ISP, PDI, and TPI programming headers) but increases programming speed dramatically.

- *        <i>Ignored when compiled for the XPLAIN board.</i></td>  

- *   </tr>

- *   <tr>

  *    <td>NO_VTARGET_DETECT</td>

  *    <td>Makefile CDEFS</td>

  *    <td>Define to disable VTARGET sampling and reporting on AVR models with an ADC converter. This will cause the programmer

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
index e2c6fd6a2..72a38f824 100644
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
@@ -39,115 +39,13 @@
 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)

 

 /** Flag to indicate if the USART is currently in Tx or Rx mode. */

-volatile bool               IsSending;

-

-#if !defined(XPROG_VIA_HARDWARE_USART)

-/** Software USART raw frame bits for transmission/reception. */

-volatile uint16_t           SoftUSART_Data;

-

-/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */

-#define SoftUSART_BitCount  GPIOR2

-

-

-/** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */

-ISR(TIMER1_COMPA_vect, ISR_BLOCK)

-{

-	/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */

-	BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;

-

-	/* If not sending or receiving, just exit */

-	if (!(SoftUSART_BitCount))

-	  return;

-

-	/* Check to see if we are at a rising or falling edge of the clock */

-	if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)

-	{

-		/* If at rising clock edge and we are in send mode, abort */

-		if (IsSending)

-		  return;

-		  

-		/* Wait for the start bit when receiving */

-		if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))

-		  return;

-

-		/* Shift in the bit one less than the frame size in position, so that the start bit will eventually

-		 * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */

-		if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)

-		  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));

-

-		SoftUSART_Data >>= 1;

-		SoftUSART_BitCount--;

-	}

-	else

-	{

-		/* If at falling clock edge and we are in receive mode, abort */

-		if (!IsSending)

-		  return;

-

-		/* Set the data line to the next bit value */

-		if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)

-		  BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;

-		else

-		  BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;		  

-

-		SoftUSART_Data >>= 1;

-		SoftUSART_BitCount--;	

-	}

-}

-

-/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */

-ISR(TIMER1_CAPT_vect, ISR_BLOCK)

-{

-	/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */

-	BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;

-

-	/* If not sending or receiving, just exit */

-	if (!(SoftUSART_BitCount))

-	  return;

-

-	/* Check to see if we are at a rising or falling edge of the clock */

-	if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)

-	{

-		/* If at rising clock edge and we are in send mode, abort */

-		if (IsSending)

-		  return;

-		  

-		/* Wait for the start bit when receiving */

-		if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))

-		  return;

-	

-		/* Shift in the bit one less than the frame size in position, so that the start bit will eventually

-		 * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */

-		if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)

-		 ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));

-

-		SoftUSART_Data >>= 1;

-		SoftUSART_BitCount--;

-	}

-	else

-	{

-		/* If at falling clock edge and we are in receive mode, abort */

-		if (!IsSending)

-		  return;

-

-		/* Set the data line to the next bit value */

-		if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)

-		  BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;

-		else

-		  BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;		  

-

-		SoftUSART_Data >>= 1;

-		SoftUSART_BitCount--;

-	}

-}

-#endif

+volatile bool IsSending;

 

 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */

 void XPROGTarget_EnableTargetPDI(void)

 {

 	IsSending = false;

 

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Set Tx and XCK as outputs, Rx as input */

 	DDRD |=  (1 << 5) | (1 << 3);

 	DDRD &= ~(1 << 2);

@@ -160,24 +58,6 @@ void XPROGTarget_EnableTargetPDI(void)
 	UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);

 	UCSR1B = (1 << TXEN1);

 	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);

-#else

-	/* Set DATA and CLOCK lines to outputs */

-	BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;

-	BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;

-	

-	/* Set DATA line low for at least 1ms to ensure that the device is ready for PDI mode to be entered */

-	BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;

-	_delay_ms(1);

-

-	/* Set DATA line high for at least 90ns to disable /RESET functionality */

-	BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;

-	_delay_us(1);

-

-	/* Fire timer compare channel A ISR to manage the software USART */

-	OCR1A  = BITS_BETWEEN_USART_CLOCKS;

-	TCCR1B = (1 << WGM12) | (1 << CS10);

-	TIMSK1 = (1 << OCIE1A);

-#endif

 

 	/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */

 	XPROGTarget_SendBreak();

@@ -194,7 +74,6 @@ void XPROGTarget_EnableTargetTPI(void)
 	AUX_LINE_PORT &= ~AUX_LINE_MASK;

 	_delay_us(1);

 

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Set Tx and XCK as outputs, Rx as input */

 	DDRD |=  (1 << 5) | (1 << 3);

 	DDRD &= ~(1 << 2);

@@ -203,19 +82,6 @@ void XPROGTarget_EnableTargetTPI(void)
 	UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);

 	UCSR1B = (1 << TXEN1);

 	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);

-#else

-	/* Set DATA and CLOCK lines to outputs */

-	BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;

-	BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;

-	

-	/* Set DATA line high for idle state */

-	BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;

-

-	/* Fire timer capture channel ISR to manage the software USART */

-	ICR1   = BITS_BETWEEN_USART_CLOCKS;

-	TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);

-	TIMSK1 = (1 << ICIE1);

-#endif

 

 	/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */

 	XPROGTarget_SendBreak();

@@ -228,7 +94,6 @@ void XPROGTarget_DisableTargetPDI(void)
 	/* Switch to Rx mode to ensure that all pending transmissions are complete */

 	XPROGTarget_SetRxMode();

 

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Turn off receiver and transmitter of the USART, clear settings */

 	UCSR1A  = ((1 << TXC1) | (1 << RXC1));

 	UCSR1B  = 0;

@@ -237,18 +102,6 @@ void XPROGTarget_DisableTargetPDI(void)
 	/* Tristate all pins */

 	DDRD  &= ~((1 << 5) | (1 << 3));

 	PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));

-#else

-	/* Turn off software USART management timer */

-	TCCR1B = 0;

-

-	/* Set DATA and CLOCK lines to inputs */

-	BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;

-	BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;

-	

-	/* Tristate DATA and CLOCK lines */

-	BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;

-	BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;	

-#endif

 }

 

 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */

@@ -257,7 +110,6 @@ void XPROGTarget_DisableTargetTPI(void)
 	/* Switch to Rx mode to ensure that all pending transmissions are complete */

 	XPROGTarget_SetRxMode();

 

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Turn off receiver and transmitter of the USART, clear settings */

 	UCSR1A |= (1 << TXC1) | (1 << RXC1);

 	UCSR1B  = 0;

@@ -266,18 +118,6 @@ void XPROGTarget_DisableTargetTPI(void)
 	/* Set all USART lines as input, tristate */

 	DDRD  &= ~((1 << 5) | (1 << 3));

 	PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));

-#else

-	/* Turn off software USART management timer */

-	TCCR1B = 0;

-

-	/* Set DATA and CLOCK lines to inputs */

-	BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;

-	BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;

-	

-	/* Tristate DATA and CLOCK lines */

-	BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;

-	BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;

-#endif

 

 	/* Tristate target /RESET line */

 	AUX_LINE_DDR  &= ~AUX_LINE_MASK;

@@ -294,30 +134,10 @@ void XPROGTarget_SendByte(const uint8_t Byte)
 	if (!(IsSending))

 	  XPROGTarget_SetTxMode();

 	  

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Wait until there is space in the hardware Tx buffer before writing */

 	while (!(UCSR1A & (1 << UDRE1)));

 	UCSR1A |= (1 << TXC1);

 	UDR1    = Byte;

-#else

-	/* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */

-	uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));

-

-	/* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */

-	uint8_t ParityData = Byte;

-	while (ParityData)

-	{

-		NewUSARTData ^= (1 << 9);

-		ParityData   &= (ParityData - 1);

-	}

-

-	/* Wait until transmitter is idle before writing new data */

-	while (SoftUSART_BitCount);

-

-	/* Data shifted out LSB first, START DATA PARITY STOP STOP */

-	SoftUSART_Data     = NewUSARTData;

-	SoftUSART_BitCount = BITS_IN_USART_FRAME;

-#endif

 

     if (TimeoutMSRemaining)

 	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;

@@ -333,7 +153,6 @@ uint8_t XPROGTarget_ReceiveByte(void)
 	if (IsSending)

 	  XPROGTarget_SetRxMode();

 

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Wait until a byte has been received before reading */

 	while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);

 	

@@ -341,17 +160,6 @@ uint8_t XPROGTarget_ReceiveByte(void)
 	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;

 

 	return UDR1;

-#else

-	/* Wait until a byte has been received before reading */

-	SoftUSART_BitCount = BITS_IN_USART_FRAME;

-	while (SoftUSART_BitCount && TimeoutMSRemaining);

-

-	if (TimeoutMSRemaining)

-	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;

-

-	/* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */

-	return (uint8_t)SoftUSART_Data;

-#endif

 }

 

 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */

@@ -361,7 +169,6 @@ void XPROGTarget_SendBreak(void)
 	if (!(IsSending))

 	  XPROGTarget_SetTxMode();

 

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Need to do nothing for a full frame to send a BREAK */

 	for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)

 	{

@@ -369,13 +176,6 @@ void XPROGTarget_SendBreak(void)
 		while (PIND & (1 << 5));

 		while (!(PIND & (1 << 5)));

 	}

-#else

-	while (SoftUSART_BitCount);

-

-	/* Need to do nothing for a full frame to send a BREAK */

-	SoftUSART_Data     = 0x0FFF;

-	SoftUSART_BitCount = BITS_IN_USART_FRAME;

-#endif

 

     if (TimeoutMSRemaining)

 	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;

@@ -383,7 +183,6 @@ void XPROGTarget_SendBreak(void)
 

 static void XPROGTarget_SetTxMode(void)

 {

-#if defined(XPROG_VIA_HARDWARE_USART)

 	/* Wait for a full cycle of the clock */

 	while (PIND & (1 << 5));

 	while (!(PIND & (1 << 5)));

@@ -395,25 +194,6 @@ static void XPROGTarget_SetTxMode(void)
 	UCSR1B |=  (1 << TXEN1);

 		

 	IsSending = true;

-#else

-	while (SoftUSART_BitCount && TimeoutMSRemaining);

-	

-	/* Wait for a full cycle of the clock */

-	SoftUSART_Data     = 0x0001;

-	SoftUSART_BitCount = 1;

-	while (SoftUSART_BitCount);

-

-	if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)

-	{

-		BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;

-		BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;

-	}

-	else

-	{

-		BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;

-		BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;	

-	}

-#endif

 

     if (TimeoutMSRemaining)

 	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;

@@ -423,7 +203,6 @@ static void XPROGTarget_SetTxMode(void)
 

 static void XPROGTarget_SetRxMode(void)

 {

-#if defined(XPROG_VIA_HARDWARE_USART)

 	while (!(UCSR1A & (1 << TXC1)));

 	UCSR1A |=  (1 << TXC1);

 

@@ -432,26 +211,6 @@ static void XPROGTarget_SetRxMode(void)
 

 	DDRD   &= ~(1 << 3);

 	PORTD  &= ~(1 << 3);

-#else

-	while (SoftUSART_BitCount && TimeoutMSRemaining);

-

-	if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)

-	{

-		BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;

-		BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;

-

-		/* Wait until DATA line has been pulled up to idle by the target */

-		while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);

-	}

-	else

-	{

-		BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;

-		BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;

-

-		/* Wait until DATA line has been pulled up to idle by the target */

-		while (!(BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK) && TimeoutMSRemaining);

-	}	

-#endif

 

     if (TimeoutMSRemaining)

 	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h
index e0400e2cc..65ec11bcf 100644
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h
@@ -54,38 +54,10 @@
 				#define ENABLE_XPROG_PROTOCOL

 			#endif

 		#endif

-

-	/* Defines: */

-		#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))

-			#define XPROG_VIA_HARDWARE_USART

-		#else

-			#define BITBANG_PDIDATA_PORT     PORTB

-			#define BITBANG_PDIDATA_DDR      DDRB

-			#define BITBANG_PDIDATA_PIN      PINB

-			#define BITBANG_PDIDATA_MASK     (1 << 3)

-			

-			#define BITBANG_PDICLOCK_PORT    AUX_LINE_PORT

-			#define BITBANG_PDICLOCK_DDR     AUX_LINE_DDR

-			#define BITBANG_PDICLOCK_PIN     AUX_LINE_PIN

-			#define BITBANG_PDICLOCK_MASK    AUX_LINE_MASK

-

-			#define BITBANG_TPIDATA_PORT     PORTB

-			#define BITBANG_TPIDATA_DDR      DDRB

-			#define BITBANG_TPIDATA_PIN      PINB

-			#define BITBANG_TPIDATA_MASK     (1 << 3)

-				

-			#define BITBANG_TPICLOCK_PORT    PORTB

-			#define BITBANG_TPICLOCK_DDR     DDRB

-			#define BITBANG_TPICLOCK_PIN     PINB

-			#define BITBANG_TPICLOCK_MASK    (1 << 1)

-		#endif

 		

 		/** Serial carrier TPI/PDI speed when hardware TPI/PDI mode is used */

 		#define XPROG_HARDWARE_SPEED       1000000

 

-		/** Number of cycles between each clock when software USART mode is used */

-		#define BITS_BETWEEN_USART_CLOCKS  100

-		

 		/** Total number of bits in a single USART frame */

 		#define BITS_IN_USART_FRAME        12