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* DMA rework.Giovanni Di Sirio2018-12-281-1/+1
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12487 110e8d01-0319-4d1e-a829-52ad28d1bb01
* RTC update for F7.Giovanni Di Sirio2018-11-251-1/+3
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12412 ↵Giovanni Di Sirio2018-11-091-0/+1
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* DMAMUX definitions.Giovanni Di Sirio2018-07-291-1/+1
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* Fixed missing semicolon.Giovanni Di Sirio2018-07-071-1/+1
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* Fixed bug #953.Giovanni Di Sirio2018-07-071-9/+45
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* Added mcuconf.h generator for STM32H743xx.Giovanni Di Sirio2018-05-151-0/+5
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* STM32H7-related fixes.Giovanni Di Sirio2018-05-101-1/+1
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* H7 OTG changes, not complete.Giovanni Di Sirio2018-05-082-5/+6
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* Fixed comment.Giovanni Di Sirio2018-03-301-1/+1
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* Minor registry fix for STM32H7xx.Giovanni Di Sirio2018-03-111-1/+1
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* Mass update of the Apache 2.0 license statement.Giovanni Di Sirio2018-01-207-7/+7
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* Fixed #912.Giovanni Di Sirio2018-01-191-0/+23
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* Defaulted all STM32 drivers to enable peripheral clocks during stop/sleep ↵Giovanni Di Sirio2018-01-172-10/+19
| | | | | | modes. Now RCC macros are able to set or clear the LP bit of a peripheral. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11300 35acf78f-673a-0410-8e92-d51de3d6d3f4
* More ADCv4 code.Giovanni Di Sirio2018-01-122-31/+8
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11263 ↵Giovanni Di Sirio2018-01-111-10/+15
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* Added STM32 ADCv4 placeholders.Giovanni Di Sirio2018-01-112-3/+4
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* Added RTC and WDG support to H7.Giovanni Di Sirio2018-01-111-0/+4
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* SPIv1 and SPIv2 circular mode added. Rework of RCC files and all ↵Giovanni Di Sirio2018-01-101-31/+29
| | | | | | dependencies inside STM32 drivers. Documentation fixes in some HAL modules. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11247 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Various fixes in the new STM32F7xx support code.Giovanni Di Sirio2018-01-091-3/+3
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* Added stub of STM32 I2Cv3 driver for STM32H7xx.Giovanni Di Sirio2018-01-082-4/+24
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* Undid some changes.Giovanni Di Sirio2018-01-081-0/+2
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* Added SRAMs cache settings to STM32H7 mcuconf.h.Giovanni Di Sirio2018-01-082-1/+51
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* Unified MPU handler.Giovanni Di Sirio2018-01-081-1/+2
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* Added unified cache handler for Cortex-M devices.Giovanni Di Sirio2018-01-081-2/+0
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* Added BDMA support to the STM32H7xx port.Giovanni Di Sirio2018-01-075-0/+47
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* More fixes but SPIv3 still does not work.Giovanni Di Sirio2018-01-041-1/+1
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* SPIv3 driver complete, to be tested...Giovanni Di Sirio2017-12-281-12/+29
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* DMA and SPI code, not complete.Giovanni Di Sirio2017-12-272-2/+1
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* Added DMAMUX helper. small doc fixes.Giovanni Di Sirio2017-12-272-3/+209
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* Reviewed RCC macros.Giovanni Di Sirio2017-12-271-28/+113
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* All clock points added.Giovanni Di Sirio2017-12-271-11/+95
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* More clock points, some renaming for consistency.Giovanni Di Sirio2017-12-261-139/+210
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* Added more clock points.Giovanni Di Sirio2017-12-261-68/+238
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* Added board generator for STM32H7xx.Giovanni Di Sirio2017-12-261-3/+0
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* Added stub DMA and SPI drivers for H7.Giovanni Di Sirio2017-12-263-4/+51
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11190 ↵Giovanni Di Sirio2017-12-261-1/+1
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* Serial port working.Giovanni Di Sirio2017-12-261-112/+90
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* PAL EXTI vectors adapted to H7.Giovanni Di Sirio2017-12-262-24/+24
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* Various RCC changes, ST driver working.Giovanni Di Sirio2017-12-261-363/+92
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* Added clock sources for timers and more CFGR settings.Giovanni Di Sirio2017-12-262-29/+77
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* Frequencies are right finally.Giovanni Di Sirio2017-12-262-14/+14
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* Reduced complexity of preprocessor conditions regarding PLLs.Giovanni Di Sirio2017-12-252-26/+15
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* LED flashing but at a wrong rate, so, still issues.Giovanni Di Sirio2017-12-251-4/+2
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* More H7-related changes.Giovanni Di Sirio2017-12-253-15/+29
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* More H7 code.Giovanni Di Sirio2017-12-251-28/+48
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* More H7 code.Giovanni Di Sirio2017-12-253-154/+462
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* It compiles, not tested and unfinished.Giovanni Di Sirio2017-12-242-48/+189
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* More H7 code, not functional yet.Giovanni Di Sirio2017-12-243-580/+803
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11173 ↵Giovanni Di Sirio2017-12-231-135/+71
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