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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-12 15:37:24 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-12 15:37:24 +0000 |
| commit | c29ee522912f292fc2f44ee596dcebbbd5c5d718 (patch) | |
| tree | d6a5aa4d64aa36ac4755c28946edcaa6a46ce313 /os/hal/ports/STM32/STM32H7xx | |
| parent | bae22ff5bf8185b7ed2b6d26fb0d8f2c42253cfb (diff) | |
| download | ChibiOS-c29ee522912f292fc2f44ee596dcebbbd5c5d718.tar.gz ChibiOS-c29ee522912f292fc2f44ee596dcebbbd5c5d718.tar.bz2 ChibiOS-c29ee522912f292fc2f44ee596dcebbbd5c5d718.zip | |
More ADCv4 code.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11265 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32H7xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32H7xx/stm32_rcc.h | 35 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32H7xx/stm32_registry.h | 4 |
2 files changed, 8 insertions, 31 deletions
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h index 8c3d09fa5..d8a2de894 100644 --- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h @@ -398,50 +398,27 @@ * @{
*/
/**
- * @brief Enables the ADC1 peripheral clock.
+ * @brief Enables the ADC1/ADC2 peripheral clock.
*
* @param[in] lp low power enable flag
*
* @api
*/
-#define rccEnableADC1(lp) rccEnableAPB2(RCC_APB2ENR_ADC1EN, lp)
+#define rccEnableADC12(lp) rccEnableAHB1(RCC_AHB1ENR_ADC12EN, lp)
/**
- * @brief Disables the ADC1 peripheral clock.
+ * @brief Disables the ADC1/ADC2 peripheral clock.
*
* @api
*/
-#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN)
+#define rccDisableADC12() rccDisableAHB1(RCC_AHB1ENR_ADC12EN)
/**
- * @brief Resets the ADC1 peripheral.
+ * @brief Resets the ADC1/ADC2 peripheral.
*
* @api
*/
-#define rccResetADC1() rccResetAPB2(RCC_APB2RSTR_ADC1RST)
-
-/**
- * @brief Enables the ADC2 peripheral clock.
- *
- * @param[in] lp low power enable flag
- *
- * @api
- */
-#define rccEnableADC2(lp) rccEnableAPB2(RCC_APB2ENR_ADC2EN, lp)
-
-/**
- * @brief Disables the ADC2 peripheral clock.
- *
- * @api
- */
-#define rccDisableADC2() rccDisableAPB2(RCC_APB2ENR_ADC2EN)
-
-/**
- * @brief Resets the ADC2 peripheral.
- *
- * @api
- */
-#define rccResetADC2() rccResetAPB2(RCC_APB2RSTR_ADC2RST)
+#define rccResetADC12() rccResetAHB1(RCC_AHB1RSTR_ADC12RST)
/**
* @brief Enables the ADC3 peripheral clock.
diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h index ba998da8f..9241392f9 100644 --- a/os/hal/ports/STM32/STM32H7xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32H7xx/stm32_registry.h @@ -42,8 +42,8 @@ /* ADC attributes.*/
#define STM32_ADC12_HANDLER Vector88
#define STM32_ADC12_NUMBER 18
-#define STM32_ADC34_HANDLER Vector23C
-#define STM32_ADC34_NUMBER 127
+#define STM32_ADC3_HANDLER Vector23C
+#define STM32_ADC3_NUMBER 127
#define STM32_HAS_ADC1 TRUE
|