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Diffstat (limited to 'os/hal/lib/fallback/I2C/hal_i2c_lld.c')
-rw-r--r--os/hal/lib/fallback/I2C/hal_i2c_lld.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/os/hal/lib/fallback/I2C/hal_i2c_lld.c b/os/hal/lib/fallback/I2C/hal_i2c_lld.c
index 77b9e2e29..72e522b6f 100644
--- a/os/hal/lib/fallback/I2C/hal_i2c_lld.c
+++ b/os/hal/lib/fallback/I2C/hal_i2c_lld.c
@@ -241,8 +241,6 @@ static msg_t i2c_read_byte(I2CDriver *i2cp, unsigned nack) {
static msg_t i2c_write_header(I2CDriver *i2cp, i2caddr_t addr, bool rw) {
- CHECK_ERROR(i2c_write_start(i2cp));
-
/* Check for 10 bits addressing.*/
if (i2cp->config->addr10) {
/* It is 10 bits.*/
@@ -358,6 +356,8 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
i2cp->end += timeout;
}
+ CHECK_ERROR(i2c_write_start(i2cp));
+
/* Sending anddress and mode.*/
CHECK_ERROR(i2c_write_header(i2cp, addr, true));
@@ -408,6 +408,9 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
i2cp->end += timeout;
}
+ /* send start condition */
+ CHECK_ERROR(i2c_write_start(i2cp));
+
/* Sending anddress and mode.*/
CHECK_ERROR(i2c_write_header(i2cp, addr, false));
@@ -417,7 +420,12 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
/* Is there a read phase? */
if (rxbytes > 0U) {
+
+ /* send restart condition */
CHECK_ERROR(i2c_write_restart(i2cp));
+ /* Sending anddress and mode.*/
+ CHECK_ERROR(i2c_write_header(i2cp, addr, true));
+
do {
/* Last byte sends a NACK.*/
msg_t msg = i2c_read_byte(i2cp, rxbytes > 1U ? 0U : 1U);