diff options
| -rw-r--r-- | os/hal/platforms/STM32/hal_lld_f105_f107.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32/hal_lld_f105_f107.h b/os/hal/platforms/STM32/hal_lld_f105_f107.h index 6fadbbd7f..2eba312c5 100644 --- a/os/hal/platforms/STM32/hal_lld_f105_f107.h +++ b/os/hal/platforms/STM32/hal_lld_f105_f107.h @@ -255,7 +255,7 @@ /* The following values are only used if PLL2 clock is selected as source
for the PLL clock */
-#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2)
+#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2) || defined(__DOXYGEN__)
/**
* @brief PLL2 input frequency. */
@@ -275,7 +275,6 @@ #if (STM32_PLL2CLKOUT < 40000000) || (STM32_PLL2CLKOUT > 74000000)
#error "STM32_PLL2CLKOUT outside acceptable range (40...74MHz)"
#endif
-
#endif /* STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2 */
/**
|