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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-05-20 12:19:18 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-05-20 12:19:18 +0000 |
| commit | 0c56def75ec3191eed36efc1ee2bdb5ee0e58837 (patch) | |
| tree | 39c8c0b819bbb60856e46a6ba6968a00d68fb7d8 | |
| parent | 622b7a9359cc24f144567a3c51b4e4f3183ee6c9 (diff) | |
| download | ChibiOS-0c56def75ec3191eed36efc1ee2bdb5ee0e58837.tar.gz ChibiOS-0c56def75ec3191eed36efc1ee2bdb5ee0e58837.tar.bz2 ChibiOS-0c56def75ec3191eed36efc1ee2bdb5ee0e58837.zip | |
Documentation related change.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1944 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/platforms/STM32/hal_lld_f105_f107.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32/hal_lld_f105_f107.h b/os/hal/platforms/STM32/hal_lld_f105_f107.h index 6fadbbd7f..2eba312c5 100644 --- a/os/hal/platforms/STM32/hal_lld_f105_f107.h +++ b/os/hal/platforms/STM32/hal_lld_f105_f107.h @@ -255,7 +255,7 @@ /* The following values are only used if PLL2 clock is selected as source
for the PLL clock */
-#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2)
+#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2) || defined(__DOXYGEN__)
/**
* @brief PLL2 input frequency. */
@@ -275,7 +275,6 @@ #if (STM32_PLL2CLKOUT < 40000000) || (STM32_PLL2CLKOUT > 74000000)
#error "STM32_PLL2CLKOUT outside acceptable range (40...74MHz)"
#endif
-
#endif /* STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2 */
/**
|