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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-03-22 13:39:26 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-03-22 13:39:26 +0000 |
| commit | 36f96c9fef7b5670dc9ab1c73c928d66b5bf4492 (patch) | |
| tree | b25fc89067a16c525df0b57e794134b14c061d2a /testhal | |
| parent | e72ad7fd5ff84ac96c646d93e140c47497cd1607 (diff) | |
| download | ChibiOS-36f96c9fef7b5670dc9ab1c73c928d66b5bf4492.tar.gz ChibiOS-36f96c9fef7b5670dc9ab1c73c928d66b5bf4492.tar.bz2 ChibiOS-36f96c9fef7b5670dc9ab1c73c928d66b5bf4492.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1771 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal')
| -rw-r--r-- | testhal/STM32/Makefile | 6 | ||||
| -rw-r--r-- | testhal/STM32/mcuconf.h | 44 |
2 files changed, 32 insertions, 18 deletions
diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile index c522668bf..ea7e5a03e 100644 --- a/testhal/STM32/Makefile +++ b/testhal/STM32/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk
include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk
include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/ports/GCC/ARMCM3/port.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk
include $(CHIBIOS)/test/test.mk
@@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here
ASMSRC = $(PORTASM) \
- $(CHIBIOS)/os/ports/GCC/ARMCM3/STM32F103/vectors.s
+ $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/vectors.s
INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \
@@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra #
# List all default C defines here, like -D_DEBUG=1
-DDEFS =
+DDEFS = -DSTM32F10X_MD
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index 71699aa30..ae6a7a125 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -25,28 +25,34 @@ * is enabled in halconf.h.
*
* IRQ priorities:
- * 0xF0 Lowest, priority level reserved for PENDSV.
- * 0xE0...0x40 Normal IRQs priority levels (0x80 used by SYSTICK).
- * 0x30 Used by SVCALL, do not share.
- * 0x20...0x00 Fast interrupts, can preempt the kernel but cannot use it.
+ * 15 Lowest, priority level reserved for PENDSV.
+ * 14...4 Normal IRQs priority levels (0x80 used by SYSTICK).
+ * 3 Used by SVCALL, do not share.
+ * 2...0 Fast interrupts, can preempt the kernel but cannot use it
+ * directly.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
/*
+ * HAL driver system settings.
+ */
+#define STM32_SYSCLK 72
+
+/*
* ADC driver system settings.
*/
#define USE_STM32_ADC1 TRUE
#define STM32_ADC1_DMA_PRIORITY 3
-#define STM32_ADC1_IRQ_PRIORITY 0x50
+#define STM32_ADC1_IRQ_PRIORITY CORTEX_PRIORITY(5)
#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()
/*
* CAN driver system settings.
*/
#define USE_STM32_CAN1 TRUE
-#define STM32_CAN1_IRQ_PRIORITY 0xB0
+#define STM32_CAN1_IRQ_PRIORITY CORTEX_PRIORITY(11)
/*
* PWM driver system settings.
@@ -55,10 +61,10 @@ #define USE_STM32_PWM2 FALSE
#define USE_STM32_PWM3 FALSE
#define USE_STM32_PWM4 FALSE
-#define STM32_PWM1_IRQ_PRIORITY 0x70
-#define STM32_PWM2_IRQ_PRIORITY 0x70
-#define STM32_PWM3_IRQ_PRIORITY 0x70
-#define STM32_PWM4_IRQ_PRIORITY 0x70
+#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7)
/*
* SERIAL driver system settings.
@@ -66,9 +72,17 @@ #define USE_STM32_USART1 FALSE
#define USE_STM32_USART2 TRUE
#define USE_STM32_USART3 FALSE
-#define STM32_USART1_PRIORITY 0xC0
-#define STM32_USART2_PRIORITY 0xC0
-#define STM32_USART3_PRIORITY 0xC0
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define USE_STM32_UART4 FALSE
+#define USE_STM32_UART5 FALSE
+#endif
+#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12)
+#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12)
+#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12)
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12)
+#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12)
+#endif
/*
* SPI driver system settings.
@@ -77,6 +91,6 @@ #define USE_STM32_SPI2 TRUE
#define STM32_SPI1_DMA_PRIORITY 2
#define STM32_SPI2_DMA_PRIORITY 2
-#define STM32_SPI1_IRQ_PRIORITY 0xA0
-#define STM32_SPI2_IRQ_PRIORITY 0xA0
+#define STM32_SPI1_IRQ_PRIORITY CORTEX_PRIORITY(10)
+#define STM32_SPI2_IRQ_PRIORITY CORTEX_PRIORITY(10)
#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()
|