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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-10 10:55:35 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-10 10:55:35 +0000 |
| commit | eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487 (patch) | |
| tree | b5b904addaa78253643b143f59848a5de48f3020 /testhal/STM32/multi | |
| parent | 85d08595ab2e14aa8e5fa682cbaf60f599c4245b (diff) | |
| download | ChibiOS-eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487.tar.gz ChibiOS-eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487.tar.bz2 ChibiOS-eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487.zip | |
STM32H7-related fixes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12017 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'testhal/STM32/multi')
3 files changed, 13 insertions, 19 deletions
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h index f8367413f..4efa25638 100644 --- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h @@ -85,8 +85,8 @@ #define STM32_PLL1_DIVN_VALUE 400
#define STM32_PLL1_FRACN_VALUE 0
#define STM32_PLL1_DIVP_VALUE 2
-#define STM32_PLL1_DIVQ_VALUE 8
-#define STM32_PLL1_DIVR_VALUE 8
+#define STM32_PLL1_DIVQ_VALUE 4
+#define STM32_PLL1_DIVR_VALUE 2
#define STM32_PLL2_ENABLED TRUE
#define STM32_PLL2_P_ENABLED TRUE
#define STM32_PLL2_Q_ENABLED TRUE
@@ -101,12 +101,12 @@ #define STM32_PLL3_P_ENABLED TRUE
#define STM32_PLL3_Q_ENABLED TRUE
#define STM32_PLL3_R_ENABLED TRUE
-#define STM32_PLL3_DIVM_VALUE 4
-#define STM32_PLL3_DIVN_VALUE 240
+#define STM32_PLL3_DIVM_VALUE 8
+#define STM32_PLL3_DIVN_VALUE 336
#define STM32_PLL3_FRACN_VALUE 0
-#define STM32_PLL3_DIVP_VALUE 10
-#define STM32_PLL3_DIVQ_VALUE 10
-#define STM32_PLL3_DIVR_VALUE 10
+#define STM32_PLL3_DIVP_VALUE 2
+#define STM32_PLL3_DIVQ_VALUE 7
+#define STM32_PLL3_DIVR_VALUE 2
/*
* Core clocks dynamic settings (can be changed at runtime).
@@ -115,11 +115,11 @@ #define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
-#define STM32_D1HPRE STM32_D1HPRE_DIV4
-#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
-#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
-#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
-#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
+#define STM32_D1HPRE STM32_D1HPRE_DIV2
+#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
+#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
+#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
+#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c index a44ed3079..d91c65d31 100644 --- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c @@ -51,12 +51,6 @@ void portab_setup(void) {
- /*
- * ARD_D13 is programmed as output (board LED).
- */
- palClearLine(LINE_ARD_D13);
- palSetLineMode(LINE_ARD_D13, PAL_MODE_OUTPUT_PUSHPULL);
-
}
/** @} */
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h index ed9d06c58..8aad513f0 100644 --- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h @@ -33,7 +33,7 @@ #define PORTAB_SDU1 SDU1
-#define PORTAB_BLINK_LED1 LINE_ARD_D13
+#define PORTAB_BLINK_LED1 LINE_LED1
/*===========================================================================*/
/* Module pre-compile time settings. */
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