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-rw-r--r--os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h16
-rw-r--r--os/hal/ports/STM32/STM32H7xx/hal_lld.c2
-rw-r--r--testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h24
-rw-r--r--testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c6
-rw-r--r--testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h2
5 files changed, 22 insertions, 28 deletions
diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h
index 8b8e39b7f..7ec858ee7 100644
--- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h
+++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h
@@ -243,14 +243,14 @@
#define STM32_USBCLK STM32_48CLK
#elif defined(STM32H7XX)
/* Defines directly STM32_USBCLK.*/
-#define rccEnableOTG_FS rccEnableUSB1_OTG_HS
-#define rccDisableOTG_FS rccDisableUSB1_OTG_HS
-#define rccResetOTG_FS rccResetUSB1_OTG_HS
-#define rccEnableOTG_HS rccEnableUSB2_OTG_HS
-#define rccDisableOTG_HS rccDisableUSB2_OTG_HS
-#define rccResetOTG_HS rccResetUSB2_OTG_HS
-#define rccEnableOTG_HSULPI rccEnableUSB2_HSULPI
-#define rccDisableOTG_HSULPI rccDisableUSB2_HSULPI
+#define rccEnableOTG_FS rccEnableUSB2_OTG_HS
+#define rccDisableOTG_FS rccDisableUSB2_OTG_HS
+#define rccResetOTG_FS rccResetUSB2_OTG_HS
+#define rccEnableOTG_HS rccEnableUSB1_OTG_HS
+#define rccDisableOTG_HS rccDisableUSB1_OTG_HS
+#define rccResetOTG_HS rccResetUSB1_OTG_HS
+#define rccEnableOTG_HSULPI rccEnableUSB1_HSULPI
+#define rccDisableOTG_HSULPI rccDisableUSB1_HSULPI
#else
#error "unsupported STM32 platform for OTG functionality"
#endif
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.c b/os/hal/ports/STM32/STM32H7xx/hal_lld.c
index bb79a429b..60ce00310 100644
--- a/os/hal/ports/STM32/STM32H7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.c
@@ -102,7 +102,7 @@ static inline void init_pwr(void) {
PWR->CR3 = STM32_PWR_CR3;
PWR->CPUCR = STM32_PWR_CPUCR;
PWR->D3CR = STM32_VOS;
- while ((PWR->CSR1 & PWR_CSR1_ACTVOS) == 0)
+ while ((PWR->D3CR & PWR_D3CR_VOSRDY) == 0)
;
#if STM32_PWR_CR2 & PWR_CR2_BREN
// while ((PWR->CR2 & PWR_CR2_BRRDY) == 0)
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h
index f8367413f..4efa25638 100644
--- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/mcuconf.h
@@ -85,8 +85,8 @@
#define STM32_PLL1_DIVN_VALUE 400
#define STM32_PLL1_FRACN_VALUE 0
#define STM32_PLL1_DIVP_VALUE 2
-#define STM32_PLL1_DIVQ_VALUE 8
-#define STM32_PLL1_DIVR_VALUE 8
+#define STM32_PLL1_DIVQ_VALUE 4
+#define STM32_PLL1_DIVR_VALUE 2
#define STM32_PLL2_ENABLED TRUE
#define STM32_PLL2_P_ENABLED TRUE
#define STM32_PLL2_Q_ENABLED TRUE
@@ -101,12 +101,12 @@
#define STM32_PLL3_P_ENABLED TRUE
#define STM32_PLL3_Q_ENABLED TRUE
#define STM32_PLL3_R_ENABLED TRUE
-#define STM32_PLL3_DIVM_VALUE 4
-#define STM32_PLL3_DIVN_VALUE 240
+#define STM32_PLL3_DIVM_VALUE 8
+#define STM32_PLL3_DIVN_VALUE 336
#define STM32_PLL3_FRACN_VALUE 0
-#define STM32_PLL3_DIVP_VALUE 10
-#define STM32_PLL3_DIVQ_VALUE 10
-#define STM32_PLL3_DIVR_VALUE 10
+#define STM32_PLL3_DIVP_VALUE 2
+#define STM32_PLL3_DIVQ_VALUE 7
+#define STM32_PLL3_DIVR_VALUE 2
/*
* Core clocks dynamic settings (can be changed at runtime).
@@ -115,11 +115,11 @@
#define STM32_SW STM32_SW_PLL1_P_CK
#define STM32_RTCSEL STM32_RTCSEL_LSE_CK
#define STM32_D1CPRE STM32_D1CPRE_DIV1
-#define STM32_D1HPRE STM32_D1HPRE_DIV4
-#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1
-#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1
-#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1
-#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1
+#define STM32_D1HPRE STM32_D1HPRE_DIV2
+#define STM32_D1PPRE3 STM32_D1PPRE3_DIV2
+#define STM32_D2PPRE1 STM32_D2PPRE1_DIV2
+#define STM32_D2PPRE2 STM32_D2PPRE2_DIV2
+#define STM32_D3PPRE4 STM32_D3PPRE4_DIV2
/*
* Peripherals clocks static settings.
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c
index a44ed3079..d91c65d31 100644
--- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c
+++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.c
@@ -51,12 +51,6 @@
void portab_setup(void) {
- /*
- * ARD_D13 is programmed as output (board LED).
- */
- palClearLine(LINE_ARD_D13);
- palSetLineMode(LINE_ARD_D13, PAL_MODE_OUTPUT_PUSHPULL);
-
}
/** @} */
diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h
index ed9d06c58..8aad513f0 100644
--- a/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h
+++ b/testhal/STM32/multi/USB_CDC/cfg/stm32h743_nucleo144/portab.h
@@ -33,7 +33,7 @@
#define PORTAB_SDU1 SDU1
-#define PORTAB_BLINK_LED1 LINE_ARD_D13
+#define PORTAB_BLINK_LED1 LINE_LED1
/*===========================================================================*/
/* Module pre-compile time settings. */