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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-05-28 13:11:05 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-05-28 13:11:05 +0000 |
| commit | e9c2b923593c2823ab61152fd4a2d23f7583aa1b (patch) | |
| tree | 41e4b3c2a7bed230b94b6c3db2d0481b5563f38b /testhal/STM32/STM32F7xx/PWM-ICU | |
| parent | 5b9c975a2d5253ecdea8e1341336d83d58ba7e75 (diff) | |
| download | ChibiOS-e9c2b923593c2823ab61152fd4a2d23f7583aa1b.tar.gz ChibiOS-e9c2b923593c2823ab61152fd4a2d23f7583aa1b.tar.bz2 ChibiOS-e9c2b923593c2823ab61152fd4a2d23f7583aa1b.zip | |
Fixed bug #835.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10209 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/STM32F7xx/PWM-ICU')
| -rw-r--r-- | testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h index 90fb60cff..dd3ebf8e6 100644 --- a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H
/*
- * STM32F4xx drivers configuration.
+ * STM32F7xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
@@ -60,7 +60,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
#define STM32_MCO2PRE STM32_MCO2PRE_DIV4
-#define STM32_I2SSRC STM32_I2SSRC_PLLI2S
+#define STM32_I2SSRC STM32_I2SSRC_OFF
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SP_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
@@ -69,9 +69,11 @@ #define STM32_PLLSAIP_VALUE 4
#define STM32_PLLSAIQ_VALUE 4
#define STM32_PLLSAIR_VALUE 4
-#define STM32_PLLSAIDIVR STM32_PLLSAIDIVR_OFF
+#define STM32_PLLSAIDIVQ_VALUE 2
+#define STM32_PLLSAIDIVR_VALUE 2
#define STM32_SAI1SEL STM32_SAI1SEL_OFF
#define STM32_SAI2SEL STM32_SAI2SEL_OFF
+#define STM32_LCDTFT_REQUIRED FALSE
#define STM32_USART1SEL STM32_USART1SEL_PCLK2
#define STM32_USART2SEL STM32_USART2SEL_PCLK1
#define STM32_USART3SEL STM32_USART3SEL_PCLK1
@@ -94,7 +96,7 @@ * ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1 TRUE
+#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_USE_ADC2 FALSE
#define STM32_ADC_USE_ADC3 FALSE
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
@@ -155,7 +157,7 @@ #define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
-#define STM32_GPT_USE_TIM4 TRUE
+#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
|