Fixed bug #835.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10209 35acf78f-673a-0410-8e92-d51de3d6d3f4

16 files changed, 243 insertions, 98 deletions

diff --git a/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h b/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h
index 648b99fb1..3b1f2128a 100644
--- a/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h
+++ b/demos/STM32/NIL-STM32F746G-DISCOVERY/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY-LWIP-FATFS-USB/mcuconf.h b/demos/STM32/RT-STM32F746G-DISCOVERY-LWIP-FATFS-USB/mcuconf.h
index b51c1a4d9..a897ed02f 100644
--- a/demos/STM32/RT-STM32F746G-DISCOVERY-LWIP-FATFS-USB/mcuconf.h
+++ b/demos/STM32/RT-STM32F746G-DISCOVERY-LWIP-FATFS-USB/mcuconf.h
@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/debug/RT-STM32F746G-DISCOVERY (OpenOCD, Flash and Run).launch b/demos/STM32/RT-STM32F746G-DISCOVERY/debug/RT-STM32F746G-DISCOVERY (OpenOCD, Flash and Run).launch
index 05650c142..4b21ba8fe 100644
--- a/demos/STM32/RT-STM32F746G-DISCOVERY/debug/RT-STM32F746G-DISCOVERY (OpenOCD, Flash and Run).launch
+++ b/demos/STM32/RT-STM32F746G-DISCOVERY/debug/RT-STM32F746G-DISCOVERY (OpenOCD, Flash and Run).launch
@@ -1,52 +1,52 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>

-<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">

-<stringAttribute key="bad_container_name" value="\RT-STM32F746G-DISCOVERY\debug"/>

-<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20&#13;&#10;monitor reset init&#13;&#10;monitor sleep 50&#13;&#10;"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>

-<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>

-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>

-<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>

-<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>

-<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>

-<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>

-<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>

-<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>

-<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>

-<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>

-<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>

-<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList/&gt;"/>

-<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>

-<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList&gt;&#13;&#10;&lt;memoryBlockExpressionItem&gt;&#13;&#10;&lt;expression text=&quot;0x0&quot;/&gt;&#13;&#10;&lt;/memoryBlockExpressionItem&gt;&#13;&#10;&lt;/memoryBlockExpressionList&gt;&#13;&#10;"/>

-<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>

-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-STM32F746G-DISCOVERY"/>

-<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>

-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.114656749"/>

-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">

-<listEntry value="/RT-STM32F746G-DISCOVERY"/>

-</listAttribute>

-<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">

-<listEntry value="4"/>

-</listAttribute>

-<listAttribute key="org.eclipse.debug.ui.favoriteGroups">

-<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>

-</listAttribute>

-</launchConfiguration>

+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
+<stringAttribute key="bad_container_name" value="\RT-STM32F746G-DISCOVERY\debug"/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20&#13;&#10;monitor reset init&#13;&#10;monitor sleep 50&#13;&#10;"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
+<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
+<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList/&gt;"/>
+<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;globalVariableList/&gt;&#10;"/>
+<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#10;&lt;memoryBlockExpressionList&gt;&#10;&lt;memoryBlockExpressionItem&gt;&#10;&lt;expression text=&quot;0x0&quot;/&gt;&#10;&lt;/memoryBlockExpressionItem&gt;&#10;&lt;/memoryBlockExpressionList&gt;&#10;"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-STM32F746G-DISCOVERY"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.114656749"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/RT-STM32F746G-DISCOVERY"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
+</listAttribute>
+</launchConfiguration>
diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h
index 24e564eb4..3b1f2128a 100644
--- a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h
+++ b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h
@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h
index e92de86b9..83df28692 100644
--- a/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h
+++ b/demos/STM32/RT-STM32F746ZG-NUCLEO144/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32Fxx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h
index 53feeeaff..83df28692 100644
--- a/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h
+++ b/demos/STM32/RT-STM32F767ZI-NUCLEO144/mcuconf.h
@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

@@ -113,8 +115,10 @@
  */

 #define STM32_CAN_USE_CAN1                  FALSE

 #define STM32_CAN_USE_CAN2                  FALSE

+#define STM32_CAN_USE_CAN3                  FALSE

 #define STM32_CAN_CAN1_IRQ_PRIORITY         11

 #define STM32_CAN_CAN2_IRQ_PRIORITY         11

+#define STM32_CAN_CAN3_IRQ_PRIORITY         11

 

 /*

  * DAC driver system settings.

diff --git a/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h
index f8dd3e1fe..3b1f2128a 100644
--- a/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h
+++ b/demos/STM32/RT-STM32F769I-DISCOVERY/mcuconf.h
@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

@@ -113,8 +115,10 @@
  */

 #define STM32_CAN_USE_CAN1                  FALSE

 #define STM32_CAN_USE_CAN2                  FALSE

+#define STM32_CAN_USE_CAN3                  FALSE

 #define STM32_CAN_CAN1_IRQ_PRIORITY         11

 #define STM32_CAN_CAN2_IRQ_PRIORITY         11

+#define STM32_CAN_CAN3_IRQ_PRIORITY         11

 

 /*

  * DAC driver system settings.

diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
index bf2366bd0..8dbf62a0d 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
@@ -262,16 +262,13 @@ void stm32_clock_init(void) {
   /* DCKCFGR1 register initialization, note, must take care of the _OFF

      pseudo settings.*/

   {

-    uint32_t dckcfgr1 = 0;

+    uint32_t dckcfgr1 = STM32_PLLI2SDIVQ | STM32_PLLSAIDIVQ | STM32_PLLSAIDIVR;

 #if STM32_SAI2SEL != STM32_SAI2SEL_OFF

     dckcfgr1 |= STM32_SAI2SEL;

 #endif

 #if STM32_SAI1SEL != STM32_SAI1SEL_OFF

     dckcfgr1 |= STM32_SAI1SEL;

 #endif

-#if STM32_PLLSAIDIVR != STM32_PLLSAIDIVR_OFF

-    dckcfgr1 |= STM32_PLLSAIDIVR;

-#endif

     RCC->DCKCFGR1 = dckcfgr1;

   }

 

diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h
index 207179479..a77be0f2c 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h
@@ -263,6 +263,7 @@
 #define STM32_I2SSRC_MASK       (1 << 23)   /**< I2CSRC mask.               */

 #define STM32_I2SSRC_PLLI2S     (0 << 23)   /**< I2SSRC is PLLI2S.          */

 #define STM32_I2SSRC_CKIN       (1 << 23)   /**< I2S_CKIN is PLLI2S.        */

+#define STM32_I2SSRC_OFF        (1 << 23)   /**< ISS clock not required.    */

 

 #define STM32_MCO1PRE_MASK      (7 << 24)   /**< MCO1PRE mask.              */

 #define STM32_MCO1PRE_DIV1      (0 << 24)   /**< MCO1 divided by 1.         */

@@ -301,7 +302,6 @@
 #define STM32_PLLSAIDIVR_DIV4   (1 << 16)   /**< LCD_CLK is R divided by 4. */

 #define STM32_PLLSAIDIVR_DIV8   (2 << 16)   /**< LCD_CLK is R divided by 8. */

 #define STM32_PLLSAIDIVR_DIV16  (3 << 16)   /**< LCD_CLK is R divided by 16.*/

-#define STM32_PLLSAIDIVR_OFF    0xFFFFFFFFU /**< LCD CLK is not required.   */

 

 #define STM32_SAI1SEL_MASK      (3 << 20)   /**< SAI1SEL mask.              */

 #define STM32_SAI1SEL_SAIPLL    (0 << 20)   /**< SAI1 source is SAIPLL.     */

@@ -659,6 +659,13 @@
 #endif

 

 /**

+ * @brief   PLLI2SDIVQ divider value (SAI clock divider).

+ */

+#if !defined(STM32_PLLI2SDIVQ_VALUE) || defined(__DOXYGEN__)

+#define STM32_PLLI2SDIVQ_VALUE              2

+#endif

+

+/**

  * @brief   PLLI2SR divider value.

  * @note    The allowed values are 2..7.

  */

@@ -699,10 +706,17 @@
 #endif

 

 /**

+ * @brief   PLLSAIDIVQ divider value (SAI clock divider).

+ */

+#if !defined(STM32_PLLSAIDIVQ_VALUE) || defined(__DOXYGEN__)

+#define STM32_PLLSAIDIVQ_VALUE              2

+#endif

+

+/**

  * @brief   PLLSAIDIVR divider value (LCD clock divider).

  */

-#if !defined(STM32_PLLSAIDIVR) || defined(__DOXYGEN__)

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#if !defined(STM32_PLLSAIDIVR_VALUE) || defined(__DOXYGEN__)

+#define STM32_PLLSAIDIVR_VALUE              2

 #endif

 

 /**

@@ -720,6 +734,13 @@
 #endif

 

 /**

+ * @brief   LCD-TFT clock enable switch.

+ */

+#if !defined(STM32_LCDTFT_REQUIRED) || defined(__DOXYGEN__)

+#define STM32_LCDTFT_REQUIRED               FALSE

+#endif

+

+/**

  * @brief   USART1 clock source.

  */

 #if !defined(STM32_USART1SEL) || defined(__DOXYGEN__)

@@ -945,9 +966,9 @@
 #error "HSI not enabled, required by STM32_SAI2SEL"

 #endif

 

-#if (STM32_PLLSAIDIVR != STM32_PLLSAIDIVR_OFF) &&                           \

+#if STM32_LCDTFT_REQUIRED &&                                                \

     (STM32_PLLSRC == STM32_PLLSRC_HSI)

-#error "HSI not enabled, required by STM32_PLLSAIDIVR"

+#error "HSI not enabled, required by STM32_LCDTFT_REQUIRED"

 #endif

 

 #endif /* !STM32_HSI_ENABLED */

@@ -1009,9 +1030,9 @@
 #error "HSE not enabled, required by STM32_SAI2SEL"

 #endif

 

-#if (STM32_PLLSAIDIVR != STM32_PLLSAIDIVR_OFF) &&                           \

+#if STM32_LCDTFT_REQUIRED &&                                                \

     (STM32_PLLSRC == STM32_PLLSRC_HSE)

-#error "HSE not enabled, required by STM32_PLLSAIDIVR"

+#error "HSE not enabled, required by STM32_LCDTFT_REQUIRED"

 #endif

 

 #if STM32_RTCSEL == STM32_RTCSEL_HSEDIV

@@ -1404,11 +1425,24 @@
  */

 #define STM32_PLLI2S_R_CLKOUT       (STM32_PLLI2SVCO / STM32_PLLI2SR_VALUE)

 

+/**

+ * @brief   STM32_PLLI2SDIVQ field.

+ */

+#if (STM32_PLLI2SDIVQ_VALUE < 1) || (STM32_PLLI2SDIVQ_VALUE > 32)

+#error "STM32_PLLI2SDIVQ_VALUE out of acceptable range"

+#endif

+#define STM32_PLLI2SDIVQ            (STM32_PLLI2SDIVQ_VALUE << 0)

+

+/**

+ * @brief   PLLI2S Q output clock frequency after divisor.

+ */

+#define STM32_PLLI2SDIVQ_CLKOUT     (STM32_PLLI2S_Q_CLKOUT / STM32_PLLI2SDIVQ_VALUE)

+

 /*

  * PLLSAI enable check.

  */

 #if (STM32_CLOCK48_REQUIRED && (STM32_CK48MSEL == STM32_CK48MSEL_PLLSAI)) | \

-    (STM32_PLLSAIDIVR != STM32_PLLSAIDIVR_OFF) ||                           \

+    STM32_LCDTFT_REQUIRED ||                                                \

     (STM32_SAI1SEL == STM32_SAI1SEL_SAIPLL) ||                              \

     (STM32_SAI2SEL == STM32_SAI2SEL_SAIPLL) ||                              \

     defined(__DOXYGEN__)

@@ -1498,6 +1532,43 @@
 #define STM32_PLLSAI_R_CLKOUT       (STM32_PLLSAIVCO / STM32_PLLSAIR_VALUE)

 

 /**

+ * @brief   STM32_PLLSAIDIVQ field.

+ */

+#if (STM32_PLLSAIDIVQ_VALUE < 1) || (STM32_PLLSAIDIVQ_VALUE > 32)

+#error "STM32_PLLSAIDIVQ_VALUE out of acceptable range"

+#endif

+#define STM32_PLLSAIDIVQ            (STM32_PLLSAIDIVQ_VALUE << 8)

+

+/**

+ * @brief   PLLSAI Q output clock frequency after divisor.

+ */

+#define STM32_PLLSAIDIVQ_CLKOUT     (STM32_PLLSAI_Q_CLKOUT / STM32_PLLSAIDIVQ_VALUE)

+

+/*

+ * STM32_PLLSAIDIVR field.

+ */

+#if (STM32_PLLSAIDIVR_VALUE == 2) || defined(__DOXYGEN__)

+#define STM32_PLLSAIDIVR            (0 << 16)

+

+#elif STM32_PLLSAIDIVR_VALUE == 4

+#define STM32_PLLSAIDIVR            (1 << 16)

+

+#elif STM32_PLLSAIDIVR_VALUE == 8

+#define STM32_PLLSAIDIVR            (2 << 16)

+

+#elif STM32_PLLSAIDIVR_VALUE == 16

+#define STM32_PLLSAIDIVR            (3 << 16)

+

+#else

+#error "invalid STM32_PLLSAIDIVR_VALUE value specified"

+#endif

+

+/**

+ * @brief   PLLSAI R output clock frequency after divisor.

+ */

+#define STM32_PLLSAIDIVR_CLKOUT       (STM32_PLLSAI_R_CLKOUT / STM32_PLLSAIDIVR_VALUE)

+

+/**

  * @brief   MCO1 divider clock.

  */

 #if (STM32_MCO1SEL == STM32_MCO1SEL_HSI) || defined(__DOXYGEN__)

@@ -1821,6 +1892,49 @@
 #endif /* !STM32_CLOCK48_REQUIRED */

 

 /**

+ * @brief   I2S frequency.

+ */

+#if (STM32_I2SSRC == STM32_I2SSRC_OFF) || defined(__DOXYGEN__)

+#define STM32_I2SCLK                0

+#elif STM32_I2SSRC == STM32_I2SSRC_CKIN

+#define STM32_I2SCLK                0 /* Unknown, would require a board value */

+#elif STM32_I2SSRC == STM32_I2SSRC_PLLI2S

+#define STM32_I2SCLK                STM32_PLLI2S_R_CLKOUT

+#else

+#error "invalid source selected for I2S clock"

+#endif

+

+/**

+ * @brief   SAI1 frequency.

+ */

+#if (STM32_SAI1SEL == STM32_SAI1SEL_OFF) || defined(__DOXYGEN__)

+#define STM32_SAI1CLK               0

+#elif STM32_SAI1SEL == STM32_SAI1SEL_SAIPLL

+#define STM32_SAI1SEL               STM32_PLLSAIDIVQ_CLKOUT

+#elif STM32_SAI1SEL == STM32_SAI1SEL_I2SPLL

+#define STM32_SAI1SEL               STM32_PLLI2SDIVQ_CLKOUT

+#elif STM32_SAI1SEL == STM32_SAI1SEL_CKIN

+#define STM32_SAI1SEL               0 /* Unknown, would require a board value */

+#else

+#error "invalid source selected for SAI1 clock"

+#endif

+

+/**

+ * @brief   SAI2 frequency.

+ */

+#if (STM32_SAI2SEL == STM32_SAI2SEL_OFF) || defined(__DOXYGEN__)

+#define STM32_SAI2CLK               0

+#elif STM32_SAI2SEL == STM32_SAI2SEL_SAIPLL

+#define STM32_SAI2SEL               STM32_PLLSAIDIVQ_CLKOUT

+#elif STM32_SAI2SEL == STM32_SAI2SEL_I2SPLL

+#define STM32_SAI2SEL               STM32_PLLI2SDIVQ_CLKOUT

+#elif STM32_SAI2SEL == STM32_SAI2SEL_CKIN

+#define STM32_SAI2SEL               0 /* Unknown, would require a board value */

+#else

+#error "invalid source selected for SAI2 clock"

+#endif

+

+/**

  * @brief   SDMMC frequency.

  */

 #if (STM32_SDMMCSEL == STM32_SDMMCSEL_PLL48CLK) || defined(__DOXYGEN__)

diff --git a/readme.txt b/readme.txt
index 7d4122ecc..68e86eed5 100644
--- a/readme.txt
+++ b/readme.txt
@@ -167,6 +167,7 @@
        to 16.1.9).

 - HAL: Fixed issue with not supported LIN on STM32F070xB (bug #837)(backported

        to 16.1.9).

+- HAL: fixed missing DCKFG1 fields (bug #835).

 - HAL: Fixed STM32 OTGv1 number of endpoints (bug #833)(backported to 16.1.8).

 - HAL: Fixed transaction end problem with STM32 OTGv1 driver (bug #832)

        (backported to 16.1.8).

diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h
index 06ee27313..6eeb93bcb 100644
--- a/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h
+++ b/testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h b/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h
index 065719f06..8b25dc014 100644
--- a/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

@@ -183,6 +185,7 @@
 #define STM32_I2C_USE_I2C1                  FALSE

 #define STM32_I2C_USE_I2C2                  FALSE

 #define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_USE_I2C4                  FALSE

 #define STM32_I2C_BUSY_TIMEOUT              50

 #define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

 #define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

@@ -190,12 +193,16 @@
 #define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

 #define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

 #define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C4_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C4_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

 #define STM32_I2C_I2C1_IRQ_PRIORITY         5

 #define STM32_I2C_I2C2_IRQ_PRIORITY         5

 #define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C4_IRQ_PRIORITY         5

 #define STM32_I2C_I2C1_DMA_PRIORITY         3

 #define STM32_I2C_I2C2_DMA_PRIORITY         3

 #define STM32_I2C_I2C3_DMA_PRIORITY         3

+#define STM32_I2C_I2C4_DMA_PRIORITY         3

 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

 

 /*

diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h
index 90fb60cff..dd3ebf8e6 100644
--- a/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

@@ -94,7 +96,7 @@
  * ADC driver system settings.

  */

 #define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4

-#define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_USE_ADC1                  FALSE

 #define STM32_ADC_USE_ADC2                  FALSE

 #define STM32_ADC_USE_ADC3                  FALSE

 #define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)

@@ -155,7 +157,7 @@
 #define STM32_GPT_USE_TIM1                  FALSE

 #define STM32_GPT_USE_TIM2                  FALSE

 #define STM32_GPT_USE_TIM3                  FALSE

-#define STM32_GPT_USE_TIM4                  TRUE

+#define STM32_GPT_USE_TIM4                  FALSE

 #define STM32_GPT_USE_TIM5                  FALSE

 #define STM32_GPT_USE_TIM6                  FALSE

 #define STM32_GPT_USE_TIM7                  FALSE

diff --git a/testhal/STM32/STM32F7xx/SPI/mcuconf.h b/testhal/STM32/STM32F7xx/SPI/mcuconf.h
index 7b23aed48..295196690 100644
--- a/testhal/STM32/STM32F7xx/SPI/mcuconf.h
+++ b/testhal/STM32/STM32F7xx/SPI/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h b/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h
index 6fb3bd0d6..ab94b0003 100644
--- a/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h
+++ b/testhal/STM32/STM32F7xx/USB_CDC/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1

diff --git a/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h b/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h
index 6fb3bd0d6..ab94b0003 100644
--- a/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h
+++ b/testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h
@@ -18,7 +18,7 @@
 #define MCUCONF_H

 

 /*

- * STM32F4xx drivers configuration.

+ * STM32F7xx drivers configuration.

  * The following settings override the default settings present in

  * the various device driver implementation headers.

  * Note that the settings for each driver only have effect if the whole

@@ -60,7 +60,7 @@
 #define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

 #define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

 #define STM32_MCO2PRE                       STM32_MCO2PRE_DIV4

-#define STM32_I2SSRC                        STM32_I2SSRC_PLLI2S

+#define STM32_I2SSRC                        STM32_I2SSRC_OFF

 #define STM32_PLLI2SN_VALUE                 192

 #define STM32_PLLI2SP_VALUE                 4

 #define STM32_PLLI2SQ_VALUE                 4

@@ -69,9 +69,11 @@
 #define STM32_PLLSAIP_VALUE                 4

 #define STM32_PLLSAIQ_VALUE                 4

 #define STM32_PLLSAIR_VALUE                 4

-#define STM32_PLLSAIDIVR                    STM32_PLLSAIDIVR_OFF

+#define STM32_PLLSAIDIVQ_VALUE              2

+#define STM32_PLLSAIDIVR_VALUE              2

 #define STM32_SAI1SEL                       STM32_SAI1SEL_OFF

 #define STM32_SAI2SEL                       STM32_SAI2SEL_OFF

+#define STM32_LCDTFT_REQUIRED               FALSE

 #define STM32_USART1SEL                     STM32_USART1SEL_PCLK2

 #define STM32_USART2SEL                     STM32_USART2SEL_PCLK1

 #define STM32_USART3SEL                     STM32_USART3SEL_PCLK1