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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-26 12:42:52 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-08-26 12:42:52 +0000 |
| commit | 3a5c3788fa9bc4b900926daceb86ad525fb28df4 (patch) | |
| tree | adb236285dd3d339a28ec5c37f6b73226f3350ff /testhal/STM32/STM32F7xx/GPT-ADC/main.c | |
| parent | 95229524a642ae2cfe7f19b79a82f3e8a274b3a3 (diff) | |
| download | ChibiOS-3a5c3788fa9bc4b900926daceb86ad525fb28df4.tar.gz ChibiOS-3a5c3788fa9bc4b900926daceb86ad525fb28df4.tar.bz2 ChibiOS-3a5c3788fa9bc4b900926daceb86ad525fb28df4.zip | |
Added cache handling example for F7 ADC and SPI demos.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8243 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/STM32F7xx/GPT-ADC/main.c')
| -rw-r--r-- | testhal/STM32/STM32F7xx/GPT-ADC/main.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/main.c b/testhal/STM32/STM32F7xx/GPT-ADC/main.c index 1f65197c3..4e1b27520 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/main.c +++ b/testhal/STM32/STM32F7xx/GPT-ADC/main.c @@ -38,6 +38,12 @@ static const GPTConfig gpt4cfg1 = { #define ADC_GRP1_NUM_CHANNELS 2
#define ADC_GRP1_BUF_DEPTH 64
+/* Note, the buffer is aligned to a 32 bytes boundary because limitations
+ imposed by the data cache. Note, this is GNU specific, it must be
+ handled differently for other compilers.*/
+#if defined(__GNUC__)
+__attribute__((aligned (32)))
+#endif
static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
/*
@@ -46,7 +52,8 @@ static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; size_t nx = 0, ny = 0;
static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
- (void)adcp;
+ /* DMA buffer invalidation because data cache.*/
+ dmaBufferInvalidate(buffer, buffer + (n * adcp->grpp->num_channels));
/* Updating counters.*/
if (samples1 == buffer) {
|