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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-12-11 08:54:40 +0000 |
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| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-12-11 08:54:40 +0000 |
| commit | 27b7c4ec048316bfc1ec82638ddc6ecb412fffe0 (patch) | |
| tree | e0b5192e18a71caf4ca4fb88ee98e2b12f1a729d /readme.txt | |
| parent | 6f0b15aba33406fb080b6dcee17367a4c2882401 (diff) | |
| download | ChibiOS-27b7c4ec048316bfc1ec82638ddc6ecb412fffe0.tar.gz ChibiOS-27b7c4ec048316bfc1ec82638ddc6ecb412fffe0.tar.bz2 ChibiOS-27b7c4ec048316bfc1ec82638ddc6ecb412fffe0.zip | |
Implemented CR on the STM32 ADC driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2467 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'readme.txt')
| -rw-r--r-- | readme.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/readme.txt b/readme.txt index 07f437938..15fffdc91 100644 --- a/readme.txt +++ b/readme.txt @@ -68,6 +68,10 @@ - NEW: Now the STM32 CAN driver puts the lower half word of the ESR
register in the upper half word of the can status word for easier
debug.
+- CHANGE: Modified the start of the ADC in the STM32 ADC driver, now it is
+ no more required to specify ADC_CR2_EXTSEL_SWSTART in the CR2 register
+ configuration. Also reordered the start sequence in order to allows a
+ longer stabilization time for the ADC.
*** 2.1.5 ***
- FIX: Fixed references to non-existing SSP1 device in LPC13xx SPI device
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