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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-07-23 10:22:14 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-07-23 10:22:14 +0000 |
| commit | 65961139301315ba0507a07c607e961b1c40a5ae (patch) | |
| tree | 90d9f56710d79c1be78956a460ad704c9ba136b6 /ports | |
| parent | 2a249f7ff91bbd62586334fee29e6a288859f421 (diff) | |
| download | ChibiOS-65961139301315ba0507a07c607e961b1c40a5ae.tar.gz ChibiOS-65961139301315ba0507a07c607e961b1c40a5ae.tar.bz2 ChibiOS-65961139301315ba0507a07c607e961b1c40a5ae.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@348 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'ports')
| -rw-r--r-- | ports/ARMCM3/chcore.c | 15 | ||||
| -rw-r--r-- | ports/ARMCM3/chcore.h | 12 |
2 files changed, 16 insertions, 11 deletions
diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c index aac58f9e6..c09de270c 100644 --- a/ports/ARMCM3/chcore.c +++ b/ports/ARMCM3/chcore.c @@ -132,18 +132,19 @@ void PendSVVector(void) { chSysUnlock(); asm volatile ("pop {pc}"); } + asm volatile ("pop {lr}"); - asm volatile ("pop {lr} \n\t" \ - "movs r3, #0 \n\t" \ - "mrs %0, PSP" : "=r" (sp_thd) : ); + register uint32_t tmp asm ("r3") = BASEPRI_USER; #ifdef CH_CURRP_REGISTER_CACHE - asm volatile ("stmdb %0!, {r3-r6,r8-r11, lr}" : + asm volatile ("mrs %0, PSP \n\t" \ + "stmdb %0!, {r3-r6,r8-r11, lr}" : "=r" (sp_thd) : - "r" (sp_thd)); + "r" (sp_thd), "r" (tmp)); #else - asm volatile ("stmdb %0!, {r3-r11,lr}" : + asm volatile ("mrs %0, PSP \n\t" \ + "stmdb %0!, {r3-r11,lr}" : "=r" (sp_thd) : - "r" (sp_thd)); + "r" (sp_thd), "r" (tmp)); #endif (otp = currp)->p_ctx.r13 = sp_thd; diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h index 3136f0d36..140775280 100644 --- a/ports/ARMCM3/chcore.h +++ b/ports/ARMCM3/chcore.h @@ -25,6 +25,12 @@ typedef void *regarm; /* + * Port-related configuration parameters. + */ +#define BASEPRI_USER 0 /* User level BASEPRI, 0 = disabled. */ +#define BASEPRI_KERNEL 0x10 /* BASEPRI level within kernel lock. */ + +/* * Interrupt saved context, empty in this architecture. */ struct extctx { @@ -83,13 +89,11 @@ typedef struct { } #define chSysLock() { \ - register uint32_t tmp asm ("r3"); \ - asm volatile ("movs %0, #0x10" : "=r" (tmp): ); \ + register uint32_t tmp asm ("r3") = BASEPRI_KERNEL; \ asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \ } #define chSysUnlock() { \ - register uint32_t tmp asm ("r3"); \ - asm volatile ("movs %0, #0" : "=r" (tmp): ); \ + register uint32_t tmp asm ("r3") = BASEPRI_USER; \ asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \ } #define chSysSwitchI(otp, ntp) { \ |