diff options
| -rw-r--r-- | demos/ARMCM3-STM32F103-GCC/board.h | 2 | ||||
| -rw-r--r-- | ports/ARMCM3/chcore.c | 15 | ||||
| -rw-r--r-- | ports/ARMCM3/chcore.h | 12 | ||||
| -rw-r--r-- | readme.txt | 1 |
4 files changed, 18 insertions, 12 deletions
diff --git a/demos/ARMCM3-STM32F103-GCC/board.h b/demos/ARMCM3-STM32F103-GCC/board.h index a1a0080ef..3f7953d5b 100644 --- a/demos/ARMCM3-STM32F103-GCC/board.h +++ b/demos/ARMCM3-STM32F103-GCC/board.h @@ -31,7 +31,7 @@ /*
* Uncomment this if you want a 48MHz system clock, else it will be 72MHz.
*/
-//#define SYSCLK_48
+#define SYSCLK_48
/*
* NOTES: PLLPRE can be 1 or 2, PLLMUL can be 2..16.
diff --git a/ports/ARMCM3/chcore.c b/ports/ARMCM3/chcore.c index aac58f9e6..c09de270c 100644 --- a/ports/ARMCM3/chcore.c +++ b/ports/ARMCM3/chcore.c @@ -132,18 +132,19 @@ void PendSVVector(void) { chSysUnlock(); asm volatile ("pop {pc}"); } + asm volatile ("pop {lr}"); - asm volatile ("pop {lr} \n\t" \ - "movs r3, #0 \n\t" \ - "mrs %0, PSP" : "=r" (sp_thd) : ); + register uint32_t tmp asm ("r3") = BASEPRI_USER; #ifdef CH_CURRP_REGISTER_CACHE - asm volatile ("stmdb %0!, {r3-r6,r8-r11, lr}" : + asm volatile ("mrs %0, PSP \n\t" \ + "stmdb %0!, {r3-r6,r8-r11, lr}" : "=r" (sp_thd) : - "r" (sp_thd)); + "r" (sp_thd), "r" (tmp)); #else - asm volatile ("stmdb %0!, {r3-r11,lr}" : + asm volatile ("mrs %0, PSP \n\t" \ + "stmdb %0!, {r3-r11,lr}" : "=r" (sp_thd) : - "r" (sp_thd)); + "r" (sp_thd), "r" (tmp)); #endif (otp = currp)->p_ctx.r13 = sp_thd; diff --git a/ports/ARMCM3/chcore.h b/ports/ARMCM3/chcore.h index 3136f0d36..140775280 100644 --- a/ports/ARMCM3/chcore.h +++ b/ports/ARMCM3/chcore.h @@ -25,6 +25,12 @@ typedef void *regarm; /* + * Port-related configuration parameters. + */ +#define BASEPRI_USER 0 /* User level BASEPRI, 0 = disabled. */ +#define BASEPRI_KERNEL 0x10 /* BASEPRI level within kernel lock. */ + +/* * Interrupt saved context, empty in this architecture. */ struct extctx { @@ -83,13 +89,11 @@ typedef struct { } #define chSysLock() { \ - register uint32_t tmp asm ("r3"); \ - asm volatile ("movs %0, #0x10" : "=r" (tmp): ); \ + register uint32_t tmp asm ("r3") = BASEPRI_KERNEL; \ asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \ } #define chSysUnlock() { \ - register uint32_t tmp asm ("r3"); \ - asm volatile ("movs %0, #0" : "=r" (tmp): ); \ + register uint32_t tmp asm ("r3") = BASEPRI_USER; \ asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \ } #define chSysSwitchI(otp, ntp) { \ diff --git a/readme.txt b/readme.txt index e6371dbee..3040e095a 100644 --- a/readme.txt +++ b/readme.txt @@ -79,6 +79,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process, problems when the CH_USE_MESSAGES_PRIORITY was enabled, this option is
disabled by default in ChibiOS/RT so it should not affect any user.
- Merged the documentation fixes submitted by Leon Woestenberg (thank you).
+- Made the default BASEPRI levels (CM3 port) configurable into chcore.h.
*** 0.6.7 ***
- NEW: New chThdCreateFast() API, it is a simplified form of chThdCreate()
|