git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@750 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 13 insertions, 4 deletions

diff --git a/ports/ARMCM3/crt0.s b/ports/ARMCM3/crt0.s
index 18c987f18..c98898646 100644
--- a/ports/ARMCM3/crt0.s
+++ b/ports/ARMCM3/crt0.s
@@ -86,11 +86,20 @@ bloop:
         isb
         /* Late initialization. */
         bl      hwinit1
-        /* main(0, NULL). */
         movs    r0, #0
         mov     r1, r0
         bl      main
-        bl      port_halt
+        b       MainExitHandler
+
+/*
+ * Default main exit code, just a loop.
+ * It is a weak symbol, the application code can redefine the behavior.
+ */
+.thumb_func
+.global MainExitHandler
+.weak MainExitHandler
+MainExitHandler:
+.loop:  b       .loop
 
 /*
  * Default early initialization code. It is declared weak in order to be
diff --git a/ports/ARMCM3/port.dox b/ports/ARMCM3/port.dox
index e5ba84973..ba4111aed 100644
--- a/ports/ARMCM3/port.dox
+++ b/ports/ARMCM3/port.dox
@@ -83,7 +83,7 @@
  *   Usually there is no need to change this value, please refer to the

  *   Cortex-M3 technical reference manual for a detailed description.

  * - @p BASEPRI_KERNEL, this is the @p BASEPRI value for the kernel lock code.

- *   The default value is 0x10.<br>

+ *   The default value is 0x40.<br>

  *   Code running at higher priority levels must not invoke any OS API.<br>

  *   Usually there is no need to change this value, please refer to the

  *   Cortex-M3 technical reference manual for a detailed description.

@@ -110,6 +110,6 @@
  * @{

  * @brief ARM Cortex-M3 NVIC support.

  *

- * @ingroup ARMCM3_CORE

+ * @ingroup ARMCM3

  */

 /** @} */