git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@750 35acf78f-673a-0410-8e92-d51de3d6d3f4

6 files changed, 132 insertions, 46 deletions

diff --git a/ports/ARM7-AT91SAM7X/vectors.s b/ports/ARM7-AT91SAM7X/vectors.s
index be5a0ccf4..a16fa252d 100644
--- a/ports/ARM7-AT91SAM7X/vectors.s
+++ b/ports/ARM7-AT91SAM7X/vectors.s
@@ -34,7 +34,7 @@ _start:
         ldr     pc, [pc,#-0xF20]        /* AIC - AIC_FVR */

 

 _reset:

-        .word   ResetHandler

+        .word   ResetHandler            /* In crt0.s */

 _undefined:

         .word   UndHandler

 _swi:

@@ -46,3 +46,26 @@ _abort:
         .word   0

         .word   0

         .word   0

+

+.text

+.code 32

+.balign 4

+

+/*

+ * Default exceptions handlers. The handlers are declared weak in order to be

+ * replaced by the real handling code. Everything is defaulted to an infinite

+ * loop.

+ */

+.weak UndHandler

+UndHandler:

+

+.weak SwiHandler

+SwiHandler:

+

+.weak PrefetchHandler

+PrefetchHandler:

+

+.weak AbortHandler

+AbortHandler:

+

+.loop:  b       .loop

diff --git a/ports/ARM7-LPC214x/vectors.s b/ports/ARM7-LPC214x/vectors.s
index 59bc99d2c..016a2f1de 100644
--- a/ports/ARM7-LPC214x/vectors.s
+++ b/ports/ARM7-LPC214x/vectors.s
@@ -34,7 +34,7 @@ _start:
         ldr     pc, _fiq

 

 _reset:

-        .word   ResetHandler

+        .word   ResetHandler            /* In crt0.s */

 _undefined:

         .word   UndHandler

 _swi:

@@ -47,3 +47,25 @@ _fiq:
         .word   FiqHandler

         .word   0

         .word   0

+

+/*

+ * Default exceptions handlers. The handlers are declared weak in order to be

+ * replaced by the real handling code. Everything is defaulted to an infinite

+ * loop.

+ */

+.weak UndHandler

+UndHandler:

+

+.weak SwiHandler

+SwiHandler:

+

+.weak PrefetchHandler

+PrefetchHandler:

+

+.weak AbortHandler

+AbortHandler:

+

+.weak FiqHandler

+FiqHandler:

+

+.loop:  b       .loop

diff --git a/ports/ARM7/crt0.s b/ports/ARM7/crt0.s
index d066ee478..91d07935b 100644
--- a/ports/ARM7/crt0.s
+++ b/ports/ARM7/crt0.s
@@ -119,56 +119,33 @@ bssloop:
         /*

          * Late initialization.

          */

-#ifndef THUMB_NO_INTERWORKING

+#ifdef THUMB_NO_INTERWORKING

+        add     r0, pc, #1

+        bx      r0

+.code 16

         bl      hwinit1

-        /*

-         * main(0, NULL).

-         */

         mov     r0, #0

         mov     r1, r0

         bl      main

-        bl      port_halt

+        ldr     r1, =MainExitHandler

+        bx      r1

+.code 32

 #else

-        add     r0, pc, #1

-        bx      r0

-.code 16

         bl      hwinit1

         mov     r0, #0

         mov     r1, r0

         bl      main

-        bl      port_halt

-.code 32

+        b       MainExitHandler

 #endif

 

 /*

- * Default exceptions handlers. The handlers are declared weak in order to be

- * replaced by the real handling code.

+ * Default main function exit handler.

  */

-.weak UndHandler

-.globl UndHandler

-UndHandler:

-

-.weak SwiHandler

-.globl SwiHandler

-SwiHandler:

-

-.weak PrefetchHandler

-.globl PrefetchHandler

-PrefetchHandler:

-

-.weak AbortHandler

-.globl AbortHandler

-AbortHandler:

-

-.weak FiqHandler

-.globl FiqHandler

-FiqHandler:

+.weak MainExitHandler

+.globl MainExitHandler

+MainExitHandler:

 

-.loop: b        .loop

-

-#ifdef THUMB_NO_INTERWORKING

-.code 16

-#endif

+.loop:  b       .loop

 

 /*

  * Default early initialization code. It is declared weak in order to be

@@ -176,11 +153,14 @@ FiqHandler:
  * Early initialization is performed just after reset before BSS and DATA

  * segments initialization.

  */

-.global hwinit0

-.weak hwinit0

+#ifdef THUMB_NO_INTERWORKING

 .thumb_func

+.code 16

+#endif

+.weak hwinit0

 hwinit0:

         bx      lr

+.code 32

 

 /*

  * Default late initialization code. It is declared weak in order to be

@@ -188,11 +168,14 @@ hwinit0:
  * Late initialization is performed after BSS and DATA segments initialization

  * and before invoking the main() function.

  */

-.global hwinit1

-.weak hwinit1

+#ifdef THUMB_NO_INTERWORKING

 .thumb_func

+.code 16

+#endif

+.weak hwinit1

 hwinit1:

         bx      lr

+.code 32

 

 /** @endcond */

 /** @} */

diff --git a/ports/ARM7/port.dox b/ports/ARM7/port.dox
index 28ce34ef6..016d2aceb 100644
--- a/ports/ARM7/port.dox
+++ b/ports/ARM7/port.dox
@@ -138,3 +138,52 @@
  * @file ports/ARM7/chcore.c Port related code.

  */

 /** @} */

+

+/**

+ * @defgroup ARM7_STARTUP Startup Support

+ * @{

+ * @brief ARM7 startup code support.

+ * @details ChibiOS/RT provides its own generic startup file for the ARM7 port.

+ * Of course it is not mandatory to use it but care should be taken about the

+ * startup phase details.

+ *

+ * <h2>Startup Process</h2>

+ * The startup process, as implemented, is the following:

+ * -# Initialize the various stacks assigning them the sizes defined in the

+ *    linker script (usually named @p ch.ld). Stack areas are allocated from

+ *    the highest RAM location downward.

+ * -# The ARM state is switched to System with both IRQ and FIQ sources

+ *    disabled.

+ * -# An early initialization routine @p hwinit0 is invoked, if the symbol not

+ *    defined then an empty default routine is executed (weak symbol).

+ * -# DATA and BSS segments are initialized.

+ * -# A late initialization routine @p hwinit1 is invoked, if the symbol not

+ *    defined then an empty default routine is executed (weak symbol).<br>

+ *    This late initialization function is also the proper place for a

+ *    @a bootloader, if your application requires one.

+ * -# The @p main() function is invoked with the parameters @p argc and @p argv

+ *    set to zero.

+ * -# Should the @p main() function return a branch is performed to the weak

+ *    symbol MainExitHandler. The default code is an endless empty loop.

+ * .

+ * <h2>Expected linker symbols</h2>

+ * The startup code starts at the symbol @p ResetHandler and expects the

+ * following symbols to be defined in the linker script:

+ * - @p __ram_end__ RAM end location +1.

+ * - @p __und_stack_size__ Undefined Instruction stack size.

+ * - @p __abt_stack_size__ Memory Abort stack size.

+ * - @p __fiq_stack_size__ FIQ service stack size.

+ * - @p __irq_stack_size__ IRQ service stack size.

+ * - @p __svc_stack_size__ SVC service stack size.

+ * - @p __sys_stack_size__ System/User stack size. This is the stack used

+ *      by the @p main() function.

+ * - @p _textdata address of the data segment source read only data.

+ * - @p _data data segment start location.

+ * - @p _edata data segment end location +1.

+ * - @p _bss_start BSS start location.

+ * - @p _bss_end BSS end location +1.

+ * .

+ * @ingroup ARM7

+ * @file ports/ARM7/crt0.s Startup code.

+ */

+/** @} */

diff --git a/ports/ARMCM3/crt0.s b/ports/ARMCM3/crt0.s
index 18c987f18..c98898646 100644
--- a/ports/ARMCM3/crt0.s
+++ b/ports/ARMCM3/crt0.s
@@ -86,11 +86,20 @@ bloop:
         isb
         /* Late initialization. */
         bl      hwinit1
-        /* main(0, NULL). */
         movs    r0, #0
         mov     r1, r0
         bl      main
-        bl      port_halt
+        b       MainExitHandler
+
+/*
+ * Default main exit code, just a loop.
+ * It is a weak symbol, the application code can redefine the behavior.
+ */
+.thumb_func
+.global MainExitHandler
+.weak MainExitHandler
+MainExitHandler:
+.loop:  b       .loop
 
 /*
  * Default early initialization code. It is declared weak in order to be
diff --git a/ports/ARMCM3/port.dox b/ports/ARMCM3/port.dox
index e5ba84973..ba4111aed 100644
--- a/ports/ARMCM3/port.dox
+++ b/ports/ARMCM3/port.dox
@@ -83,7 +83,7 @@
  *   Usually there is no need to change this value, please refer to the

  *   Cortex-M3 technical reference manual for a detailed description.

  * - @p BASEPRI_KERNEL, this is the @p BASEPRI value for the kernel lock code.

- *   The default value is 0x10.<br>

+ *   The default value is 0x40.<br>

  *   Code running at higher priority levels must not invoke any OS API.<br>

  *   Usually there is no need to change this value, please refer to the

  *   Cortex-M3 technical reference manual for a detailed description.

@@ -110,6 +110,6 @@
  * @{

  * @brief ARM Cortex-M3 NVIC support.

  *

- * @ingroup ARMCM3_CORE

+ * @ingroup ARMCM3

  */

 /** @} */