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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-02-06 22:07:17 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-02-06 22:07:17 +0000 |
| commit | d5f443f74d551831ef4f93c043f70b53d9b1008b (patch) | |
| tree | 599b517e171ed7258776d3960ac6e3908855a1aa /ports/ARMCM3-STM32F103/stm32_serial.c | |
| parent | 35b0454ddb7ac3b9a7b4142c7c04be4570a29798 (diff) | |
| download | ChibiOS-d5f443f74d551831ef4f93c043f70b53d9b1008b.tar.gz ChibiOS-d5f443f74d551831ef4f93c043f70b53d9b1008b.tar.bz2 ChibiOS-d5f443f74d551831ef4f93c043f70b53d9b1008b.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@732 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'ports/ARMCM3-STM32F103/stm32_serial.c')
| -rw-r--r-- | ports/ARMCM3-STM32F103/stm32_serial.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/ports/ARMCM3-STM32F103/stm32_serial.c b/ports/ARMCM3-STM32F103/stm32_serial.c index 571c35fc1..857007362 100644 --- a/ports/ARMCM3-STM32F103/stm32_serial.c +++ b/ports/ARMCM3-STM32F103/stm32_serial.c @@ -161,8 +161,8 @@ static void OutNotify3(void) { * @note Must be invoked with interrupts disabled. * @note Does not reset the I/O queues. */ -void stm32_set_usart(USART_TypeDef *u, uint32_t speed, uint16_t cr1, - uint16_t cr2, uint16_t cr3) { +void usart_setup(USART_TypeDef *u, uint32_t speed, uint16_t cr1, + uint16_t cr2, uint16_t cr3) { /* * Baud rate setting. @@ -189,13 +189,13 @@ void stm32_set_usart(USART_TypeDef *u, uint32_t speed, uint16_t cr1, * may have another use, enable them externally if needed. * RX and TX pads are handled inside. */ -void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { +void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { #if USE_STM32_USART1 chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); RCC->APB2ENR |= 0x00004000; - stm32_set_usart(USART1, STM32_USART_BITRATE, 0, - CR2_STOP1_BITS | CR2_LINEN, 0); + usart_setup(USART1, DEFAULT_USART_BITRATE, 0, + CR2_STOP1_BITS | CR2_LINEN, 0); GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0; NVICEnableVector(USART1_IRQChannel, prio1); #endif @@ -203,8 +203,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { #if USE_STM32_USART2 chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); RCC->APB1ENR |= 0x00020000; - stm32_set_usart(USART2, STM32_USART_BITRATE, 0, - CR2_STOP1_BITS | CR2_LINEN, 0); + usart_setup(USART2, DEFAULT_USART_BITRATE, 0, + CR2_STOP1_BITS | CR2_LINEN, 0); GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00; NVICEnableVector(USART2_IRQChannel, prio2); #endif @@ -212,8 +212,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { #if USE_STM32_USART3 chFDDInit(&COM3, ib3, sizeof ib3, NULL, ob3, sizeof ob3, OutNotify3); RCC->APB1ENR |= 0x00040000; - stm32_set_usart(USART3, STM32_USART_BITRATE, 0, - CR2_STOP1_BITS | CR2_LINEN, 0); + usart_setup(USART3, DEFAULT_USART_BITRATE, 0, + CR2_STOP1_BITS | CR2_LINEN, 0); GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00; NVICEnableVector(USART3_IRQChannel, prio3); #endif |