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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-09-21 11:42:29 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-09-21 11:42:29 +0000
commitf15f3af02d6fad2fca9d582a192d77f351d85b38 (patch)
treeb2dc5fea1c7a55751f73b382b2ba2f727ea782ef /os
parent278871357081b36670bea91eb09e537054c71cac (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7298 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/icu_lld.c2
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/icu_lld.h2
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c8
-rw-r--r--os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h4
4 files changed, 8 insertions, 8 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c
index dfdce05f9..a9b949a7f 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.c
@@ -508,7 +508,7 @@ void icu_lld_start(ICUDriver *icup) {
osalDbgAssert((psc <= 0xFFFF) &&
((psc + 1) * icup->config->frequency) == icup->clock,
"invalid frequency");
- icup->tim->PSC = (uint16_t)psc;
+ icup->tim->PSC = psc;
icup->tim->ARR = 0xFFFF;
if (icup->config->channel == ICU_CHANNEL_1) {
diff --git a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h
index 2559e9643..eb50e69d2 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/icu_lld.h
@@ -256,7 +256,7 @@ typedef enum {
/**
* @brief ICU counter type.
*/
-typedef uint16_t icucnt_t;
+typedef uint32_t icucnt_t;
/**
* @brief Driver configuration structure.
diff --git a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c
index d6a4affd8..c83db347b 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.c
@@ -170,7 +170,7 @@ OSAL_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
- uint16_t sr;
+ uint32_t sr;
OSAL_IRQ_PROLOGUE();
@@ -307,7 +307,7 @@ OSAL_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
* @isr
*/
OSAL_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
- uint16_t sr;
+ uint32_t sr;
OSAL_IRQ_PROLOGUE();
@@ -528,8 +528,8 @@ void pwm_lld_start(PWMDriver *pwmp) {
osalDbgAssert((psc <= 0xFFFF) &&
((psc + 1) * pwmp->config->frequency) == pwmp->clock,
"invalid frequency");
- pwmp->tim->PSC = (uint16_t)psc;
- pwmp->tim->ARR = (uint16_t)(pwmp->period - 1);
+ pwmp->tim->PSC = psc;
+ pwmp->tim->ARR = pwmp->period - 1;
pwmp->tim->CR2 = pwmp->config->cr2;
/* Output enables and polarities setup.*/
diff --git a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h
index 5b54847fb..12149f2a8 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h
+++ b/os/hal/ports/STM32/LLD/TIMv1/pwm_lld.h
@@ -305,7 +305,7 @@ typedef uint32_t pwmchnmsk_t;
/**
* @brief Type of a PWM counter.
*/
-typedef uint16_t pwmcnt_t;
+typedef uint32_t pwmcnt_t;
/**
* @brief Type of a PWM driver channel configuration structure.
@@ -430,7 +430,7 @@ struct PWMDriver {
* @notapi
*/
#define pwm_lld_change_period(pwmp, period) \
- ((pwmp)->tim->ARR = (uint16_t)((period) - 1))
+ ((pwmp)->tim->ARR = ((period) - 1))
/*===========================================================================*/
/* External declarations. */