diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-02 14:26:17 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-02 14:26:17 +0000 |
| commit | e5046d1dcb7a6c70cd3fa04ac5131214d067dec3 (patch) | |
| tree | d13171c2fc7b7d99bfcbf432586c6591ca759da3 /os | |
| parent | dabf18ef8cf570519df0aafed80834fc322f00bb (diff) | |
| download | ChibiOS-e5046d1dcb7a6c70cd3fa04ac5131214d067dec3.tar.gz ChibiOS-e5046d1dcb7a6c70cd3fa04ac5131214d067dec3.tar.bz2 ChibiOS-e5046d1dcb7a6c70cd3fa04ac5131214d067dec3.zip | |
Alternate preemption mode implemented for RVCT.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3014 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
| -rw-r--r-- | os/ports/RVCT/ARMCMx/chcore_v6m.h | 18 | ||||
| -rw-r--r-- | os/ports/RVCT/ARMCMx/chcoreasm_v6m.s | 36 |
2 files changed, 47 insertions, 7 deletions
diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.h b/os/ports/RVCT/ARMCMx/chcore_v6m.h index bff8c4fe4..347588bbb 100644 --- a/os/ports/RVCT/ARMCMx/chcore_v6m.h +++ b/os/ports/RVCT/ARMCMx/chcore_v6m.h @@ -45,6 +45,15 @@ /* Port configurable parameters. */
/*===========================================================================*/
+/**
+ * @brief Alternate preemption method.
+ * @details Activating this option will make the Kernel use the PendSV
+ * handler for preemption instead of the NMI handler.
+ */
+#ifndef CORTEX_ALTERNATE_SWITCH
+#define CORTEX_ALTERNATE_SWITCH FALSE
+#endif
+
/*===========================================================================*/
/* Port derived parameters. */
/*===========================================================================*/
@@ -72,6 +81,15 @@ #define CH_CORE_VARIANT_NAME "Cortex-M1"
#endif
+/**
+ * @brief Port-specific information string.
+ */
+#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
+#define CH_PORT_INFO "Preemption through NMI"
+#else
+#define CH_PORT_INFO "Preemption through PendSV"
+#endif
+
/*===========================================================================*/
/* Port implementation part. */
/*===========================================================================*/
diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s index d3239575c..725189996 100644 --- a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s +++ b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s @@ -19,12 +19,11 @@ */
/*
- * Imports the Cortex-Mx parameters header and performs the same calculations
- * done in chcore.h.
+ * Imports the Cortex-Mx configuration headers.
*/
-#include "cmparams.h"
-
-#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
+#define _FROM_ASM_
+#include "chconf.h"
+#include "chcore.h"
EXTCTX_SIZE EQU 32
CONTEXT_OFFSET EQU 12
@@ -78,6 +77,7 @@ _port_thread_start PROC * The NMI vector is used for exception mode re-entering after a context
* switch.
*/
+#if !CORTEX_ALTERNATE_SWITCH
EXPORT NMIVector
NMIVector PROC
mrs r3, PSP
@@ -86,6 +86,22 @@ NMIVector PROC cpsie i
bx lr
ENDP
+#endif
+
+/*
+ * NMI vector.
+ * The NMI vector is used for exception mode re-entering after a context
+ * switch.
+ */
+#if CORTEX_ALTERNATE_SWITCH
+ EXPORT PendSVVector
+PendSVVector PROC
+ mrs r3, PSP
+ adds r3, r3, #32
+ msr PSP, r3
+ bx lr
+ ENDP
+#endif
/*
* Post-IRQ switch code.
@@ -94,11 +110,17 @@ NMIVector PROC EXPORT _port_switch_from_isr
_port_switch_from_isr PROC
bl chSchDoRescheduleI
+ ldr r2, =SCB_ICSR
movs r3, #128
+#if CORTEX_ALTERNATE_SWITCH
+ lsls r3, r3, #20
+ str r3, [r2, #0]
+ cpsie i
+#else
lsls r3, r3, #24
- ldr r2, =SCB_ICSR
str r3, [r2, #0]
-_waitnmi b _waitnmi
+#endif
+waithere b waithere
ENDP
/*
|