git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2617 35acf78f-673a-0410-8e92-d51de3d6d3f4

6 files changed, 440 insertions, 7 deletions

diff --git a/os/ports/IAR/ARMCMx/chcore_v6m.h b/os/ports/IAR/ARMCMx/chcore_v6m.h
index fe6c68a92..9209fbaf4 100644
--- a/os/ports/IAR/ARMCMx/chcore_v6m.h
+++ b/os/ports/IAR/ARMCMx/chcore_v6m.h
@@ -190,12 +190,12 @@ struct intctx {
 /**

  * @brief   Disables all the interrupt sources.

  */

-#define port_disable() __enable_interrupt()

+#define port_disable() __disable_interrupt()

 

 /**

  * @brief   Disables the interrupt sources below kernel-level priority.

  */

-#define port_suspend() __enable_interrupt()

+#define port_suspend() __disable_interrupt()

 

 /**

  * @brief   Enables all the interrupt sources.

diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
index c9ee6a0c8..5f0887960 100644
--- a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
+++ b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
@@ -30,10 +30,6 @@
 

 #define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))

 

-#ifndef CORTEX_PRIORITY_SVCALL

-#define CORTEX_PRIORITY_SVCALL  1

-#endif

-

 EXTCTX_SIZE     SET 32

 CONTEXT_OFFSET  SET 12

 

diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.c b/os/ports/RVCT/ARMCMx/chcore_v6m.c
new file mode 100644
index 000000000..6340df81c
--- /dev/null
+++ b/os/ports/RVCT/ARMCMx/chcore_v6m.c
@@ -0,0 +1,56 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    RVCT/ARMCMx/chcore_v6m.c

+ * @brief   ARMv6-M architecture port code.

+ *

+ * @addtogroup RVCT_ARMCMx_V6M_CORE

+ * @{

+ */

+

+#include "ch.h"

+

+/**

+ * @brief   PC register temporary storage.

+ */

+regarm_t _port_saved_pc;

+

+/**

+ * @brief   IRQ nesting counter.

+ */

+unsigned _port_irq_nesting;

+

+/**

+ * @brief   System Timer vector.

+ * @details This interrupt is used as system tick.

+ * @note    The timer must be initialized in the startup code.

+ */

+CH_IRQ_HANDLER(SysTickVector) {

+

+  CH_IRQ_PROLOGUE();

+

+  chSysLockFromIsr();

+  chSysTimerHandlerI();

+  chSysUnlockFromIsr();

+

+  CH_IRQ_EPILOGUE();

+}

+

+/** @} */

diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.h b/os/ports/RVCT/ARMCMx/chcore_v6m.h
new file mode 100644
index 000000000..796b7f22e
--- /dev/null
+++ b/os/ports/RVCT/ARMCMx/chcore_v6m.h
@@ -0,0 +1,250 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    RVCT/ARMCMx/chcore_v6m.h

+ * @brief   ARMv6-M architecture port macros and structures.

+ *

+ * @addtogroup RVCT_ARMCMx_V6M_CORE

+ * @{

+ */

+

+#ifndef _CHCORE_V6M_H_

+#define _CHCORE_V6M_H_

+

+/*===========================================================================*/

+/* Port implementation part.                                                 */

+/*===========================================================================*/

+

+/**

+ * @brief   Cortex-Mx exception context.

+ */

+struct cmxctx {

+  regarm_t      r0;

+  regarm_t      r1;

+  regarm_t      r2;

+  regarm_t      r3;

+  regarm_t      r12;

+  regarm_t      lr_thd;

+  regarm_t      pc;

+  regarm_t      xpsr;

+};

+

+#if !defined(__DOXYGEN__)

+struct extctx {

+  regarm_t      xpsr;

+  regarm_t      r12;

+  regarm_t      lr;

+  regarm_t      r0;

+  regarm_t      r1;

+  regarm_t      r2;

+  regarm_t      r3;

+  regarm_t      pc;

+};

+

+struct intctx {

+  regarm_t      r8;

+  regarm_t      r9;

+  regarm_t      r10;

+  regarm_t      r11;

+  regarm_t      r4;

+  regarm_t      r5;

+  regarm_t      r6;

+  regarm_t      r7;

+  regarm_t      lr;

+};

+#endif

+

+/**

+ * @brief   Platform dependent part of the @p chThdInit() API.

+ * @details This code usually setup the context switching frame represented

+ *          by an @p intctx structure.

+ */

+#define SETUP_CONTEXT(workspace, wsize, pf, arg) {                          \

+  tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace +                  \

+                                     wsize -                                \

+                                     sizeof(struct intctx));                \

+  tp->p_ctx.r13->r4 = (void *)pf;                                           \

+  tp->p_ctx.r13->r5 = arg;                                                  \

+  tp->p_ctx.r13->lr = (void *)_port_thread_start;                           \

+}

+

+/**

+ * @brief   Stack size for the system idle thread.

+ * @details This size depends on the idle thread implementation, usually

+ *          the idle thread should take no more space than those reserved

+ *          by @p INT_REQUIRED_STACK.

+ * @note    In this port it is set to 8 because the idle thread does have

+ *          a stack frame when compiling without optimizations. You may

+ *          reduce this value to zero when compiling with optimizations.

+ */

+#ifndef IDLE_THREAD_STACK_SIZE

+#define IDLE_THREAD_STACK_SIZE      8

+#endif

+

+/**

+ * @brief   Per-thread stack overhead for interrupts servicing.

+ * @details This constant is used in the calculation of the correct working

+ *          area size.

+ *          This value can be zero on those architecture where there is a

+ *          separate interrupt stack and the stack space between @p intctx and

+ *          @p extctx is known to be zero.

+ * @note    In this port it is conservatively set to 16 because the function

+ *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          compiler optimizations disabled.

+ */

+#ifndef INT_REQUIRED_STACK

+#define INT_REQUIRED_STACK          16

+#endif

+

+/**

+ * @brief   IRQ prologue code.

+ * @details This macro must be inserted at the start of all IRQ handlers

+ *          enabled to invoke system APIs.

+ */

+#define PORT_IRQ_PROLOGUE() {                                               \

+  port_lock_from_isr();                                                     \

+  _port_irq_nesting++;                                                      \

+  port_unlock_from_isr();                                                   \

+}

+

+/**

+ * @brief   IRQ epilogue code.

+ * @details This macro must be inserted at the end of all IRQ handlers

+ *          enabled to invoke system APIs.

+ */

+#define PORT_IRQ_EPILOGUE() _port_irq_epilogue()

+

+/**

+ * @brief   IRQ handler function declaration.

+ * @note    @p id can be a function name or a vector number depending on the

+ *          port implementation.

+ */

+#define PORT_IRQ_HANDLER(id) void id(void)

+

+/**

+ * @brief   Fast IRQ handler function declaration.

+ * @note    @p id can be a function name or a vector number depending on the

+ *          port implementation.

+ */

+#define PORT_FAST_IRQ_HANDLER(id) void id(void)

+

+/**

+ * @brief   Port-related initialization code.

+ */

+#define port_init() {                                                       \

+  _port_irq_nesting = 0;                                                    \

+  SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0);                            \

+  NVICSetSystemHandlerPriority(HANDLER_SYSTICK,                             \

+    CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK));                         \

+}

+

+/**

+ * @brief   Kernel-lock action.

+ * @details Usually this function just disables interrupts but may perform

+ *          more actions.

+ */

+#define port_lock() __disable_irq()

+

+/**

+ * @brief   Kernel-unlock action.

+ * @details Usually this function just disables interrupts but may perform

+ *          more actions.

+ */

+#define port_unlock() __enable_irq()

+

+/**

+ * @brief   Kernel-lock action from an interrupt handler.

+ * @details This function is invoked before invoking I-class APIs from

+ *          interrupt handlers. The implementation is architecture dependent,

+ *          in its simplest form it is void.

+ * @note    Same as @p port_lock() in this port.

+ */

+#define port_lock_from_isr() port_lock()

+

+/**

+ * @brief   Kernel-unlock action from an interrupt handler.

+ * @details This function is invoked after invoking I-class APIs from interrupt

+ *          handlers. The implementation is architecture dependent, in its

+ *          simplest form it is void.

+ * @note    Same as @p port_lock() in this port.

+ */

+#define port_unlock_from_isr() port_unlock()

+

+/**

+ * @brief   Disables all the interrupt sources.

+ */

+#define port_disable() __disable_irq()

+

+/**

+ * @brief   Disables the interrupt sources below kernel-level priority.

+ */

+#define port_suspend() __disable_irq()

+

+/**

+ * @brief   Enables all the interrupt sources.

+ */

+#define port_enable() __enable_irq()

+

+/**

+ * @brief   Enters an architecture-dependent IRQ-waiting mode.

+ * @details The function is meant to return when an interrupt becomes pending.

+ *          The simplest implementation is an empty function or macro but this

+ *          would not take advantage of architecture-specific power saving

+ *          modes.

+ * @note    Implemented as an inlined @p WFI instruction.

+ */

+#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)

+#define port_wait_for_interrupt() __wfi()

+#else

+#define port_wait_for_interrupt()

+#endif

+

+/**

+ * @brief   Performs a context switch between two threads.

+ * @details This is the most critical code in any port, this function

+ *          is responsible for the context switch between 2 threads.

+ * @note    The implementation of this code affects <b>directly</b> the context

+ *          switch performance so optimize here as much as you can.

+ *

+ * @param[in] ntp       the thread to be switched in

+ * @param[in] otp       the thread to be switched out

+ */

+#define port_switch(ntp, otp) _port_switch(ntp, otp)

+

+#if !defined(__DOXYGEN__)

+extern regarm_t _port_saved_pc;

+extern unsigned _port_irq_nesting;

+#endif

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void port_halt(void);

+  void _port_switch(Thread *ntp, Thread *otp);

+  void _port_irq_epilogue(void);

+  void _port_switch_from_isr(void);

+  void _port_thread_start(void);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* _CHCORE_V6M_H_ */

+

+/** @} */

diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
new file mode 100644
index 000000000..e813d7eca
--- /dev/null
+++ b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
@@ -0,0 +1,130 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * Imports the Cortex-Mx parameters header and performs the same calculations

+ * done in chcore.h.

+ */

+#include "cmparams.h"

+

+#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))

+

+EXTCTX_SIZE     EQU     32

+CONTEXT_OFFSET  EQU     12

+

+                PRESERVE8

+                THUMB

+                AREA    |.text|, CODE, READONLY

+

+                IMPORT  chThdExit

+                IMPORT  chSchIsRescRequiredExI

+                IMPORT  chSchDoRescheduleI

+                IMPORT  _port_saved_pc

+                IMPORT  _port_irq_nesting

+

+/*

+ * Performs a context switch between two threads.

+ */

+                EXPORT _port_switch

+_port_switch    PROC

+                push    {r4, r5, r6, r7, lr}

+                mov     r4, r8

+                mov     r5, r9

+                mov     r6, r10

+                mov     r7, r11

+                push    {r4, r5, r6, r7}

+                mov     r3, sp

+                str     r3, [r1, #CONTEXT_OFFSET]

+                ldr     r3, [r0, #CONTEXT_OFFSET]

+                mov     sp, r3

+                pop     {r4, r5, r6, r7}

+                mov     r8, r4

+                mov     r9, r5

+                mov     r10, r6

+                mov     r11, r7

+                pop     {r4, r5, r6, r7, pc}

+                ENDP

+

+/*

+ * Start a thread by invoking its work function.

+ * If the work function returns @p chThdExit() is automatically invoked.

+ */

+                EXPORT  _port_thread_start

+_port_thread_start PROC

+                cpsie   i

+                mov     r0, r5

+                blx     r4

+                bl      chThdExit

+                ENDP

+

+/*

+ * Post-IRQ switch code.

+ * Exception handlers return here for context switching.

+ */

+                EXPORT  _port_switch_from_isr

+_port_switch_from_isr PROC

+                /* Note, saves r4 to make space for the PC.*/

+                push    {r0, r1, r2, r3, r4}

+                mrs     r0, APSR

+                mov     r1, r12

+                push    {r0, r1, lr}

+                ldr     r0, =_port_saved_pc

+                ldr     r0, [r0]

+                adds    r0, r0, #1

+                str     r0, [sp, #28]

+                bl      chSchDoRescheduleI

+                pop     {r0, r1, r2}

+                mov     r12, r1

+                msr     APSR, r0

+                mov     lr, r2

+                cpsie   i

+                pop     {r0, r1, r2, r3, pc}

+                ENDP

+

+/*

+ * Reschedule verification and setup after an IRQ.

+ */

+                EXPORT  _port_irq_epilogue

+_port_irq_epilogue PROC

+                push    {r4, lr}

+                cpsid   i

+                ldr     r2, =_port_irq_nesting

+                ldr     r3, [r2]

+                subs    r3, r3, #1

+                str     r3, [r2]

+                cmp     r3, #0

+                beq     skipexit

+                cpsie   i

+                pop     {r4, pc}

+skipexit

+                bl      chSchIsRescRequiredExI

+                cmp     r0, #0

+                beq     notrequired

+                mrs     r1, PSP

+                ldr     r2, =_port_saved_pc

+                ldr     r3, [r1, #24]

+                str     r3, [r2]

+                ldr     r3, =_port_switch_from_isr

+                str     r3, [r1, #24]

+notrequired

+                pop     {r4, pc}

+                nop

+                ENDP

+

+                END

diff --git a/os/ports/RVCT/ARMCMx/cstartup.s b/os/ports/RVCT/ARMCMx/cstartup.s
index 0d3a03f99..d0a8104a8 100644
--- a/os/ports/RVCT/ARMCMx/cstartup.s
+++ b/os/ports/RVCT/ARMCMx/cstartup.s
@@ -72,7 +72,8 @@ Reset_Handler   PROC
                 msr     CONTROL, r0

                 isb

                 bl      __early_init

-                b       __main

+                ldr     r0, =__main

+                bx      r0

                 ENDP

 

 __early_init    PROC