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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-06 12:25:34 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-06 12:25:34 +0000
commit2848e99c07e4174412dd0879046b9c3f82961695 (patch)
treedfa821ed2f87c642b344fa831e98dac38c3d97b0 /os
parent9e51498e1196b28e5c073a7505df2ae08f05b59a (diff)
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STM32F4 support working, most device drivers still to test, report added.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3475 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os')
-rw-r--r--os/hal/platforms/STM32/serial_lld.c4
-rw-r--r--os/hal/platforms/STM32F4xx/hal_lld.c3
2 files changed, 6 insertions, 1 deletions
diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c
index ce412dedb..d9d0836fd 100644
--- a/os/hal/platforms/STM32/serial_lld.c
+++ b/os/hal/platforms/STM32/serial_lld.c
@@ -90,7 +90,11 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
/*
* Baud rate setting.
*/
+#if STM32_HAS_USART6
+ if ((sdp->usart == USART1) || (sdp->usart == USART6))
+#else
if (sdp->usart == USART1)
+#endif
u->BRR = STM32_PCLK2 / config->sc_speed;
else
u->BRR = STM32_PCLK1 / config->sc_speed;
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index bd88ad2da..5033c41c8 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -142,7 +142,8 @@ void stm32_clock_init(void) {
STM32_RTCPRE | STM32_PPRE2 | STM32_PPRE1 | STM32_HPRE;
/* Flash setup.*/
- FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | STM32_FLASHBITS;
+ FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN |
+ STM32_FLASHBITS;
/* Switching to the configured clock source if it is different from MSI.*/
#if (STM32_SW != STM32_SW_HSI)