STM32F4 support working, most device drivers still to test, report added.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3475 35acf78f-673a-0410-8e92-d51de3d6d3f4

5 files changed, 179 insertions, 10 deletions

diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/main.c b/demos/ARMCM3-STM32F407-DISCOVERY/main.c
index eb2653f32..cc12871d4 100644
--- a/demos/ARMCM3-STM32F407-DISCOVERY/main.c
+++ b/demos/ARMCM3-STM32F407-DISCOVERY/main.c
@@ -201,19 +201,19 @@ int main(void) {
 

   /*

    * Activates the serial driver 1 using the driver default configuration.

-   * PA9 and PA10 are routed to USART1.

+   * PA2(TX) and PA3(RX) are routed to USART1.

    */

-//  sdStart(&SD1, NULL);

-//  palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7));

-//  palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7));

+  sdStart(&SD2, NULL);

+  palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));

+  palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));

 

   /*

    * If the user button is pressed after the reset then the test suite is

    * executed immediately before activating the various device drivers in

    * order to not alter the benchmark scores.

    */

-//  if (palReadPad(GPIOA, GPIOA_BUTTON))

-//    TestThread(&SD1);

+  if (palReadPad(GPIOA, GPIOA_BUTTON))

+    TestThread(&SD2);

 

   /*

    * Initializes the SPI driver 2. The SPI2 signals are routed as follow:

@@ -262,7 +262,7 @@ int main(void) {
    */

   while (TRUE) {

     if (palReadPad(GPIOA, GPIOA_BUTTON))

-      TestThread(&SD1);

+      TestThread(&SD2);

     chThdSleepMilliseconds(500);

   }

 }

diff --git a/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h b/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h
index 2324fc0c1..2da3961ed 100644
--- a/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h
+++ b/demos/ARMCM3-STM32F407-DISCOVERY/mcuconf.h
@@ -141,8 +141,8 @@
 /*

  * SERIAL driver system settings.

  */

-#define STM32_SERIAL_USE_USART1             TRUE

-#define STM32_SERIAL_USE_USART2             FALSE

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             TRUE

 #define STM32_SERIAL_USE_USART3             FALSE

 #define STM32_SERIAL_USE_UART4              FALSE

 #define STM32_SERIAL_USE_UART5              FALSE

diff --git a/docs/reports/STM32F407-168-GCC.txt b/docs/reports/STM32F407-168-GCC.txt
new file mode 100644
index 000000000..9b2702146
--- /dev/null
+++ b/docs/reports/STM32F407-168-GCC.txt
@@ -0,0 +1,164 @@
+***************************************************************************

+Options:  -O2 -fomit-frame-pointer -falign-functions=16

+Settings: SYSCLK=168, ACR=0x705 (5 wait states)

+***************************************************************************

+

+*** ChibiOS/RT test suite

+***

+*** Kernel:       2.3.4unstable

+*** Compiled:     Nov  6 2011 - 12:43:29

+*** Compiler:     GCC 4.6.0

+*** Architecture: ARMv7-M

+*** Core Variant: Cortex-M3

+*** Port Info:    Advanced kernel mode

+*** Platform:     STM32F4 High Performance & DSP

+*** Test Board:   ST STM32F4-Discovery

+

+----------------------------------------------------------------------------

+--- Test Case 1.1 (Threads, enqueuing test #1)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 1.2 (Threads, enqueuing test #2)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 1.3 (Threads, priority change)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 1.4 (Threads, delays)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 2.1 (Semaphores, enqueuing)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 2.2 (Semaphores, timeout)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 2.3 (Semaphores, atomic signal-wait)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 2.4 (Binary Semaphores, functionality)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.1 (Mutexes, priority enqueuing test)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.2 (Mutexes, priority inheritance, simple case)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.3 (Mutexes, priority inheritance, complex case)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.4 (Mutexes, priority return)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.5 (Mutexes, status)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.6 (CondVar, signal test)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.7 (CondVar, broadcast test)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 3.8 (CondVar, boost test)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 4.1 (Messages, loop)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 5.1 (Mailboxes, queuing and timeouts)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 6.1 (Events, registration and dispatch)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 6.2 (Events, wait and broadcast)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 6.3 (Events, timeouts)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 7.1 (Heap, allocation and fragmentation test)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 8.1 (Memory Pools, queue/dequeue)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 9.1 (Dynamic APIs, threads creation from heap)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 9.3 (Dynamic APIs, registry and references)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 10.1 (Queues, input queues)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 10.2 (Queues, output queues)

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.1 (Benchmark, messages #1)

+--- Score : 756090 msgs/S, 1512180 ctxswc/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.2 (Benchmark, messages #2)

+--- Score : 621671 msgs/S, 1243342 ctxswc/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.3 (Benchmark, messages #3)

+--- Score : 621671 msgs/S, 1243342 ctxswc/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.4 (Benchmark, context switch)

+--- Score : 2567560 ctxswc/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.5 (Benchmark, threads, full cycle)

+--- Score : 452437 threads/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.6 (Benchmark, threads, create only)

+--- Score : 638228 threads/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)

+--- Score : 192887 reschedules/S, 1157322 ctxswc/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.8 (Benchmark, round robin context switching)

+--- Score : 1367420 ctxswc/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.9 (Benchmark, I/O Queues throughput)

+--- Score : 1844568 bytes/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.10 (Benchmark, virtual timers set/reset)

+--- Score : 2151998 timers/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.11 (Benchmark, semaphores wait/signal)

+--- Score : 2685712 wait+signal/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.12 (Benchmark, mutexes lock/unlock)

+--- Score : 1886020 lock+unlock/S

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+--- Test Case 11.13 (Benchmark, RAM footprint)

+--- System: 376 bytes

+--- Thread: 72 bytes

+--- Timer : 20 bytes

+--- Semaph: 12 bytes

+--- EventS: 4 bytes

+--- EventL: 12 bytes

+--- Mutex : 16 bytes

+--- CondV.: 8 bytes

+--- Queue : 32 bytes

+--- MailB.: 40 bytes

+--- Result: SUCCESS

+----------------------------------------------------------------------------

+

+Final result: SUCCESS

diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c
index ce412dedb..d9d0836fd 100644
--- a/os/hal/platforms/STM32/serial_lld.c
+++ b/os/hal/platforms/STM32/serial_lld.c
@@ -90,7 +90,11 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
   /*

    * Baud rate setting.

    */

+#if STM32_HAS_USART6

+  if ((sdp->usart == USART1) || (sdp->usart == USART6))

+#else

   if (sdp->usart == USART1)

+#endif

     u->BRR = STM32_PCLK2 / config->sc_speed;

   else

     u->BRR = STM32_PCLK1 / config->sc_speed;

diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index bd88ad2da..5033c41c8 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -142,7 +142,8 @@ void stm32_clock_init(void) {
                STM32_RTCPRE | STM32_PPRE2 | STM32_PPRE1 | STM32_HPRE;

 

   /* Flash setup.*/

-  FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | STM32_FLASHBITS;

+  FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN |

+               STM32_FLASHBITS;

 

   /* Switching to the configured clock source if it is different from MSI.*/

 #if (STM32_SW != STM32_SW_HSI)