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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-03-26 11:12:55 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-03-26 11:12:55 +0000 |
| commit | a3e2fd30898b3890a53a505103b5e2535fc34533 (patch) | |
| tree | c4f074a1fc366fe6c30b948e1c137e3a47babd86 /os/rt/ports | |
| parent | e54e465a69b55dc88710cba9e7b6f0e88bd4a618 (diff) | |
| download | ChibiOS-a3e2fd30898b3890a53a505103b5e2535fc34533.tar.gz ChibiOS-a3e2fd30898b3890a53a505103b5e2535fc34533.tar.bz2 ChibiOS-a3e2fd30898b3890a53a505103b5e2535fc34533.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7810 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/rt/ports')
| -rw-r--r-- | os/rt/ports/ARMCMx/chcore.h | 37 | ||||
| -rw-r--r-- | os/rt/ports/ARMCMx/chcore_v6m.h | 5 | ||||
| -rw-r--r-- | os/rt/ports/ARMCMx/chcore_v7m.h | 4 |
3 files changed, 7 insertions, 39 deletions
diff --git a/os/rt/ports/ARMCMx/chcore.h b/os/rt/ports/ARMCMx/chcore.h index 23f33a6f8..abf0b4596 100644 --- a/os/rt/ports/ARMCMx/chcore.h +++ b/os/rt/ports/ARMCMx/chcore.h @@ -66,17 +66,6 @@ /** @} */
-/**
- * @name Cortex-M variants
- * @{
- */
-#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
-#define CORTEX_M0PLUS 1 /**< @brief Cortex-M0+ variant. */
-#define CORTEX_M1 10 /**< @brief Cortex-M1 variant. */
-#define CORTEX_M3 30 /**< @brief Cortex-M3 variant. */
-#define CORTEX_M4 40 /**< @brief Cortex-M4 variant. */
-/** @} */
-
/* Inclusion of the Cortex-Mx implementation specific parameters.*/
#include "cmparams.h"
@@ -98,27 +87,6 @@ /* Derived constants and error checks. */
/*===========================================================================*/
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
-
-/*
- * Inclusion of the appropriate CMSIS header for the selected device.
- */
-#if CORTEX_MODEL == CORTEX_M0
-#include "core_cm0.h"
-#elif CORTEX_MODEL == CORTEX_M0PLUS
-#include "core_cm0plus.h"
-#elif CORTEX_MODEL == CORTEX_M3
-#include "core_cm3.h"
-#elif CORTEX_MODEL == CORTEX_M4
-#include "core_cm4.h"
-#else
-#error "unknown or unsupported Cortex-M model"
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
/*===========================================================================*/
/* Module data structures and types. */
/*===========================================================================*/
@@ -221,10 +189,9 @@ struct context { /*===========================================================================*/
/* Includes the sub-architecture-specific part.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M0PLUS) || \
- (CORTEX_MODEL == CORTEX_M1)
+#if (CORTEX_MODEL == 0) || (CORTEX_MODEL == 1)
#include "chcore_v6m.h"
-#elif (CORTEX_MODEL == CORTEX_M3) || (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)
#include "chcore_v7m.h"
#endif
diff --git a/os/rt/ports/ARMCMx/chcore_v6m.h b/os/rt/ports/ARMCMx/chcore_v6m.h index bd9ab4781..c8361a549 100644 --- a/os/rt/ports/ARMCMx/chcore_v6m.h +++ b/os/rt/ports/ARMCMx/chcore_v6m.h @@ -99,7 +99,8 @@ * @name Architecture and Compiler
* @{
*/
-#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)
+#if ((CORTEX_MODEL == 0) && !defined(__CORE_CM0PLUS_H_DEPENDANT)) || \
+ defined(__DOXYGEN__)
/**
* @brief Macro defining the specific ARM architecture.
*/
@@ -115,7 +116,7 @@ */
#define PORT_CORE_VARIANT_NAME "Cortex-M0"
-#elif (CORTEX_MODEL == CORTEX_M0PLUS)
+#elif (CORTEX_MODEL == 0) && defined(__CORE_CM0PLUS_H_DEPENDANT)
#define PORT_ARCHITECTURE_ARM_v6M
#define PORT_ARCHITECTURE_NAME "ARMv6-M"
#define PORT_CORE_VARIANT_NAME "Cortex-M0+"
diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h index 12d46c738..b437a8fad 100644 --- a/os/rt/ports/ARMCMx/chcore_v7m.h +++ b/os/rt/ports/ARMCMx/chcore_v7m.h @@ -139,7 +139,7 @@ * @name Architecture and Compiler
* @{
*/
-#if (CORTEX_MODEL == CORTEX_M3) || defined(__DOXYGEN__)
+#if (CORTEX_MODEL == 3) || defined(__DOXYGEN__)
/**
* @brief Macro defining the specific ARM architecture.
*/
@@ -155,7 +155,7 @@ */
#define PORT_CORE_VARIANT_NAME "Cortex-M3"
-#elif (CORTEX_MODEL == CORTEX_M4)
+#elif (CORTEX_MODEL == 4)
#define PORT_ARCHITECTURE_ARM_v7ME
#define PORT_ARCHITECTURE_NAME "ARMv7-ME"
#if CORTEX_USE_FPU
|