diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-09 08:24:22 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-09 08:24:22 +0000 |
| commit | 8ca210a4af9fd039e290cfcc309adde543999c1f (patch) | |
| tree | 1aa594d5e65d5ebabdd358acbe8d3a9ac29f2070 /os/ports | |
| parent | cb453a3a12464dd71856b1354d083b5b02260870 (diff) | |
| download | ChibiOS-8ca210a4af9fd039e290cfcc309adde543999c1f.tar.gz ChibiOS-8ca210a4af9fd039e290cfcc309adde543999c1f.tar.bz2 ChibiOS-8ca210a4af9fd039e290cfcc309adde543999c1f.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6108 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports')
224 files changed, 0 insertions, 47299 deletions
diff --git a/os/ports/GCC/ARM/AT91SAM7/armparams.h b/os/ports/GCC/ARM/AT91SAM7/armparams.h deleted file mode 100644 index a8c2256a1..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/armparams.h +++ /dev/null @@ -1,56 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/AT91SAM7/armparams.h
- * @brief ARM7 AT91SAM7 Specific Parameters.
- *
- * @defgroup ARM_AT91SAM7 AT91SAM7 Specific Parameters
- * @ingroup ARM_SPECIFIC
- * @details This file contains the ARM specific parameters for the
- * AT91SAM7 platform.
- * @{
- */
-
-#ifndef _ARMPARAMS_H_
-#define _ARMPARAMS_H_
-
-/**
- * @brief ARM core model.
- */
-#define ARM_CORE ARM_CORE_ARM7TDMI
-
-/**
- * @brief AT91SAM7-specific wait for interrupt.
- * @details This implementation writes 1 into the PMC_SCDR register.
- */
-#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__)
-#if ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() { \
- (*((volatile uint32_t *)0xFFFFFC04)) = 1; \
-}
-#else
-#define port_wait_for_interrupt()
-#endif
-#endif
-
-#endif /* _ARMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7A3.ld b/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7A3.ld deleted file mode 100644 index 81934247b..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7A3.ld +++ /dev/null @@ -1,105 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * AT91SAM7A3 memory setup.
- */
-__und_stack_size__ = 0x0004;
-__abt_stack_size__ = 0x0004;
-__fiq_stack_size__ = 0x0010;
-__irq_stack_size__ = 0x0080;
-__svc_stack_size__ = 0x0004;
-__sys_stack_size__ = 0x0400;
-__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-
-MEMORY
-{
- flash : org = 0x100000, len = 256k
- ram : org = 0x200020, len = 32k - 0x20
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-SECTIONS
-{
- . = 0;
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- _text = .;
- KEEP(*(vectors))
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.ctors)
- *(.dtors)
- } > flash
-
- .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
-
- __exidx_start = .;
- .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
- __exidx_end = .;
-
- .eh_frame_hdr : {*(.eh_frame_hdr)}
-
- .eh_frame : ONLY_IF_RO {*(.eh_frame)}
-
- . = ALIGN(4);
- _etext = .;
- _textdata = _etext;
-
- .data :
- {
- _data = .;
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- _edata = .;
- } > ram AT > flash
-
- .bss :
- {
- _bss_start = .;
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__ - __stacks_total_size__;
-__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
diff --git a/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7S256.ld b/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7S256.ld deleted file mode 100644 index 763d50b16..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7S256.ld +++ /dev/null @@ -1,105 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * AT91SAM7S256 memory setup.
- */
-__und_stack_size__ = 0x0004;
-__abt_stack_size__ = 0x0004;
-__fiq_stack_size__ = 0x0010;
-__irq_stack_size__ = 0x0080;
-__svc_stack_size__ = 0x0004;
-__sys_stack_size__ = 0x0400;
-__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-
-MEMORY
-{
- flash : org = 0x100000, len = 256k
- ram : org = 0x200020, len = 64k - 0x20
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-SECTIONS
-{
- . = 0;
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- _text = .;
- KEEP(*(vectors))
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.ctors)
- *(.dtors)
- } > flash
-
- .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
-
- __exidx_start = .;
- .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
- __exidx_end = .;
-
- .eh_frame_hdr : {*(.eh_frame_hdr)}
-
- .eh_frame : ONLY_IF_RO {*(.eh_frame)}
-
- . = ALIGN(4);
- _etext = .;
- _textdata = _etext;
-
- .data :
- {
- _data = .;
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- _edata = .;
- } > ram AT > flash
-
- .bss :
- {
- _bss_start = .;
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__ - __stacks_total_size__;
-__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
diff --git a/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7X256.ld b/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7X256.ld deleted file mode 100644 index 6c61ff6f0..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/ld/AT91SAM7X256.ld +++ /dev/null @@ -1,105 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * AT91SAM7X256 memory setup.
- */
-__und_stack_size__ = 0x0004;
-__abt_stack_size__ = 0x0004;
-__fiq_stack_size__ = 0x0010;
-__irq_stack_size__ = 0x0080;
-__svc_stack_size__ = 0x0004;
-__sys_stack_size__ = 0x0400;
-__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-
-MEMORY
-{
- flash : org = 0x100000, len = 256k
- ram : org = 0x200020, len = 64k - 0x20
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-SECTIONS
-{
- . = 0;
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- _text = .;
- KEEP(*(vectors))
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.ctors)
- *(.dtors)
- } > flash
-
- .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
-
- __exidx_start = .;
- .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
- __exidx_end = .;
-
- .eh_frame_hdr : {*(.eh_frame_hdr)}
-
- .eh_frame : ONLY_IF_RO {*(.eh_frame)}
-
- . = ALIGN(4);
- _etext = .;
- _textdata = _etext;
-
- .data :
- {
- _data = .;
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- _edata = .;
- } > ram AT > flash
-
- .bss :
- {
- _bss_start = .;
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__ - __stacks_total_size__;
-__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
diff --git a/os/ports/GCC/ARM/AT91SAM7/port.mk b/os/ports/GCC/ARM/AT91SAM7/port.mk deleted file mode 100644 index 2cafd01aa..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/port.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS/RT ARM7 AT91SAM7 port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/ARM/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/ARM/crt0.s \
- ${CHIBIOS}/os/ports/GCC/ARM/chcoreasm.s \
- ${CHIBIOS}/os/ports/GCC/ARM/AT91SAM7/vectors.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/ARM \
- ${CHIBIOS}/os/ports/GCC/ARM/AT91SAM7
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARM/AT91SAM7/ld
diff --git a/os/ports/GCC/ARM/AT91SAM7/vectors.s b/os/ports/GCC/ARM/AT91SAM7/vectors.s deleted file mode 100644 index c9ab881ad..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/vectors.s +++ /dev/null @@ -1,104 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/AT91SAM7/vectors.s
- * @brief Interrupt vectors for the AT91SAM7 family.
- *
- * @defgroup ARM_AT91SAM7_VECTORS AT91SAM7 Interrupt Vectors
- * @ingroup ARM_SPECIFIC
- * @details Interrupt vectors for the AT91SAM7 family.
- * @{
- */
-
-#if defined(__DOXYGEN__)
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-void _unhandled_exception(void) {}
-#endif
-
-#if !defined(__DOXYGEN__)
-
-.section vectors
-.code 32
-.balign 4
-/*
- * System entry points.
- */
-_start:
- ldr pc, _reset
- ldr pc, _undefined
- ldr pc, _swi
- ldr pc, _prefetch
- ldr pc, _abort
- nop
- ldr pc, [pc,#-0xF20] /* AIC - AIC_IVR */
- ldr pc, [pc,#-0xF20] /* AIC - AIC_FVR */
-
-_reset:
- .word ResetHandler /* In crt0.s */
-_undefined:
- .word UndHandler
-_swi:
- .word SwiHandler
-_prefetch:
- .word PrefetchHandler
-_abort:
- .word AbortHandler
- .word 0
- .word 0
- .word 0
-
-.text
-.code 32
-.balign 4
-
-/*
- * Default exceptions handlers. The handlers are declared weak in order to be
- * replaced by the real handling code. Everything is defaulted to an infinite
- * loop.
- */
-.weak UndHandler
-UndHandler:
-
-.weak SwiHandler
-SwiHandler:
-
-.weak PrefetchHandler
-PrefetchHandler:
-
-.weak AbortHandler
-AbortHandler:
-
-.weak FiqHandler
-FiqHandler:
-
-.global _unhandled_exception
-_unhandled_exception:
- b _unhandled_exception
-
-#endif
-
-/** @} */
diff --git a/os/ports/GCC/ARM/AT91SAM7/wfi.h b/os/ports/GCC/ARM/AT91SAM7/wfi.h deleted file mode 100644 index 1cb7e6f40..000000000 --- a/os/ports/GCC/ARM/AT91SAM7/wfi.h +++ /dev/null @@ -1,36 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _WFI_H_
-#define _WFI_H_
-
-#include "board.h"
-
-#ifndef port_wait_for_interrupt
-#if ENABLE_WFI_IDLE != 0
-#define port_wait_for_interrupt() { \
- AT91C_BASE_SYS->PMC_SCDR = AT91C_PMC_PCK; \
-}
-#else
-#define port_wait_for_interrupt()
-#endif
-#endif
-
-#endif /* _WFI_H_ */
diff --git a/os/ports/GCC/ARM/LPC214x/armparams.h b/os/ports/GCC/ARM/LPC214x/armparams.h deleted file mode 100644 index d22063d36..000000000 --- a/os/ports/GCC/ARM/LPC214x/armparams.h +++ /dev/null @@ -1,56 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/LPC214x/armparams.h
- * @brief ARM7 LPC214x Specific Parameters.
- *
- * @defgroup ARM_LPC214x LPC214x Specific Parameters
- * @ingroup ARM_SPECIFIC
- * @details This file contains the ARM specific parameters for the
- * LPC214x platform.
- * @{
- */
-
-#ifndef _ARMPARAMS_H_
-#define _ARMPARAMS_H_
-
-/**
- * @brief ARM core model.
- */
-#define ARM_CORE ARM_CORE_ARM7TDMI
-
-/**
- * @brief LPC214x-specific wait for interrupt code.
- * @details This implementation writes 1 into the PCON register.
- */
-#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__)
-#if ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() { \
- (*((volatile uint32_t *)0xE01FC0C0)) = 1; \
-}
-#else
-#define port_wait_for_interrupt()
-#endif
-#endif
-
-#endif /* _ARMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARM/LPC214x/ld/LPC2148.ld b/os/ports/GCC/ARM/LPC214x/ld/LPC2148.ld deleted file mode 100644 index 8b15a3a16..000000000 --- a/os/ports/GCC/ARM/LPC214x/ld/LPC2148.ld +++ /dev/null @@ -1,108 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC2148 memory setup.
- */
-__und_stack_size__ = 0x0004;
-__abt_stack_size__ = 0x0004;
-__fiq_stack_size__ = 0x0010;
-__irq_stack_size__ = 0x0080;
-__svc_stack_size__ = 0x0004;
-__sys_stack_size__ = 0x0400;
-__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 512k - 12k
- ram : org = 0x40000200, len = 32k - 0x200 - 288
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-__dma_start__ = 0x7FD00000;
-__dma_size__ = 8k;
-__dma_end__ = 0x7FD00000 + __dma_size__;
-
-SECTIONS
-{
- . = 0;
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- _text = .;
- KEEP(*(vectors))
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.ctors)
- *(.dtors)
- } > flash
-
- .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
-
- __exidx_start = .;
- .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
- __exidx_end = .;
-
- .eh_frame_hdr : {*(.eh_frame_hdr)}
-
- .eh_frame : ONLY_IF_RO {*(.eh_frame)}
-
- . = ALIGN(4);
- _etext = .;
- _textdata = _etext;
-
- .data :
- {
- _data = .;
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- _edata = .;
- } > ram AT > flash
-
- .bss :
- {
- _bss_start = .;
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__ - __stacks_total_size__;
-__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
diff --git a/os/ports/GCC/ARM/LPC214x/port.mk b/os/ports/GCC/ARM/LPC214x/port.mk deleted file mode 100644 index 339f1d66a..000000000 --- a/os/ports/GCC/ARM/LPC214x/port.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS/RT ARM7 LPC214x port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/ARM/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/ARM/crt0.s \
- ${CHIBIOS}/os/ports/GCC/ARM/chcoreasm.s \
- ${CHIBIOS}/os/ports/GCC/ARM/LPC214x/vectors.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/ARM \
- ${CHIBIOS}/os/ports/GCC/ARM/LPC214x
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARM/LPC214x/ld
diff --git a/os/ports/GCC/ARM/LPC214x/vectors.s b/os/ports/GCC/ARM/LPC214x/vectors.s deleted file mode 100644 index bd554d6b9..000000000 --- a/os/ports/GCC/ARM/LPC214x/vectors.s +++ /dev/null @@ -1,101 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/LPC214x/vectors.s
- * @brief Interrupt vectors for the LPC214x family.
- *
- * @defgroup ARM_LPC214x_VECTORS LPC214x Interrupt Vectors
- * @ingroup ARM_SPECIFIC
- * @details Interrupt vectors for the LPC214x family.
- * @{
- */
-
-#if defined(__DOXYGEN__)
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-void _unhandled_exception(void) {}
-#endif
-
-#if !defined(__DOXYGEN__)
-
-.section vectors
-.code 32
-.balign 4
-/*
- * System entry points.
- */
-_start:
- ldr pc, _reset
- ldr pc, _undefined
- ldr pc, _swi
- ldr pc, _prefetch
- ldr pc, _abort
- nop
- ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
- ldr pc, _fiq
-
-_reset:
- .word ResetHandler /* In crt0.s */
-_undefined:
- .word UndHandler
-_swi:
- .word SwiHandler
-_prefetch:
- .word PrefetchHandler
-_abort:
- .word AbortHandler
-_fiq:
- .word FiqHandler
- .word 0
- .word 0
-
-/*
- * Default exceptions handlers. The handlers are declared weak in order to be
- * replaced by the real handling code. Everything is defaulted to an infinite
- * loop.
- */
-.weak UndHandler
-UndHandler:
-
-.weak SwiHandler
-SwiHandler:
-
-.weak PrefetchHandler
-PrefetchHandler:
-
-.weak AbortHandler
-AbortHandler:
-
-.weak FiqHandler
-FiqHandler:
-
-.global _unhandled_exception
-_unhandled_exception:
- b _unhandled_exception
-
-#endif
-
-/** @} */
diff --git a/os/ports/GCC/ARM/LPC214x/wfi.h b/os/ports/GCC/ARM/LPC214x/wfi.h deleted file mode 100644 index 765e6499d..000000000 --- a/os/ports/GCC/ARM/LPC214x/wfi.h +++ /dev/null @@ -1,36 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _WFI_H_
-#define _WFI_H_
-
-#include "lpc214x.h"
-
-#ifndef port_wait_for_interrupt
-#if ENABLE_WFI_IDLE != 0
-#define port_wait_for_interrupt() { \
- PCON = 1; \
-}
-#else
-#define port_wait_for_interrupt()
-#endif
-#endif
-
-#endif /* _WFI_H_ */
diff --git a/os/ports/GCC/ARM/chcore.c b/os/ports/GCC/ARM/chcore.c deleted file mode 100644 index 3c348c964..000000000 --- a/os/ports/GCC/ARM/chcore.c +++ /dev/null @@ -1,44 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/chcore.c
- * @brief ARM7/9 architecture port code.
- *
- * @addtogroup ARM_CORE
- * @{
- */
-
-#include "ch.h"
-
-/**
- * Halts the system.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/** @} */
diff --git a/os/ports/GCC/ARM/chcore.h b/os/ports/GCC/ARM/chcore.h deleted file mode 100644 index d1b6a1e12..000000000 --- a/os/ports/GCC/ARM/chcore.h +++ /dev/null @@ -1,478 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/chcore.h
- * @brief ARM7/9 architecture port macros and structures.
- *
- * @addtogroup ARM_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-/*===========================================================================*/
-/* Port constants. */
-/*===========================================================================*/
-
-/* Core variants identifiers.*/
-#define ARM_CORE_ARM7TDMI 7 /**< ARM77TDMI core identifier. */
-#define ARM_CORE_ARM9 9 /**< ARM9 core identifier. */
-
-/* Inclusion of the ARM implementation specific parameters.*/
-#include "armparams.h"
-
-/* ARM core check, only ARM7TDMI and ARM9 supported right now.*/
-#if (ARM_CORE == ARM_CORE_ARM7TDMI) || (ARM_CORE == ARM_CORE_ARM9)
-#else
-#error "unknown or unsupported ARM core"
-#endif
-
-/*===========================================================================*/
-/* Port statically derived parameters. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief If enabled allows the idle thread to enter a low power mode.
- */
-#ifndef ARM_ENABLE_WFI_IDLE
-#define ARM_ENABLE_WFI_IDLE FALSE
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Macro defining a generic ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM
-
-#if defined(__DOXYGEN__)
-/**
- * @brief Macro defining the specific ARM architecture.
- * @note This macro is for documentation only, the real name changes
- * depending on the selected architecture, the possible names are:
- * - CH_ARCHITECTURE_ARM7TDMI.
- * - CH_ARCHITECTURE_ARM9.
- * .
- */
-#define CH_ARCHITECTURE_ARMx
-
-/**
- * @brief Name of the implemented architecture.
- * @note The value is for documentation only, the real value changes
- * depending on the selected architecture, the possible values are:
- * - "ARM7".
- * - "ARM9".
- * .
- */
-#define CH_ARCHITECTURE_NAME "ARMx"
-
-/**
- * @brief Name of the architecture variant (optional).
- * @note The value is for documentation only, the real value changes
- * depending on the selected architecture, the possible values are:
- * - "ARM7TDMI"
- * - "ARM9"
- * .
- */
-#define CH_CORE_VARIANT_NAME "ARMxy"
-
-/**
- * @brief Port-specific information string.
- * @note The value is for documentation only, the real value changes
- * depending on the selected options, the possible values are:
- * - "Pure ARM"
- * - "Pure THUMB"
- * - "Interworking"
- * .
- */
-#define CH_PORT_INFO "ARM|THUMB|Interworking"
-
-#elif ARM_CORE == ARM_CORE_ARM7TDMI
-#define CH_ARCHITECTURE_ARM7TDMI
-#define CH_ARCHITECTURE_NAME "ARM7"
-#define CH_CORE_VARIANT_NAME "ARM7TDMI"
-
-#elif ARM_MODEL == ARM_VARIANT_ARM9
-#define CH_ARCHITECTURE_ARM9
-#define CH_ARCHITECTURE_NAME "ARM9"
-#define CH_CORE_VARIANT_NAME "ARM9"
-#endif
-
-#if THUMB_PRESENT
-#if THUMB_NO_INTERWORKING
-#define CH_PORT_INFO "Pure THUMB mode"
-#else /* !THUMB_NO_INTERWORKING */
-#define CH_PORT_INFO "Interworking mode"
-#endif /* !THUMB_NO_INTERWORKING */
-#else /* !THUMB_PRESENT */
-#define CH_PORT_INFO "Pure ARM mode"
-#endif /* !THUMB_PRESENT */
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "GCC " __VERSION__
-
-/*===========================================================================*/
-/* Port implementation part (common). */
-/*===========================================================================*/
-
-/**
- * @brief 32 bits stack and memory alignment enforcement.
- */
-typedef uint32_t stkalign_t;
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- */
-struct extctx {
- regarm_t spsr_irq;
- regarm_t lr_irq;
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_usr;
-};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
-struct intctx {
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t lr;
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = pf; \
- tp->p_ctx.r13->r5 = arg; \
- tp->p_ctx.r13->lr = _port_thread_start; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 4 because the idle thread does have
- * a stack frame when compiling without optimizations.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 4
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * This value can be zero on those architecture where there is a
- * separate interrupt stack and the stack space between @p intctx and
- * @p extctx is known to be zero.
- * @note In this port 0x10 is a safe value, it can be reduced after careful
- * analysis of the generated code.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 0x10
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- * @note This macro has a different implementation depending if compiled in
- * ARM or THUMB mode.
- * @note The THUMB implementation starts with ARM code because interrupt
- * vectors are always invoked in ARM mode regardless the bit 0
- * value. The switch in THUMB mode is done in the function prologue so
- * it is transparent to the user code.
- */
-#if !defined(PORT_IRQ_PROLOGUE)
-#ifdef THUMB
-#define PORT_IRQ_PROLOGUE() { \
- asm volatile (".code 32 \n\t" \
- "stmfd sp!, {r0-r3, r12, lr} \n\t" \
- "add r0, pc, #1 \n\t" \
- "bx r0 \n\t" \
- ".code 16" : : : "memory"); \
-}
-#else /* !THUMB */
-#define PORT_IRQ_PROLOGUE() { \
- asm volatile ("stmfd sp!, {r0-r3, r12, lr}" : : : "memory"); \
-}
-#endif /* !THUMB */
-#endif /* !defined(PORT_IRQ_PROLOGUE) */
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- * @note This macro has a different implementation depending if compiled in
- * ARM or THUMB mode.
- */
-#if !defined(PORT_IRQ_EPILOGUE)
-#ifdef THUMB
-#define PORT_IRQ_EPILOGUE() { \
- asm volatile ("ldr r0, =_port_irq_common \n\t" \
- "bx r0" : : : "memory"); \
-}
-#else /* !THUMB */
-#define PORT_IRQ_EPILOGUE() { \
- asm volatile ("b _port_irq_common" : : : "memory"); \
-}
-#endif /* !THUMB */
-#endif /* !defined(PORT_IRQ_EPILOGUE) */
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#if !defined(PORT_IRQ_HANDLER)
-#define PORT_IRQ_HANDLER(id) __attribute__((naked)) void id(void)
-#endif /* !defined(PORT_IRQ_HANDLER) */
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#if !defined(PORT_FAST_IRQ_HANDLER)
-#define PORT_FAST_IRQ_HANDLER(id) \
- __attribute__((interrupt("FIQ"))) void id(void)
-#endif /* !defined(PORT_FAST_IRQ_HANDLER) */
-
-/**
- * @brief Port-related initialization code.
- * @note This function is empty in this port.
- */
-#define port_init()
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- * @note In this port it disables the IRQ sources and keeps FIQ sources
- * enabled.
- */
-#ifdef THUMB
-#define port_lock() { \
- asm volatile ("bl _port_lock_thumb" : : : "r3", "lr", "memory"); \
-}
-#else /* !THUMB */
-#define port_lock() asm volatile ("msr CPSR_c, #0x9F" : : : "memory")
-#endif /* !THUMB */
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- * @note In this port it enables both the IRQ and FIQ sources.
- */
-#ifdef THUMB
-#define port_unlock() { \
- asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr", "memory"); \
-}
-#else /* !THUMB */
-#define port_unlock() asm volatile ("msr CPSR_c, #0x1F" : : : "memory")
-#endif /* !THUMB */
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Empty in this port.
- */
-#define port_lock_from_isr()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Empty in this port.
- */
-#define port_unlock_from_isr()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Of course non-maskable interrupt sources are not included.
- * @note In this port it disables both the IRQ and FIQ sources.
- * @note Implements a workaround for spurious interrupts taken from the NXP
- * LPC214x datasheet.
- */
-#ifdef THUMB
-#define port_disable() { \
- asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory"); \
-}
-#else /* !THUMB */
-#define port_disable() { \
- asm volatile ("mrs r3, CPSR \n\t" \
- "orr r3, #0x80 \n\t" \
- "msr CPSR_c, r3 \n\t" \
- "orr r3, #0x40 \n\t" \
- "msr CPSR_c, r3" : : : "r3", "memory"); \
-}
-#endif /* !THUMB */
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- * @note Interrupt sources above kernel level remains enabled.
- * @note In this port it disables the IRQ sources and enables the
- * FIQ sources.
- */
-#ifdef THUMB
-#define port_suspend() { \
- asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr", "memory"); \
-}
-#else /* !THUMB */
-#define port_suspend() asm volatile ("msr CPSR_c, #0x9F" : : : "memory")
-#endif /* !THUMB */
-
-/**
- * @brief Enables all the interrupt sources.
- * @note In this port it enables both the IRQ and FIQ sources.
- */
-#ifdef THUMB
-#define port_enable() { \
- asm volatile ("bl _port_enable_thumb" : : : "r3", "lr", "memory"); \
-}
-#else /* !THUMB */
-#define port_enable() asm volatile ("msr CPSR_c, #0x1F" : : : "memory")
-#endif /* !THUMB */
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- * @note Implemented as inlined code for performance reasons.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#ifdef THUMB
-#if CH_DBG_ENABLE_STACK_CHECK
-#define port_switch(ntp, otp) { \
- register struct intctx *r13 asm ("r13"); \
- if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch_thumb(ntp, otp); \
-}
-#else /* !CH_DBG_ENABLE_STACK_CHECK */
-#define port_switch(ntp, otp) _port_switch_thumb(ntp, otp)
-#endif /* !CH_DBG_ENABLE_STACK_CHECK */
-#else /* !THUMB */
-#if CH_DBG_ENABLE_STACK_CHECK
-#define port_switch(ntp, otp) { \
- register struct intctx *r13 asm ("r13"); \
- if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch_arm(ntp, otp); \
-}
-#else /* !CH_DBG_ENABLE_STACK_CHECK */
-#define port_switch(ntp, otp) _port_switch_arm(ntp, otp)
-#endif /* !CH_DBG_ENABLE_STACK_CHECK */
-#endif /* !THUMB */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_halt(void);
-#ifdef THUMB
- void _port_switch_thumb(Thread *ntp, Thread *otp);
-#else /* !THUMB */
- void _port_switch_arm(Thread *ntp, Thread *otp);
-#endif /* !THUMB */
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARM/chcoreasm.s b/os/ports/GCC/ARM/chcoreasm.s deleted file mode 100644 index 221ae4aec..000000000 --- a/os/ports/GCC/ARM/chcoreasm.s +++ /dev/null @@ -1,259 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/chcoreasm.s
- * @brief ARM7/9 architecture port low level code.
- *
- * @addtogroup ARM_CORE
- * @{
- */
-
-#include "chconf.h"
-
-#define FALSE 0
-#define TRUE 1
-
-#if !defined(__DOXYGEN__)
-
-.set MODE_USR, 0x10
-.set MODE_FIQ, 0x11
-.set MODE_IRQ, 0x12
-.set MODE_SVC, 0x13
-.set MODE_ABT, 0x17
-.set MODE_UND, 0x1B
-.set MODE_SYS, 0x1F
-
-.equ I_BIT, 0x80
-.equ F_BIT, 0x40
-
-.text
-
-/*
- * Interrupt enable/disable functions, only present if there is THUMB code in
- * the system because those are inlined in ARM code.
- */
-#ifdef THUMB_PRESENT
-.balign 16
-.code 16
-.thumb_func
-.global _port_disable_thumb
-_port_disable_thumb:
- mov r3, pc
- bx r3
-.code 32
- mrs r3, CPSR
- orr r3, #I_BIT
- msr CPSR_c, r3
- orr r3, #F_BIT
- msr CPSR_c, r3
- bx lr
-
-.balign 16
-.code 16
-.thumb_func
-.global _port_suspend_thumb
-_port_suspend_thumb:
-.thumb_func
-.global _port_lock_thumb
-_port_lock_thumb:
- mov r3, pc
- bx r3
-.code 32
- msr CPSR_c, #MODE_SYS | I_BIT
- bx lr
-
-.balign 16
-.code 16
-.thumb_func
-.global _port_enable_thumb
-_port_enable_thumb:
-.thumb_func
-.global _port_unlock_thumb
-_port_unlock_thumb:
- mov r3, pc
- bx r3
-.code 32
- msr CPSR_c, #MODE_SYS
- bx lr
-
-#endif
-
-.balign 16
-#ifdef THUMB_PRESENT
-.code 16
-.thumb_func
-.global _port_switch_thumb
-_port_switch_thumb:
- mov r2, pc
- bx r2
- // Jumps into _port_switch_arm in ARM mode
-#endif
-.code 32
-.global _port_switch_arm
-_port_switch_arm:
-#ifdef CH_CURRP_REGISTER_CACHE
- stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
- str sp, [r1, #12]
- ldr sp, [r0, #12]
-#ifdef THUMB_PRESENT
- ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
- bx lr
-#else /* !THUMB_PRESENT */
- ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
-#endif /* !THUMB_PRESENT */
-#else /* !CH_CURRP_REGISTER_CACHE */
- stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
- str sp, [r1, #12]
- ldr sp, [r0, #12]
-#ifdef THUMB_PRESENT
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
- bx lr
-#else /* !THUMB_PRESENT */
- ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
-#endif /* !THUMB_PRESENT */
-#endif /* !CH_CURRP_REGISTER_CACHE */
-
-/*
- * Common exit point for all IRQ routines, it performs the rescheduling if
- * required.
- * System stack frame structure after a context switch in the
- * interrupt handler:
- *
- * High +------------+
- * | LR_USR | -+
- * | R12 | |
- * | R3 | |
- * | R2 | | External context: IRQ handler frame
- * | R1 | |
- * | R0 | |
- * | PC | | (user code return address)
- * | PSR_USR | -+ (user code status)
- * | .... | <- chSchDoReschedule() stack frame, optimize it for space
- * | LR | -+ (system code return address)
- * | R11 | |
- * | R10 | |
- * | R9 | |
- * | R8 | | Internal context: chSysSwitch() frame
- * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
- * | R6 | |
- * | R5 | |
- * SP-> | R4 | -+
- * Low +------------+
- */
-.balign 16
-#ifdef THUMB_NO_INTERWORKING
-.code 16
-.thumb_func
-.globl _port_irq_common
-_port_irq_common:
- bl chSchIsPreemptionRequired
- mov lr, pc
- bx lr
-.code 32
-#else /* !THUMB_NO_INTERWORKING */
-.code 32
-.globl _port_irq_common
-_port_irq_common:
- bl chSchIsPreemptionRequired
-#endif /* !THUMB_NO_INTERWORKING */
- cmp r0, #0 // Simply returns if a
- ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
- subeqs pc, lr, #4 // required.
-
- // Saves the IRQ mode registers in the system stack.
- ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
- msr CPSR_c, #MODE_SYS | I_BIT
- stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack.
- msr CPSR_c, #MODE_IRQ | I_BIT
- mrs r0, SPSR
- mov r1, lr
- msr CPSR_c, #MODE_SYS | I_BIT
- stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
-
- // Context switch.
-#ifdef THUMB_NO_INTERWORKING
- add r0, pc, #1
- bx r0
-.code 16
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
- mov lr, pc
- bx lr
-.code 32
-#else /* !THUMB_NO_INTERWORKING */
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-#endif /* !THUMB_NO_INTERWORKING */
-
- // Re-establish the IRQ conditions again.
- ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
- msr CPSR_c, #MODE_IRQ | I_BIT
- msr SPSR_fsxc, r0
- mov lr, r1
- msr CPSR_c, #MODE_SYS | I_BIT
- ldmfd sp!, {r0-r3, r12, lr}
- msr CPSR_c, #MODE_IRQ | I_BIT
- subs pc, lr, #4
-
-/*
- * Threads trampoline code.
- * NOTE: The threads always start in ARM mode and then switches to the
- * thread-function mode.
- */
-.balign 16
-.code 32
-.globl _port_thread_start
-_port_thread_start:
-#if CH_DBG_SYSTEM_STATE_CHECK
- mov r0, #0
- ldr r1, =dbg_lock_cnt
- str r0, [r1]
-#endif
- msr CPSR_c, #MODE_SYS
-#ifndef THUMB_NO_INTERWORKING
- mov r0, r5
- mov lr, pc
- bx r4
- bl chThdExit
-#else /* !THUMB_NO_INTERWORKING */
- add r0, pc, #1
- bx r0
-.code 16
- mov r0, r5
- bl jmpr4
- bl chThdExit
-jmpr4:
- bx r4
-#endif /* !THUMB_NO_INTERWORKING */
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/ARM/chtypes.h b/os/ports/GCC/ARM/chtypes.h deleted file mode 100644 index 36bebf14f..000000000 --- a/os/ports/GCC/ARM/chtypes.h +++ /dev/null @@ -1,80 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/chtypes.h
- * @brief ARM7/9 architecture port system types.
- *
- * @addtogroup ARM_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Event Id. */
-typedef uint32_t eventmask_t; /**< Event mask. */
-typedef uint32_t flagsmask_t; /**< Event flags. */
-typedef uint32_t systime_t; /**< System time. */
-typedef int32_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note It uses the "packed" GCC attribute.
- */
-#define PACK_STRUCT_STRUCT __attribute__((packed))
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARM/crt0.s b/os/ports/GCC/ARM/crt0.s deleted file mode 100644 index 74df7f74e..000000000 --- a/os/ports/GCC/ARM/crt0.s +++ /dev/null @@ -1,162 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARM/crt0.s
- * @brief Generic ARM7/9 startup file for ChibiOS/RT.
- *
- * @addtogroup ARM_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- .set MODE_USR, 0x10
- .set MODE_FIQ, 0x11
- .set MODE_IRQ, 0x12
- .set MODE_SVC, 0x13
- .set MODE_ABT, 0x17
- .set MODE_UND, 0x1B
- .set MODE_SYS, 0x1F
-
- .set I_BIT, 0x80
- .set F_BIT, 0x40
-
- .text
- .code 32
- .balign 4
-
-/*
- * Reset handler.
- */
- .global ResetHandler
-ResetHandler:
- /*
- * Stack pointers initialization.
- */
- ldr r0, =__ram_end__
- /* Undefined */
- msr CPSR_c, #MODE_UND | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__und_stack_size__
- sub r0, r0, r1
- /* Abort */
- msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__abt_stack_size__
- sub r0, r0, r1
- /* FIQ */
- msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__fiq_stack_size__
- sub r0, r0, r1
- /* IRQ */
- msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__irq_stack_size__
- sub r0, r0, r1
- /* Supervisor */
- msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
- mov sp, r0
- ldr r1, =__svc_stack_size__
- sub r0, r0, r1
- /* System */
- msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
- mov sp, r0
-// ldr r1, =__sys_stack_size__
-// sub r0, r0, r1
- /*
- * Early initialization.
- */
-#ifndef THUMB_NO_INTERWORKING
- bl __early_init
-#else
- add r0, pc, #1
- bx r0
- .code 16
- bl __early_init
- mov r0, pc
- bx r0
- .code 32
-#endif
- /*
- * Data initialization.
- * NOTE: It assumes that the DATA size is a multiple of 4.
- */
- ldr r1, =_textdata
- ldr r2, =_data
- ldr r3, =_edata
-dataloop:
- cmp r2, r3
- ldrlo r0, [r1], #4
- strlo r0, [r2], #4
- blo dataloop
- /*
- * BSS initialization.
- * NOTE: It assumes that the BSS size is a multiple of 4.
- */
- mov r0, #0
- ldr r1, =_bss_start
- ldr r2, =_bss_end
-bssloop:
- cmp r1, r2
- strlo r0, [r1], #4
- blo bssloop
- /*
- * Main program invocation.
- */
-#ifdef THUMB_NO_INTERWORKING
- add r0, pc, #1
- bx r0
- .code 16
- bl main
- ldr r1, =_main_exit_handler
- bx r1
- .code 32
-#else
- bl main
- b _main_exit_handler
-#endif
-
-/*
- * Default main function exit handler.
- */
- .weak _main_exit_handler
- .global _main_exit_handler
-_main_exit_handler:
-.loop: b .loop
-
-/*
- * Default early initialization code. It is declared weak in order to be
- * replaced by the real initialization code.
- * Early initialization is performed just after reset before BSS and DATA
- * segments initialization.
- */
-#ifdef THUMB_NO_INTERWORKING
- .thumb_func
- .code 16
-#endif
- .weak __early_init
-hwinit0:
- bx lr
- .code 32
-#endif
-
-/** @} */
diff --git a/os/ports/GCC/ARM/port.dox b/os/ports/GCC/ARM/port.dox deleted file mode 100644 index 5f866d2c2..000000000 --- a/os/ports/GCC/ARM/port.dox +++ /dev/null @@ -1,226 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup ARM ARM7/9
- * @details ARM7/9 port for the GCC compiler.
- *
- * @section ARM_INTRO Introduction
- * The ARM7/9-GCC port supports the ARM7/9 core in the following three modes:
- * - <b>Pure ARM</b> mode, this is the preferred mode for code speed, this
- * mode increases the memory footprint however. This mode is enabled when
- * all the modules are compiled in ARM mode, see the Makefiles.
- * - <b>Pure THUMB</b> mode, this is the preferred mode for code size. In
- * this mode the execution speed is slower than the ARM mode. This mode
- * is enabled when all the modules are compiled in THUMB mode, see the
- * Makefiles.
- * - <b>Interworking</b> mode, when in the system there are ARM modules mixed
- * with THUMB modules then the interworking compiler option is enabled.
- * This is usually the slowest mode and the code size is not as good as
- * in pure THUMB mode.
- * .
- * @section ARM_STATES Mapping of the System States in the ARM7/9 port
- * The ChibiOS/RT logical system states are mapped as follow in the ARM7/9
- * port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated, usually the CPU goes through several
- * hardware states during the startup phase.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state the CPU has both the interrupt sources
- * (IRQ and FIQ) enabled and is running in ARM System Mode.
- * - <b>Suspended</b>. In this state the IRQ sources are disabled but the FIQ
- * sources are served, the core is running in ARM System Mode.
- * - <b>Disabled</b>. Both the IRQ and FIQ sources are disabled, the core is
- * running in ARM System Mode.
- * - <b>Sleep</b>. ARM7/9 cores does not have an explicit built-in low power
- * mode but there are clock stop modes implemented in custom ways by the
- * various silicon vendors. This state is implemented in each microcontroller
- * support code in a different way, the core is running (or freezed...)
- * in ARM System Mode.
- * - <b>S-Locked</b>. IRQ sources disabled, core running in ARM System Mode.
- * - <b>I-Locked</b>. IRQ sources disabled, core running in ARM IRQ Mode. Note
- * that this state is not different from the SRI state in this port, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. IRQ sources disabled, core running in
- * ARM IRQ Mode. See also the I-Locked state.
- * - <b>Serving Fast Interrupt</b>. IRQ and FIQ sources disabled, core running
- * in ARM FIQ Mode.
- * - <b>Serving Non-Maskable Interrupt</b>. There are no asynchronous NMI
- * sources in ARM7/9 architecture but synchronous SVC, ABT and UND exception
- * handlers can be seen as belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
- * and FIQ sources. The ARM state is whatever the processor was running when
- * @p chSysHalt() was invoked.
- * .
- * @section ARM_NOTES The ARM7/9 port notes
- * The ARM7/9 port is organized as follow:
- * - The @p main() function is invoked in system mode.
- * - Each thread has a private user/system stack, the system has a single
- * interrupt stack where all the interrupts are processed.
- * - The threads are started in system mode.
- * - The threads code can run in system mode or user mode, however the
- * code running in user mode cannot invoke the ChibiOS/RT APIs directly
- * because privileged instructions are used inside.<br>
- * The kernel APIs can be eventually invoked by using a SWI entry point
- * that handles the switch in system mode and the return in user mode.
- * - Other modes are not preempt-able because the system code assumes the
- * threads running in system mode. When running in supervisor or other
- * modes make sure that the interrupts are globally disabled.
- * - Interrupts nesting is not supported in the ARM7/9 port because their
- * implementation, even if possible, is not really efficient in this
- * architecture.
- * - FIQ sources can preempt the kernel (by design) so it is not possible to
- * invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not
- * affected by the kernel activity so there is not added jitter.
- * .
- * @section ARM_IH ARM7/9 Interrupt Handlers
- * In the current implementation the ARM7/9 Interrupt handlers do not save
- * function-saved registers so you need to make sure your code saves them
- * or does not use them (this happens because in the ARM7/9 port all the
- * OS interrupt handler functions are declared naked).<br>
- * Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the
- * system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().<br>
- * The easiest way to ensure this is to just invoke a normal function from
- * within the interrupt handler, the function code will save all the required
- * registers.<br>
- * Example:
- * @code
- * CH_IRQ_HANDLER(irq_handler) {
- * CH_IRQ_PROLOGUE();
- *
- * serve_interrupt();
- *
- * VICVectAddr = 0; // This is LPC214x-specific.
- * CH_IRQ_EPILOGUE();
- * }
- * @endcode
- * This is not a bug but an implementation choice, this solution allows to
- * have interrupt handlers compiled in thumb mode without have to use an
- * interworking mode (the mode switch is hidden in the macros), this
- * greatly improves code efficiency and size. You can look at the serial
- * driver for real examples of interrupt handlers.<br>
- * It is important that the serve_interrupt() interrupt function is not
- * inlined by the compiler into the ISR or the code could still modify
- * the unsaved registers, this can be accomplished using GCC by adding
- * the attribute "noinline" to the function:
- * @code
- * #if defined(__GNUC__)
- * __attribute__((noinline))
- * #endif
- * static void serve_interrupt(void) {
- * }
- * @endcode
- * Note that several commercial compilers support a GNU-like functions
- * attribute mechanism.<br>
- * Alternative ways are to use an appropriate pragma directive or disable
- * inlining optimizations in the modules containing the interrupt handlers.
- *
- * @ingroup gcc
- */
-
-/**
- * @defgroup ARM_CONF Configuration Options
- * @details ARM7/9 specific configuration options. The ARM7/9 port allows some
- * architecture-specific configurations settings that can be overridden by
- * redefining them in @p chconf.h. Usually there is no need to change the
- * default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
- * by an interrupt handler between the @p extctx and @p intctx
- * structures.<br>
- * In practice this value is the stack space used by the chSchDoReschedule()
- * stack frame.<br>
- * This value can be affected by a variety of external things like compiler
- * version, compiler options, kernel settings (speed/size) and so on.<br>
- * The default for this value is @p 0x10 which should be a safe value, you
- * can trim this down by defining the macro externally. This would save
- * some valuable RAM space for each thread present in the system.<br>
- * The default value is set into <b>./os/ports/GCC/ARM/chcore.h</b>.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
- * - @p ARM_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
- * an implementation-specific clock stop mode from within the idle loop.
- * This option is defaulted to FALSE because it can create problems with
- * some debuggers. Setting this option to TRUE reduces the system power
- * requirements.
- * .
- * @ingroup ARM
- */
-
-/**
- * @defgroup ARM_CORE Core Port Implementation
- * @details ARM7/9 specific port code, structures and macros.
- *
- * @ingroup ARM
- */
-
-/**
- * @defgroup ARM_STARTUP Startup Support
- * @details ARM7/9 startup code support. ChibiOS/RT provides its own generic
- * startup file for the ARM7/9 port. Of course it is not mandatory to use it
- * but care should be taken about the startup phase details.
- *
- * @section ARM_STARTUP_1 Startup Process
- * The startup process, as implemented, is the following:
- * -# The stacks are initialized by assigning them the sizes defined in the
- * linker script (usually named @p ch.ld). Stack areas are allocated from
- * the highest RAM location downward.
- * -# The ARM state is switched to System with both IRQ and FIQ sources
- * disabled.
- * -# An early initialization routine @p hwinit0 is invoked, if the symbol is
- * not defined then an empty default routine is executed (weak symbol).
- * -# DATA and BSS segments are initialized.
- * -# A late initialization routine @p hwinit1 is invoked, if the symbol not
- * defined then an empty default routine is executed (weak symbol).<br>
- * This late initialization function is also the proper place for a
- * @a bootloader, if your application requires one.
- * -# The @p main() function is invoked with the parameters @p argc and @p argv
- * set to zero.
- * -# Should the @p main() function return a branch is performed to the weak
- * symbol _main_exit_handler. The default code is an endless empty loop.
- * .
- * @section ARM_STARTUP_2 Expected linker symbols
- * The startup code starts at the symbol @p ResetHandler and expects the
- * following symbols to be defined in the linker script:
- * - @p __ram_end__ RAM end location +1.
- * - @p __und_stack_size__ Undefined Instruction stack size.
- * - @p __abt_stack_size__ Memory Abort stack size.
- * - @p __fiq_stack_size__ FIQ service stack size.
- * - @p __irq_stack_size__ IRQ service stack size.
- * - @p __svc_stack_size__ SVC service stack size.
- * - @p __sys_stack_size__ System/User stack size. This is the stack area used
- * by the @p main() function.
- * - @p _textdata address of the data segment source read only data.
- * - @p _data data segment start location.
- * - @p _edata data segment end location +1.
- * - @p _bss_start BSS start location.
- * - @p _bss_end BSS end location +1.
- * .
- * @ingroup ARM
- */
-
-/**
- * @defgroup ARM_SPECIFIC Specific Implementations
- * @details Platform-specific port code.
- *
- * @ingroup ARM
- */
diff --git a/os/ports/GCC/ARM/rules.mk b/os/ports/GCC/ARM/rules.mk deleted file mode 100644 index 40fa8c9e2..000000000 --- a/os/ports/GCC/ARM/rules.mk +++ /dev/null @@ -1,220 +0,0 @@ -# ARM7/9 common makefile scripts and rules.
-
-# Output directory and files
-ifeq ($(BUILDDIR),)
- BUILDDIR = build
-endif
-ifeq ($(BUILDDIR),.)
- BUILDDIR = build
-endif
-OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
- $(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp
-
-# Automatic compiler options
-OPT = $(USE_OPT)
-COPT = $(USE_COPT)
-CPPOPT = $(USE_CPPOPT)
-ifeq ($(USE_LINK_GC),yes)
- OPT += -ffunction-sections -fdata-sections
-endif
-
-# Source files groups and paths
-ifeq ($(USE_THUMB),yes)
- TCSRC += $(CSRC)
- TCPPSRC += $(CPPSRC)
-else
- ACSRC += $(CSRC)
- ACPPSRC += $(CPPSRC)
-endif
-ASRC = $(ACSRC)$(ACPPSRC)
-TSRC = $(TCSRC)$(TCPPSRC)
-SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
-
-# Various directories
-OBJDIR = $(BUILDDIR)/obj
-LSTDIR = $(BUILDDIR)/lst
-
-# Object files groups
-ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
-ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
-TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
-TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
-ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
-ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
-OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
-
-# Paths
-IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
-LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-
-# Macros
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-
-# Libs
-LIBS = $(DLIBS) $(ULIBS)
-
-# Various settings
-MCFLAGS = -mcpu=$(MCU)
-ODFLAGS = -x --syms
-ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
-ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
-CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
-CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
-ifeq ($(USE_LINK_GC),yes)
- LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)
-else
- LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)
-endif
-
-# Thumb interwork enabled only if needed because it kills performance.
-ifneq ($(TSRC),)
- CFLAGS += -DTHUMB_PRESENT
- CPPFLAGS += -DTHUMB_PRESENT
- ASFLAGS += -DTHUMB_PRESENT
- ifneq ($(ASRC),)
- # Mixed ARM and THUMB mode.
- CFLAGS += -mthumb-interwork
- CPPFLAGS += -mthumb-interwork
- ASFLAGS += -mthumb-interwork
- LDFLAGS += -mthumb-interwork
- else
- # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
- CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- LDFLAGS += -mno-thumb-interwork -mthumb
- endif
-else
- # Pure ARM mode
- CFLAGS += -mno-thumb-interwork
- CPPFLAGS += -mno-thumb-interwork
- ASFLAGS += -mno-thumb-interwork
- LDFLAGS += -mno-thumb-interwork
-endif
-
-# Generate dependency information
-CFLAGS += -MD -MP -MF .dep/$(@F).d
-CPPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-# Paths where to search for sources
-VPATH = $(SRCPATHS)
-
-#
-# Makefile rules
-#
-
-all: $(OBJS) $(OUTFILES) MAKE_ALL_RULE_HOOK
-
-MAKE_ALL_RULE_HOOK:
-
-$(OBJS): | $(BUILDDIR)
-
-$(BUILDDIR) $(OBJDIR) $(LSTDIR):
-ifneq ($(USE_VERBOSE_COMPILE),yes)
- @echo Compiler Options
- @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
- @echo
-endif
- mkdir -p $(OBJDIR)
- mkdir -p $(LSTDIR)
-
-$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $<
- @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $<
- @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $<
- @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $<
- @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $<
- @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $<
- @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-%.elf: $(OBJS) $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-else
- @echo Linking $@
- @$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-endif
-
-%.hex: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(HEX) $< $@
-else
- @echo Creating $@
- @$(HEX) $< $@
-endif
-
-%.bin: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(BIN) $< $@
-else
- @echo Creating $@
- @$(BIN) $< $@
-endif
-
-%.dmp: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) $(ODFLAGS) $< > $@
-else
- @echo Creating $@
- @$(OD) $(ODFLAGS) $< > $@
- @echo Done
-endif
-
-clean:
- @echo Cleaning
- -rm -fR .dep $(BUILDDIR)
- @echo Done
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF ***
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h deleted file mode 100644 index d2a8fbf3a..000000000 --- a/os/ports/GCC/ARMCMx/LPC11xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC11xx/cmparams.h
- * @brief ARM Cortex-M0 parameters for the LPC11xx.
- *
- * @defgroup ARMCMx_LPC11xx LPC11xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0 specific parameters for the
- * LPC11xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC1114.ld b/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC1114.ld deleted file mode 100644 index bbd5c3e80..000000000 --- a/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC1114.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC1114 memory setup.
- */
-__main_stack_size__ = 0x0200;
-__process_stack_size__ = 0x0200;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 32k
- ram : org = 0x10000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC11C24.ld b/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC11C24.ld deleted file mode 100644 index 1022db9ab..000000000 --- a/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC11C24.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC11C24 memory setup.
- */
-__main_stack_size__ = 0x0200;
-__process_stack_size__ = 0x0200;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 32k
- ram : org = 0x10000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC11U14.ld b/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC11U14.ld deleted file mode 100644 index be3e83952..000000000 --- a/os/ports/GCC/ARMCMx/LPC11xx/ld/LPC11U14.ld +++ /dev/null @@ -1,153 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC11U14 memory setup.
- */
-__main_stack_size__ = 0x0100;
-__process_stack_size__ = 0x0200;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 32k
- ram : org = 0x10000000, len = 4k
- usbram : org = 0x20004000, len = 2k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/port.mk b/os/ports/GCC/ARMCMx/LPC11xx/port.mk deleted file mode 100644 index 8bfd25ad3..000000000 --- a/os/ports/GCC/ARMCMx/LPC11xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M0 LPC11xx port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC11xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC11xx/ld
diff --git a/os/ports/GCC/ARMCMx/LPC11xx/vectors.c b/os/ports/GCC/ARMCMx/LPC11xx/vectors.c deleted file mode 100644 index 4ab02d632..000000000 --- a/os/ports/GCC/ARMCMx/LPC11xx/vectors.c +++ /dev/null @@ -1,198 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC11xx/vectors.c
- * @brief Interrupt vectors for the LPC11xx family.
- *
- * @defgroup ARMCMx_LPC11xx_VECTORS LPC11xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the LPC11xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[32];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-#endif
-
-/**
- * @brief LPC11xx vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC122x/cmparams.h b/os/ports/GCC/ARMCMx/LPC122x/cmparams.h deleted file mode 100644 index b70ce42a3..000000000 --- a/os/ports/GCC/ARMCMx/LPC122x/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC13xx/cmparams.h
- * @brief ARM Cortex-M0 LPC122x Specific Parameters.
- *
- * @defgroup ARMCMx_LPC122x LPC122x Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0 specific parameters for the
- * LPC122x platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC122x/ld/LPC1227.ld b/os/ports/GCC/ARMCMx/LPC122x/ld/LPC1227.ld deleted file mode 100644 index b7171526d..000000000 --- a/os/ports/GCC/ARMCMx/LPC122x/ld/LPC1227.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC1227 memory setup.
- */
-__main_stack_size__ = 0x0200;
-__process_stack_size__ = 0x0200;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 128k
- ram : org = 0x10000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/LPC122x/port.mk b/os/ports/GCC/ARMCMx/LPC122x/port.mk deleted file mode 100644 index 475861ee2..000000000 --- a/os/ports/GCC/ARMCMx/LPC122x/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M0 LPC122x port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC122x
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC122x/ld
diff --git a/os/ports/GCC/ARMCMx/LPC122x/vectors.c b/os/ports/GCC/ARMCMx/LPC122x/vectors.c deleted file mode 100644 index 39e4007a3..000000000 --- a/os/ports/GCC/ARMCMx/LPC122x/vectors.c +++ /dev/null @@ -1,198 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC122x/vectors.c
- * @brief Interrupt vectors for the LPC122x family.
- *
- * @defgroup ARMCMx_LPC122x_VECTORS LPC122x Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the LPC122x family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[32];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-#endif
-
-/**
- * @brief LPC11xx vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h deleted file mode 100644 index 6804ea993..000000000 --- a/os/ports/GCC/ARMCMx/LPC13xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC13xx/cmparams.h
- * @brief ARM Cortex-M3 LPC13xx Specific Parameters.
- *
- * @defgroup ARMCMx_LPC13xx LPC13xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * LPC13xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 3
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/ld/LPC1343.ld b/os/ports/GCC/ARMCMx/LPC13xx/ld/LPC1343.ld deleted file mode 100644 index dfc1d94fe..000000000 --- a/os/ports/GCC/ARMCMx/LPC13xx/ld/LPC1343.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC1343 memory setup.
- */
-__main_stack_size__ = 0x0200;
-__process_stack_size__ = 0x0200;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 32k
- ram : org = 0x10000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/port.mk b/os/ports/GCC/ARMCMx/LPC13xx/port.mk deleted file mode 100644 index fa392c5d5..000000000 --- a/os/ports/GCC/ARMCMx/LPC13xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M0 LPC13xx port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC13xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC13xx/ld
diff --git a/os/ports/GCC/ARMCMx/LPC13xx/vectors.c b/os/ports/GCC/ARMCMx/LPC13xx/vectors.c deleted file mode 100644 index 1537dc13f..000000000 --- a/os/ports/GCC/ARMCMx/LPC13xx/vectors.c +++ /dev/null @@ -1,257 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC13xx/vectors.c
- * @brief Interrupt vectors for the LPC13xx family.
- *
- * @defgroup ARMCMx_LPC13xx_VECTORS LPC13xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the LPC13xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[58];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-extern void VectorC0(void);
-extern void VectorC4(void);
-extern void VectorC8(void);
-extern void VectorCC(void);
-extern void VectorD0(void);
-extern void VectorD4(void);
-extern void VectorD8(void);
-extern void VectorDC(void);
-extern void VectorE0(void);
-extern void VectorE4(void);
-extern void VectorE8(void);
-extern void VectorEC(void);
-extern void VectorF0(void);
-extern void VectorF4(void);
-extern void VectorF8(void);
-extern void VectorFC(void);
-extern void Vector100(void);
-extern void Vector104(void);
-extern void Vector108(void);
-extern void Vector10C(void);
-extern void Vector110(void);
-extern void Vector114(void);
-extern void Vector118(void);
-extern void Vector11C(void);
-extern void Vector120(void);
-extern void Vector124(void);
-#endif
-
-/**
- * @brief LPC13xx vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC,
- VectorC0, VectorC4, VectorC8, VectorCC,
- VectorD0, VectorD4, VectorD8, VectorDC,
- VectorE0, VectorE4, VectorE8, VectorEC,
- VectorF0, VectorF4, VectorF8, VectorFC,
- Vector100, Vector104, Vector108, Vector10C,
- Vector110, Vector114, Vector118, Vector11C,
- Vector120, Vector124
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC8xx/cmparams.h b/os/ports/GCC/ARMCMx/LPC8xx/cmparams.h deleted file mode 100644 index da25ac6a2..000000000 --- a/os/ports/GCC/ARMCMx/LPC8xx/cmparams.h +++ /dev/null @@ -1,60 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC8xx/cmparams.h
- * @brief ARM Cortex-M0+ parameters for the LPC8xx.
- *
- * @defgroup ARMCMx_LPC8xx LPC8xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0+ specific parameters for the
- * LPC8xx platform.
- * (Taken from the device header file where possible)
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-#include "LPC8xx.h"
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL __CORTEX_M
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU __MPU_PRESENT
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS __NVIC_PRIO_BITS
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/LPC8xx/ld/LPC812.ld b/os/ports/GCC/ARMCMx/LPC8xx/ld/LPC812.ld deleted file mode 100644 index 6973f6ddb..000000000 --- a/os/ports/GCC/ARMCMx/LPC8xx/ld/LPC812.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * LPC812 memory setup.
- */
-__main_stack_size__ = 0x0100;
-__process_stack_size__ = 0x0100;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 16k
- ram : org = 0x10000000, len = 4k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/LPC8xx/port.mk b/os/ports/GCC/ARMCMx/LPC8xx/port.mk deleted file mode 100644 index 9353ee68b..000000000 --- a/os/ports/GCC/ARMCMx/LPC8xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M0 LPC8xx port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC8xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC8xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC8xx/ld
diff --git a/os/ports/GCC/ARMCMx/LPC8xx/vectors.c b/os/ports/GCC/ARMCMx/LPC8xx/vectors.c deleted file mode 100644 index f4685dae8..000000000 --- a/os/ports/GCC/ARMCMx/LPC8xx/vectors.c +++ /dev/null @@ -1,199 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/LPC8xx/vectors.c
- * @brief Interrupt vectors for the LPC8xx family.
- *
- * @defgroup ARMCMx_LPC8xx_VECTORS LPC8xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the LPC8xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[32];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void Vector10(void);
-extern void Vector14(void);
-extern void Vector18(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void Vector30(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-#endif
-
-/**
- * @brief LPC8xx vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- Vector10, Vector14, Vector18, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- Vector30, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector10(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector14(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector18(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector30(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/SAM4L/cmparams.h b/os/ports/GCC/ARMCMx/SAM4L/cmparams.h deleted file mode 100644 index 18553d53c..000000000 --- a/os/ports/GCC/ARMCMx/SAM4L/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/SAM4L/cmparams.h
- * @brief ARM Cortex-M4 parameters for the ATSAM4L.
- *
- * @defgroup ARMCMx_SAM4L ATSAM4L Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * ATSAM4L platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/SAM4L/ld/ATSAM4LC4C.ld b/os/ports/GCC/ARMCMx/SAM4L/ld/ATSAM4LC4C.ld deleted file mode 100644 index 9d363f929..000000000 --- a/os/ports/GCC/ARMCMx/SAM4L/ld/ATSAM4LC4C.ld +++ /dev/null @@ -1,153 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ATSAM4LC4C memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 256k
- ram : org = 0x20000000, len = 32k
- ram2 : org = 0x21000000, len = 2k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/SAM4L/port.mk b/os/ports/GCC/ARMCMx/SAM4L/port.mk deleted file mode 100644 index 296a45d45..000000000 --- a/os/ports/GCC/ARMCMx/SAM4L/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4 STM32 port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/SAM4L/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/SAM4L
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/SAM4L/ld
diff --git a/os/ports/GCC/ARMCMx/SAM4L/vectors.c b/os/ports/GCC/ARMCMx/SAM4L/vectors.c deleted file mode 100644 index e7a3290ef..000000000 --- a/os/ports/GCC/ARMCMx/SAM4L/vectors.c +++ /dev/null @@ -1,306 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/SAM4L/vectors.c
- * @brief Interrupt vectors for the ATSAM4L family.
- *
- * @defgroup ARMCMx_SAM4L_VECTORS ATSAM4L Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the ATSAM4L family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[80];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void HFLASHC_Handler(void);
-extern void PDCA_0_Handler(void);
-extern void PDCA_1_Handler(void);
-extern void PDCA_2_Handler(void);
-extern void PDCA_3_Handler(void);
-extern void PDCA_4_Handler(void);
-extern void PDCA_5_Handler(void);
-extern void PDCA_6_Handler(void);
-extern void PDCA_7_Handler(void);
-extern void PDCA_8_Handler(void);
-extern void PDCA_9_Handler(void);
-extern void PDCA_10_Handler(void);
-extern void PDCA_11_Handler(void);
-extern void PDCA_12_Handler(void);
-extern void PDCA_13_Handler(void);
-extern void PDCA_14_Handler(void);
-extern void PDCA_15_Handler(void);
-extern void CRCCU_Handler(void);
-extern void USBC_Handler(void);
-extern void PEVC_TR_Handler(void);
-extern void PEVC_OV_Handler(void);
-extern void AESA_Handler(void);
-extern void PM_Handler(void);
-extern void SCIF_Handler(void);
-extern void FREQM_Handler(void);
-extern void GPIO_0_Handler(void);
-extern void GPIO_1_Handler(void);
-extern void GPIO_2_Handler(void);
-extern void GPIO_3_Handler(void);
-extern void GPIO_4_Handler(void);
-extern void GPIO_5_Handler(void);
-extern void GPIO_6_Handler(void);
-extern void GPIO_7_Handler(void);
-extern void GPIO_8_Handler(void);
-extern void GPIO_9_Handler(void);
-extern void GPIO_10_Handler(void);
-extern void GPIO_11_Handler(void);
-extern void BPM_Handler(void);
-extern void BSCIF_Handler(void);
-extern void AST_ALARM_Handler(void);
-extern void AST_PER_Handler(void);
-extern void AST_OVF_Handler(void);
-extern void AST_READY_Handler(void);
-extern void AST_CLKREADY_Handler(void);
-extern void WDT_Handler(void);
-extern void EIC_1_Handler(void);
-extern void EIC_2_Handler(void);
-extern void EIC_3_Handler(void);
-extern void EIC_4_Handler(void);
-extern void EIC_5_Handler(void);
-extern void EIC_6_Handler(void);
-extern void EIC_7_Handler(void);
-extern void EIC_8_Handler(void);
-extern void IISC_Handler(void);
-extern void SPI_Handler(void);
-extern void TC00_Handler(void);
-extern void TC01_Handler(void);
-extern void TC02_Handler(void);
-extern void TC010_Handler(void);
-extern void TC011_Handler(void);
-extern void TC012_Handler(void);
-extern void TWIM0_Handler(void);
-extern void TWIS0_Handler(void);
-extern void TWIM1_Handler(void);
-extern void TWIS1_Handler(void);
-extern void USART0_Handler(void);
-extern void USART1_Handler(void);
-extern void USART2_Handler(void);
-extern void USART3_Handler(void);
-extern void ADCIFE_Handler(void);
-extern void DACC_Handler(void);
-extern void ACIFC_Handler(void);
-extern void ABDACB_Handler(void);
-extern void TRNG_Handler(void);
-extern void PARC_Handler(void);
-extern void CATB_Handler(void);
-extern void Dummy_Handler(void);
-extern void TWIM2_Handler(void);
-extern void TWIM3_Handler(void);
-extern void LCDCA_Handler(void);
-#endif
-
-/**
- * @brief STM32 vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- HFLASHC_Handler, PDCA_0_Handler, PDCA_1_Handler, PDCA_2_Handler,
- PDCA_3_Handler, PDCA_4_Handler, PDCA_5_Handler, PDCA_6_Handler,
- PDCA_7_Handler, PDCA_8_Handler, PDCA_9_Handler, PDCA_10_Handler,
- PDCA_11_Handler, PDCA_12_Handler, PDCA_13_Handler, PDCA_14_Handler,
- PDCA_15_Handler, CRCCU_Handler, USBC_Handler, PEVC_TR_Handler,
- PEVC_OV_Handler, AESA_Handler, PM_Handler, SCIF_Handler,
- FREQM_Handler, GPIO_0_Handler, GPIO_1_Handler, GPIO_2_Handler,
- GPIO_3_Handler, GPIO_4_Handler, GPIO_5_Handler, GPIO_6_Handler,
- GPIO_7_Handler, GPIO_8_Handler, GPIO_9_Handler, GPIO_10_Handler,
- GPIO_11_Handler, BPM_Handler, BSCIF_Handler, AST_ALARM_Handler,
- AST_PER_Handler, AST_OVF_Handler, AST_READY_Handler, AST_CLKREADY_Handler,
- WDT_Handler, EIC_1_Handler, EIC_2_Handler, EIC_3_Handler,
- EIC_4_Handler, EIC_5_Handler, EIC_6_Handler, EIC_7_Handler,
- EIC_8_Handler, IISC_Handler, SPI_Handler, TC00_Handler,
- TC01_Handler, TC02_Handler, TC010_Handler, TC011_Handler,
- TC012_Handler, TWIM0_Handler, TWIS0_Handler, TWIM1_Handler,
- TWIS1_Handler, USART0_Handler, USART1_Handler, USART2_Handler,
- USART3_Handler, ADCIFE_Handler, DACC_Handler, ACIFC_Handler,
- ABDACB_Handler, TRNG_Handler, PARC_Handler, CATB_Handler,
- Dummy_Handler, TWIM2_Handler, TWIM3_Handler, LCDCA_Handler
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HFLASHC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_4_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_5_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_6_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_7_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_8_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_9_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_10_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_11_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_12_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_13_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_14_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PDCA_15_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void CRCCU_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void USBC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PEVC_TR_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PEVC_OV_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void AESA_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void SCIF_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void FREQM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_4_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_5_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_6_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_7_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_8_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_9_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_10_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void GPIO_11_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void BPM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void BSCIF_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void AST_ALARM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void AST_PER_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void AST_OVF_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void AST_READY_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void AST_CLKREADY_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void WDT_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_4_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_5_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_6_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_7_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void EIC_8_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void IISC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void SPI_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TC00_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TC01_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TC02_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TC010_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TC011_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TC012_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TWIM0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TWIS0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TWIM1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TWIS1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void USART0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void USART1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void USART2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void USART3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void ADCIFE_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void DACC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void ACIFC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void ABDACB_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TRNG_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void PARC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void CATB_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void Dummy_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TWIM2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void TWIM3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-void LCDCA_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F0xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F0xx/cmparams.h deleted file mode 100644 index d94591461..000000000 --- a/os/ports/GCC/ARMCMx/STM32F0xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F0xx/cmparams.h
- * @brief ARM Cortex-M0 parameters for the STM32F0xx.
- *
- * @defgroup ARMCMx_STM32F0xx STM32F0xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0 specific parameters for the
- * STM32F0xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F0xx/ld/STM32F051x8.ld b/os/ports/GCC/ARMCMx/STM32F0xx/ld/STM32F051x8.ld deleted file mode 100644 index 31c34bbf2..000000000 --- a/os/ports/GCC/ARMCMx/STM32F0xx/ld/STM32F051x8.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F051x8 memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 64k
- ram : org = 0x20000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F0xx/port.mk b/os/ports/GCC/ARMCMx/STM32F0xx/port.mk deleted file mode 100644 index 5cb296a2b..000000000 --- a/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M0 STM32 port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F0xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F0xx/ld
diff --git a/os/ports/GCC/ARMCMx/STM32F0xx/vectors.c b/os/ports/GCC/ARMCMx/STM32F0xx/vectors.c deleted file mode 100644 index 5bd49cde8..000000000 --- a/os/ports/GCC/ARMCMx/STM32F0xx/vectors.c +++ /dev/null @@ -1,198 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F0xx/vectors.c
- * @brief Interrupt vectors for the STM32F0xx family.
- *
- * @defgroup ARMCMx_STM32F0xx_VECTORS STM32F0xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the STM32F0xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[32];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-#endif
-
-/**
- * @brief STM32 vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h deleted file mode 100644 index 6a7d9113b..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F1xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F1xx.
- *
- * @defgroup ARMCMx_STM32F1xx STM32F1xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * STM32F1xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F100xB.ld b/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F100xB.ld deleted file mode 100644 index b33f6da63..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F100xB.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F100xB memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 128k
- ram : org = 0x20000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xB.ld b/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xB.ld deleted file mode 100644 index 4f29f6702..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xB.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F103xB memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 128k
- ram : org = 0x20000000, len = 20k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xD.ld b/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xD.ld deleted file mode 100644 index 01dda22b8..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xD.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F103xE memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 384k
- ram : org = 0x20000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xE.ld b/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xE.ld deleted file mode 100644 index fe5662ab8..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xE.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F103xE memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 512k
- ram : org = 0x20000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xG.ld b/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xG.ld deleted file mode 100644 index 8bb4a5c9b..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F103xG.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F103xG memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 1m
- ram : org = 0x20000000, len = 96k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F107xC.ld b/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F107xC.ld deleted file mode 100644 index 51789d096..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/ld/STM32F107xC.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F107xC memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 256k
- ram : org = 0x20000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/port.mk b/os/ports/GCC/ARMCMx/STM32F1xx/port.mk deleted file mode 100644 index 1ba6c672e..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M3 STM32 port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F1xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F1xx/ld
diff --git a/os/ports/GCC/ARMCMx/STM32F1xx/vectors.c b/os/ports/GCC/ARMCMx/STM32F1xx/vectors.c deleted file mode 100644 index 3fe2ab33e..000000000 --- a/os/ports/GCC/ARMCMx/STM32F1xx/vectors.c +++ /dev/null @@ -1,330 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F1xx/vectors.c
- * @brief Interrupt vectors for the STM32F1xx family.
- *
- * @defgroup ARMCMx_STM32F1xx_VECTORS STM32F1xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the STM32F1xx family.
- * One of the following macros must be defined on the
- * compiler command line or in a file named <tt>board.h</tt>:
- * - @p STM32F10X_LD
- * - @p STM32F10X_LD_VL
- * - @p STM32F10X_MD
- * - @p STM32F10X_MD_VL
- * - @p STM32F10X_HD
- * - @p STM32F10X_XL
- * - @p STM32F10X_CL
- * .
- * This is required in order to include a vectors table with
- * the correct length for the specified STM32 model.
- * @{
- */
-
-#include "ch.h"
-
-#if !defined(STM32F10X_LD) && !defined(STM32F10X_LD_VL) && \
- !defined(STM32F10X_MD) && !defined(STM32F10X_MD_VL) && \
- !defined(STM32F10X_HD) && !defined(STM32F10X_XL) && \
- !defined(STM32F10X_CL)
-#include "board.h"
-#endif
-
-#if defined(STM32F10X_MD_VL) || defined(__DOXYGEN__)
-#define NUM_VECTORS 46
-#elif defined(STM32F10X_HD) || defined(STM32F10X_XL)
-#define NUM_VECTORS 60
-#elif defined(STM32F10X_CL)
-#define NUM_VECTORS 68
-#else
-#define NUM_VECTORS 43
-#endif
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[NUM_VECTORS];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-extern void VectorC0(void);
-extern void VectorC4(void);
-extern void VectorC8(void);
-extern void VectorCC(void);
-extern void VectorD0(void);
-extern void VectorD4(void);
-extern void VectorD8(void);
-extern void VectorDC(void);
-extern void VectorE0(void);
-extern void VectorE4(void);
-extern void VectorE8(void);
-#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
- defined(STM32F10X_XL) || defined(STM32F10X_CL)
-extern void VectorEC(void);
-extern void VectorF0(void);
-extern void VectorF4(void);
-#endif
-#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
-extern void VectorF8(void);
-extern void VectorFC(void);
-extern void Vector100(void);
-extern void Vector104(void);
-extern void Vector108(void);
-extern void Vector10C(void);
-extern void Vector110(void);
-extern void Vector114(void);
-extern void Vector118(void);
-extern void Vector11C(void);
-extern void Vector120(void);
-extern void Vector124(void);
-extern void Vector128(void);
-extern void Vector12C(void);
-#endif
-#if defined(STM32F10X_CL)
-extern void Vector130(void);
-extern void Vector134(void);
-extern void Vector138(void);
-extern void Vector13C(void);
-extern void Vector140(void);
-extern void Vector144(void);
-extern void Vector148(void);
-extern void Vector14C(void);
-#endif
-#endif
-
-/**
- * @brief STM32 vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC,
- VectorC0, VectorC4, VectorC8, VectorCC,
- VectorD0, VectorD4, VectorD8, VectorDC,
- VectorE0, VectorE4, VectorE8,
-#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
- defined(STM32F10X_XL) || defined(STM32F10X_CL)
- VectorEC, VectorF0, VectorF4,
-#endif
-#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
- VectorF8, VectorFC, Vector100, Vector104,
- Vector108, Vector10C, Vector110, Vector114,
- Vector118, Vector11C, Vector120, Vector124,
- Vector128, Vector12C,
-#endif
-#if defined(STM32F10X_CL)
- Vector130, Vector134, Vector138, Vector13C,
- Vector140, Vector144, Vector148, Vector14C
-#endif
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
-#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
- defined(STM32F10X_XL) || defined(STM32F10X_CL)
-void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
-#endif
-#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
-void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
-#endif
-#if defined(STM32F10X_CL)
-void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
-#endif
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F2xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F2xx/cmparams.h deleted file mode 100644 index 3bb30ff07..000000000 --- a/os/ports/GCC/ARMCMx/STM32F2xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F2xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F2xx.
- *
- * @defgroup ARMCMx_STM32F2xx STM32F2xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * STM32F2xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F2xx/ld/STM32F205xB.ld b/os/ports/GCC/ARMCMx/STM32F2xx/ld/STM32F205xB.ld deleted file mode 100644 index 03e741c6d..000000000 --- a/os/ports/GCC/ARMCMx/STM32F2xx/ld/STM32F205xB.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F205xB memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 128k
- ram : org = 0x20000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F2xx/ld/STM32F207xG.ld b/os/ports/GCC/ARMCMx/STM32F2xx/ld/STM32F207xG.ld deleted file mode 100644 index df4b4f2ad..000000000 --- a/os/ports/GCC/ARMCMx/STM32F2xx/ld/STM32F207xG.ld +++ /dev/null @@ -1,153 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F207xG memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 1M
- ram : org = 0x20000000, len = 112k
- ethram : org = 0x2001C000, len = 16k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F2xx/port.mk b/os/ports/GCC/ARMCMx/STM32F2xx/port.mk deleted file mode 100644 index 95104160c..000000000 --- a/os/ports/GCC/ARMCMx/STM32F2xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M3 STM32 port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F2xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F2xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F2xx/ld
diff --git a/os/ports/GCC/ARMCMx/STM32F2xx/vectors.c b/os/ports/GCC/ARMCMx/STM32F2xx/vectors.c deleted file mode 100644 index f516f1ab8..000000000 --- a/os/ports/GCC/ARMCMx/STM32F2xx/vectors.c +++ /dev/null @@ -1,309 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F2xx/vectors.c
- * @brief Interrupt vectors for the STM32F2xx family.
- *
- * @defgroup ARMCMx_STM32F2xx_VECTORS STM32F2xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the STM32F2xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[81];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-extern void VectorC0(void);
-extern void VectorC4(void);
-extern void VectorC8(void);
-extern void VectorCC(void);
-extern void VectorD0(void);
-extern void VectorD4(void);
-extern void VectorD8(void);
-extern void VectorDC(void);
-extern void VectorE0(void);
-extern void VectorE4(void);
-extern void VectorE8(void);
-extern void VectorEC(void);
-extern void VectorF0(void);
-extern void VectorF4(void);
-extern void VectorF8(void);
-extern void VectorFC(void);
-extern void Vector100(void);
-extern void Vector104(void);
-extern void Vector108(void);
-extern void Vector10C(void);
-extern void Vector110(void);
-extern void Vector114(void);
-extern void Vector118(void);
-extern void Vector11C(void);
-extern void Vector120(void);
-extern void Vector124(void);
-extern void Vector128(void);
-extern void Vector12C(void);
-extern void Vector130(void);
-extern void Vector134(void);
-extern void Vector138(void);
-extern void Vector13C(void);
-extern void Vector140(void);
-extern void Vector144(void);
-extern void Vector148(void);
-extern void Vector14C(void);
-extern void Vector150(void);
-extern void Vector154(void);
-extern void Vector158(void);
-extern void Vector15C(void);
-extern void Vector160(void);
-extern void Vector164(void);
-extern void Vector168(void);
-extern void Vector16C(void);
-extern void Vector170(void);
-extern void Vector174(void);
-extern void Vector178(void);
-extern void Vector17C(void);
-extern void Vector180(void);
-#endif
-
-/**
- * @brief STM32 vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC,
- VectorC0, VectorC4, VectorC8, VectorCC,
- VectorD0, VectorD4, VectorD8, VectorDC,
- VectorE0, VectorE4, VectorE8, VectorEC,
- VectorF0, VectorF4, VectorF8, VectorFC,
- Vector100, Vector104, Vector108, Vector10C,
- Vector110, Vector114, Vector118, Vector11C,
- Vector120, Vector124, Vector128, Vector12C,
- Vector130, Vector134, Vector138, Vector13C,
- Vector140, Vector144, Vector148, Vector14C,
- Vector150, Vector154, Vector158, Vector15C,
- Vector160, Vector164, Vector168, Vector16C,
- Vector170, Vector174, Vector178, Vector17C,
- Vector180
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector150(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector154(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector158(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector15C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector160(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector164(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector168(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector16C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector170(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector174(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector178(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector17C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector180(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F3xx/cmparams.h deleted file mode 100644 index 3fce69ce0..000000000 --- a/os/ports/GCC/ARMCMx/STM32F3xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F3xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F3xx.
- *
- * @defgroup ARMCMx_STM32F3xx STM32F3xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * STM32F3xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU TRUE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/ld/STM32F303xC.ld b/os/ports/GCC/ARMCMx/STM32F3xx/ld/STM32F303xC.ld deleted file mode 100644 index 44ae0958d..000000000 --- a/os/ports/GCC/ARMCMx/STM32F3xx/ld/STM32F303xC.ld +++ /dev/null @@ -1,153 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F303xC memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 256k
- ram : org = 0x20000000, len = 40k
- ccmram : org = 0x10000000, len = 8k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/ld/STM32F373xC.ld b/os/ports/GCC/ARMCMx/STM32F3xx/ld/STM32F373xC.ld deleted file mode 100644 index 4caf87011..000000000 --- a/os/ports/GCC/ARMCMx/STM32F3xx/ld/STM32F373xC.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F373xC memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 256k
- ram : org = 0x20000000, len = 32k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/port.mk b/os/ports/GCC/ARMCMx/STM32F3xx/port.mk deleted file mode 100644 index 09cc8dfd6..000000000 --- a/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4 STM32 port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F3xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F3xx/ld
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/systick.h b/os/ports/GCC/ARMCMx/STM32F3xx/systick.h deleted file mode 100644 index 3ea35660c..000000000 --- a/os/ports/GCC/ARMCMx/STM32F3xx/systick.h +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32F3xx/systick.h
- * @brief System timer header file.
- *
- * @addtogroup STM32F3_TIMER
- * @{
- */
-
-#ifndef _CHTIMER_H_
-#define _CHTIMER_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-typedef struct {
- volatile uint32_t CR1;
- volatile uint32_t CR2;
- volatile uint32_t SMCR;
- volatile uint32_t DIER;
- volatile uint32_t SR;
- volatile uint32_t EGR;
- volatile uint32_t CCMR1;
- volatile uint32_t CCMR2;
- volatile uint32_t CCER;
- volatile uint32_t CNT;
- volatile uint32_t PSC;
- volatile uint32_t ARR;
- volatile uint32_t RCR;
- volatile uint32_t CCR[4];
- volatile uint32_t BDTR;
- volatile uint32_t DCR;
- volatile uint32_t DMAR;
- volatile uint32_t OR;
- volatile uint32_t CCMR3;
- volatile uint32_t CCR5;
- volatile uint32_t CCR6;
-} local_stm32_tim_t;
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-#define STM32F3_TIM2 ((local_stm32_tim_t *)0x40000000)
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module inline functions. */
-/*===========================================================================*/
-
-/**
- * @brief Timer unit initialization.
- *
- * @notapi
- */
-static inline void port_timer_init(void) {
-
- STM32F3_TIM2->ARR = 0xFFFFFFFF;
- STM32F3_TIM2->CCMR1 = 0;
- STM32F3_TIM2->CCR[0] = 0;
- STM32F3_TIM2->DIER = 0;
- STM32F3_TIM2->CR2 = 0;
- STM32F3_TIM2->EGR = 1; /* UG, CNT initialized. */
- STM32F3_TIM2->CR1 = 1; /* CEN */
-}
-
-/**
- * @brief Returns the system time.
- *
- * @return The system time.
- *
- * @notapi
- */
-static inline systime_t port_timer_get_time(void) {
-
- return STM32F3_TIM2->CNT;
-}
-
-/**
- * @brief Starts the alarm.
- * @note Makes sure that no spurious alarms are triggered after
- * this call.
- *
- * @param[in] time the time to be set for the first alarm
- *
- * @notapi
- */
-static inline void port_timer_start_alarm(systime_t time) {
-
- chDbgAssert((STM32F3_TIM2->DIER & 2) == 0,
- "port_timer_start_alarm(), #1",
- "already started");
-
- STM32F3_TIM2->CCR[0] = time;
- STM32F3_TIM2->SR = 0;
- STM32F3_TIM2->DIER = 2; /* CC1IE */
-}
-
-/**
- * @brief Stops the alarm interrupt.
- *
- * @notapi
- */
-static inline void port_timer_stop_alarm(void) {
-
- chDbgAssert((STM32F3_TIM2->DIER & 2) != 0,
- "port_timer_stop_alarm(), #1",
- "not started");
-
- STM32F3_TIM2->DIER = 0;
-}
-
-/**
- * @brief Sets the alarm time.
- *
- * @param[in] time the time to be set for the next alarm
- *
- * @notapi
- */
-static inline void port_timer_set_alarm(systime_t time) {
-
- chDbgAssert((STM32F3_TIM2->DIER & 2) != 0,
- "port_timer_set_alarm(), #1",
- "not started");
-
- STM32F3_TIM2->CCR[0] = time;
-}
-
-/**
- * @brief Returns the current alarm time.
- *
- * @return The currently set alarm time.
- *
- * @notapi
- */
-static inline systime_t port_timer_get_alarm(void) {
-
- chDbgAssert((STM32F3_TIM2->DIER & 2) != 0,
- "port_timer_get_alarm(), #1",
- "not started");
-
- return STM32F3_TIM2->CCR[0];
-}
-
-#endif /* _CHTIMER_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F3xx/vectors.c b/os/ports/GCC/ARMCMx/STM32F3xx/vectors.c deleted file mode 100644 index 20de7cc18..000000000 --- a/os/ports/GCC/ARMCMx/STM32F3xx/vectors.c +++ /dev/null @@ -1,311 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F3xx/vectors.c
- * @brief Interrupt vectors for the STM32F3xx family.
- *
- * @defgroup ARMCMx_STM32F3xx_VECTORS STM32F3xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the STM32F3xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[82];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-extern void VectorC0(void);
-extern void VectorC4(void);
-extern void VectorC8(void);
-extern void VectorCC(void);
-extern void VectorD0(void);
-extern void VectorD4(void);
-extern void VectorD8(void);
-extern void VectorDC(void);
-extern void VectorE0(void);
-extern void VectorE4(void);
-extern void VectorE8(void);
-extern void VectorEC(void);
-extern void VectorF0(void);
-extern void VectorF4(void);
-extern void VectorF8(void);
-extern void VectorFC(void);
-extern void Vector100(void);
-extern void Vector104(void);
-extern void Vector108(void);
-extern void Vector10C(void);
-extern void Vector110(void);
-extern void Vector114(void);
-extern void Vector118(void);
-extern void Vector11C(void);
-extern void Vector120(void);
-extern void Vector124(void);
-extern void Vector128(void);
-extern void Vector12C(void);
-extern void Vector130(void);
-extern void Vector134(void);
-extern void Vector138(void);
-extern void Vector13C(void);
-extern void Vector140(void);
-extern void Vector144(void);
-extern void Vector148(void);
-extern void Vector14C(void);
-extern void Vector150(void);
-extern void Vector154(void);
-extern void Vector158(void);
-extern void Vector15C(void);
-extern void Vector160(void);
-extern void Vector164(void);
-extern void Vector168(void);
-extern void Vector16C(void);
-extern void Vector170(void);
-extern void Vector174(void);
-extern void Vector178(void);
-extern void Vector17C(void);
-extern void Vector180(void);
-extern void Vector184(void);
-#endif
-
-/**
- * @brief STM32 vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC,
- VectorC0, VectorC4, VectorC8, VectorCC,
- VectorD0, VectorD4, VectorD8, VectorDC,
- VectorE0, VectorE4, VectorE8, VectorEC,
- VectorF0, VectorF4, VectorF8, VectorFC,
- Vector100, Vector104, Vector108, Vector10C,
- Vector110, Vector114, Vector118, Vector11C,
- Vector120, Vector124, Vector128, Vector12C,
- Vector130, Vector134, Vector138, Vector13C,
- Vector140, Vector144, Vector148, Vector14C,
- Vector150, Vector154, Vector158, Vector15C,
- Vector160, Vector164, Vector168, Vector16C,
- Vector170, Vector174, Vector178, Vector17C,
- Vector180, Vector184
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector150(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector154(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector158(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector15C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector160(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector164(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector168(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector16C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector170(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector174(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector178(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector17C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector180(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector184(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h deleted file mode 100644 index f4dab3e57..000000000 --- a/os/ports/GCC/ARMCMx/STM32F4xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F4xx/cmparams.h
- * @brief ARM Cortex-M4 parameters for the STM32F4xx.
- *
- * @defgroup ARMCMx_STM32F4xx STM32F4xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * STM32F4xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU TRUE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F405xG.ld b/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F405xG.ld deleted file mode 100644 index ca33d5779..000000000 --- a/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F405xG.ld +++ /dev/null @@ -1,154 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F405xG memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 1M
- ram : org = 0x20000000, len = 112k
- ethram : org = 0x2001C000, len = 16k
- ccmram : org = 0x10000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F407xG.ld b/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F407xG.ld deleted file mode 100644 index c3cd57687..000000000 --- a/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F407xG.ld +++ /dev/null @@ -1,154 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F407xG memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 1M
- ram : org = 0x20000000, len = 112k
- ethram : org = 0x2001C000, len = 16k
- ccmram : org = 0x10000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F407xG_CCM.ld b/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F407xG_CCM.ld deleted file mode 100644 index e970140f0..000000000 --- a/os/ports/GCC/ARMCMx/STM32F4xx/ld/STM32F407xG_CCM.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32F407xG memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 1M
- ram : org = 0x20000000, len = 112k
- ethram : org = 0x2001C000, len = 16k
- ccmram : org = 0x10000000, len = 64k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ccmram
-
- .ccm :
- {
- PROVIDE(_cmm_start = .);
- . = ALIGN(4);
- *(.bss.mainthread.*)
- . = ALIGN(4);
- *(.bss._idle_thread_wa)
- . = ALIGN(4);
- *(.bss.rlist)
- . = ALIGN(4);
- *(.bss.vtlist)
- . = ALIGN(4);
- *(.bss.endmem)
- . = ALIGN(4);
- *(.bss.nextmem)
- . = ALIGN(4);
- *(.bss.default_heap)
- . = ALIGN(4);
- PROVIDE(_cmm_end = .);
- } > ccmram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/port.mk b/os/ports/GCC/ARMCMx/STM32F4xx/port.mk deleted file mode 100644 index 743f825e9..000000000 --- a/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4 STM32 port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F4xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F4xx/ld
diff --git a/os/ports/GCC/ARMCMx/STM32F4xx/vectors.c b/os/ports/GCC/ARMCMx/STM32F4xx/vectors.c deleted file mode 100644 index 6c9cfcff6..000000000 --- a/os/ports/GCC/ARMCMx/STM32F4xx/vectors.c +++ /dev/null @@ -1,311 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32F4xx/vectors.c
- * @brief Interrupt vectors for the STM32F4xx family.
- *
- * @defgroup ARMCMx_STM32F4xx_VECTORS STM32F4xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the STM32F4xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[82];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-extern void VectorC0(void);
-extern void VectorC4(void);
-extern void VectorC8(void);
-extern void VectorCC(void);
-extern void VectorD0(void);
-extern void VectorD4(void);
-extern void VectorD8(void);
-extern void VectorDC(void);
-extern void VectorE0(void);
-extern void VectorE4(void);
-extern void VectorE8(void);
-extern void VectorEC(void);
-extern void VectorF0(void);
-extern void VectorF4(void);
-extern void VectorF8(void);
-extern void VectorFC(void);
-extern void Vector100(void);
-extern void Vector104(void);
-extern void Vector108(void);
-extern void Vector10C(void);
-extern void Vector110(void);
-extern void Vector114(void);
-extern void Vector118(void);
-extern void Vector11C(void);
-extern void Vector120(void);
-extern void Vector124(void);
-extern void Vector128(void);
-extern void Vector12C(void);
-extern void Vector130(void);
-extern void Vector134(void);
-extern void Vector138(void);
-extern void Vector13C(void);
-extern void Vector140(void);
-extern void Vector144(void);
-extern void Vector148(void);
-extern void Vector14C(void);
-extern void Vector150(void);
-extern void Vector154(void);
-extern void Vector158(void);
-extern void Vector15C(void);
-extern void Vector160(void);
-extern void Vector164(void);
-extern void Vector168(void);
-extern void Vector16C(void);
-extern void Vector170(void);
-extern void Vector174(void);
-extern void Vector178(void);
-extern void Vector17C(void);
-extern void Vector180(void);
-extern void Vector184(void);
-#endif
-
-/**
- * @brief STM32 vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC,
- VectorC0, VectorC4, VectorC8, VectorCC,
- VectorD0, VectorD4, VectorD8, VectorDC,
- VectorE0, VectorE4, VectorE8, VectorEC,
- VectorF0, VectorF4, VectorF8, VectorFC,
- Vector100, Vector104, Vector108, Vector10C,
- Vector110, Vector114, Vector118, Vector11C,
- Vector120, Vector124, Vector128, Vector12C,
- Vector130, Vector134, Vector138, Vector13C,
- Vector140, Vector144, Vector148, Vector14C,
- Vector150, Vector154, Vector158, Vector15C,
- Vector160, Vector164, Vector168, Vector16C,
- Vector170, Vector174, Vector178, Vector17C,
- Vector180, Vector184
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector150(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector154(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector158(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector15C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector160(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector164(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector168(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector16C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector170(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector174(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector178(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector17C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector180(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector184(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h b/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h deleted file mode 100644 index 67bbb5344..000000000 --- a/os/ports/GCC/ARMCMx/STM32L1xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32L1xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32L1xx.
- *
- * @defgroup ARMCMx_STM32L1xx STM32L1xx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * STM32L1xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/STM32L1xx/ld/STM32L152xB.ld b/os/ports/GCC/ARMCMx/STM32L1xx/ld/STM32L152xB.ld deleted file mode 100644 index 1fe4375d7..000000000 --- a/os/ports/GCC/ARMCMx/STM32L1xx/ld/STM32L152xB.ld +++ /dev/null @@ -1,152 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * ST32L1152xB memory setup.
- */
-__main_stack_size__ = 0x0400;
-__process_stack_size__ = 0x0400;
-
-MEMORY
-{
- flash : org = 0x08000000, len = 128k
- ram : org = 0x20000000, len = 16k
-}
-
-__ram_start__ = ORIGIN(ram);
-__ram_size__ = LENGTH(ram);
-__ram_end__ = __ram_start__ + __ram_size__;
-
-ENTRY(ResetHandler)
-
-SECTIONS
-{
- . = 0;
- _text = .;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text.startup.*)
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- PROVIDE(__exidx_start = .);
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- PROVIDE(__exidx_end = .);
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- _etext = .;
- _textdata = _etext;
-
- .stacks :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data :
- {
- . = ALIGN(4);
- PROVIDE(_data = .);
- *(.data)
- . = ALIGN(4);
- *(.data.*)
- . = ALIGN(4);
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- } > ram AT > flash
-
- .bss :
- {
- . = ALIGN(4);
- PROVIDE(_bss_start = .);
- *(.bss)
- . = ALIGN(4);
- *(.bss.*)
- . = ALIGN(4);
- *(COMMON)
- . = ALIGN(4);
- PROVIDE(_bss_end = .);
- } > ram
-}
-
-PROVIDE(end = .);
-_end = .;
-
-__heap_base__ = _end;
-__heap_end__ = __ram_end__;
diff --git a/os/ports/GCC/ARMCMx/STM32L1xx/port.mk b/os/ports/GCC/ARMCMx/STM32L1xx/port.mk deleted file mode 100644 index 93b177563..000000000 --- a/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M3 STM32L1xx port files.
-PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
- $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/vectors.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
- ${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
- ${CHIBIOS}/os/ports/common/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx \
- ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32L1xx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32L1xx/ld
diff --git a/os/ports/GCC/ARMCMx/STM32L1xx/vectors.c b/os/ports/GCC/ARMCMx/STM32L1xx/vectors.c deleted file mode 100644 index eaf7e0e9d..000000000 --- a/os/ports/GCC/ARMCMx/STM32L1xx/vectors.c +++ /dev/null @@ -1,228 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/STM32L1xx/vectors.c
- * @brief Interrupt vectors for the STM32 family.
- *
- * @defgroup ARMCMx_STM32L1xx_VECTORS STM32L1xx Interrupt Vectors
- * @ingroup ARMCMx_SPECIFIC
- * @details Interrupt vectors for the STM32L1xx family.
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Type of an IRQ vector.
- */
-typedef void (*irq_vector_t)(void);
-
-/**
- * @brief Type of a structure representing the whole vectors table.
- */
-typedef struct {
- uint32_t *init_stack;
- irq_vector_t reset_vector;
- irq_vector_t nmi_vector;
- irq_vector_t hardfault_vector;
- irq_vector_t memmanage_vector;
- irq_vector_t busfault_vector;
- irq_vector_t usagefault_vector;
- irq_vector_t vector1c;
- irq_vector_t vector20;
- irq_vector_t vector24;
- irq_vector_t vector28;
- irq_vector_t svcall_vector;
- irq_vector_t debugmonitor_vector;
- irq_vector_t vector34;
- irq_vector_t pendsv_vector;
- irq_vector_t systick_vector;
- irq_vector_t vectors[45];
-} vectors_t;
-
-#if !defined(__DOXYGEN__)
-extern uint32_t __main_stack_end__;
-extern void ResetHandler(void);
-extern void NMIVector(void);
-extern void HardFaultVector(void);
-extern void MemManageVector(void);
-extern void BusFaultVector(void);
-extern void UsageFaultVector(void);
-extern void Vector1C(void);
-extern void Vector20(void);
-extern void Vector24(void);
-extern void Vector28(void);
-extern void SVCallVector(void);
-extern void DebugMonitorVector(void);
-extern void Vector34(void);
-extern void PendSVVector(void);
-extern void SysTickVector(void);
-extern void Vector40(void);
-extern void Vector44(void);
-extern void Vector48(void);
-extern void Vector4C(void);
-extern void Vector50(void);
-extern void Vector54(void);
-extern void Vector58(void);
-extern void Vector5C(void);
-extern void Vector60(void);
-extern void Vector64(void);
-extern void Vector68(void);
-extern void Vector6C(void);
-extern void Vector70(void);
-extern void Vector74(void);
-extern void Vector78(void);
-extern void Vector7C(void);
-extern void Vector80(void);
-extern void Vector84(void);
-extern void Vector88(void);
-extern void Vector8C(void);
-extern void Vector90(void);
-extern void Vector94(void);
-extern void Vector98(void);
-extern void Vector9C(void);
-extern void VectorA0(void);
-extern void VectorA4(void);
-extern void VectorA8(void);
-extern void VectorAC(void);
-extern void VectorB0(void);
-extern void VectorB4(void);
-extern void VectorB8(void);
-extern void VectorBC(void);
-extern void VectorC0(void);
-extern void VectorC4(void);
-extern void VectorC8(void);
-extern void VectorCC(void);
-extern void VectorD0(void);
-extern void VectorD4(void);
-extern void VectorD8(void);
-extern void VectorDC(void);
-extern void VectorE0(void);
-extern void VectorE4(void);
-extern void VectorE8(void);
-extern void VectorEC(void);
-extern void VectorF0(void);
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief STM32L1xx vectors table.
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((section("vectors")))
-#endif
-vectors_t _vectors = {
- &__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
- MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
- Vector20, Vector24, Vector28, SVCallVector,
- DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
- {
- Vector40, Vector44, Vector48, Vector4C,
- Vector50, Vector54, Vector58, Vector5C,
- Vector60, Vector64, Vector68, Vector6C,
- Vector70, Vector74, Vector78, Vector7C,
- Vector80, Vector84, Vector88, Vector8C,
- Vector90, Vector94, Vector98, Vector9C,
- VectorA0, VectorA4, VectorA8, VectorAC,
- VectorB0, VectorB4, VectorB8, VectorBC,
- VectorC0, VectorC4, VectorC8, VectorCC,
- VectorD0, VectorD4, VectorD8, VectorDC,
- VectorE0, VectorE4, VectorE8, VectorEC,
- VectorF0
- }
-};
-
-/**
- * @brief Unhandled exceptions handler.
- * @details Any undefined exception vector points to this function by default.
- * This function simply stops the system into an infinite loop.
- *
- * @notapi
- */
-#if !defined(__DOXYGEN__)
-__attribute__ ((naked))
-#endif
-void _unhandled_exception(void) {
-
- while (TRUE)
- ;
-}
-
-void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
-void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
-void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
-void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
-void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chcore.c b/os/ports/GCC/ARMCMx/chcore.c deleted file mode 100644 index c145133dc..000000000 --- a/os/ports/GCC/ARMCMx/chcore.c +++ /dev/null @@ -1,68 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chcore.c
- * @brief ARM Cortex-Mx port code.
- *
- * @addtogroup ARMCMx_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Module local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local functions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Start a thread by invoking its work function.
- * @details If the work function returns @p chThdExit() is automatically
- * invoked.
- */
-void _port_thread_start(void) {
-
- chSysUnlock();
- asm volatile ("mov r0, r5 \n\t"
- "blx r4 \n\t"
- "bl chThdExit");
-}
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h deleted file mode 100644 index c25bde21f..000000000 --- a/os/ports/GCC/ARMCMx/chcore.h +++ /dev/null @@ -1,185 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chcore.h
- * @brief ARM Cortex-Mx port macros and structures.
- *
- * @addtogroup ARMCMx_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @name Architecture and Compiler
- * @{
- */
-/**
- * @brief Macro defining a generic ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "GCC " __VERSION__
-/** @} */
-
-/*
- * Added to make the header stand-alone when included from asm.
- */
-#if !defined(FALSE)
-#define FALSE 0
-#endif
-#if !defined(TRUE)
-#define TRUE (!FALSE)
-#endif
-
-/**
- * @name Cortex-M variants
- * @{
- */
-#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
-#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */
-#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
-#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
-/** @} */
-
-/* Inclusion of the Cortex-Mx implementation specific parameters.*/
-#include "cmparams.h"
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
- (CORTEX_MODEL == CORTEX_M4)
-#elif (CORTEX_MODEL == CORTEX_M1)
-#warning "untested Cortex-M model"
-#else
-#error "unknown or unsupported Cortex-M model"
-#endif
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#include "nvic.h"
-
-/* The following declarations are there just for Doxygen documentation, the
- real declarations are inside the sub-headers.*/
-#if defined(__DOXYGEN__)
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note It is implemented to match the Cortex-Mx exception context.
- */
-struct extctx {};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
-struct intctx {};
-#endif /* defined(__DOXYGEN__) */
-
-#endif /* _FROM_ASM_ */
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/**
- * @brief Total priority levels.
- */
-#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS)
-
-/**
- * @brief Minimum priority level.
- * @details This minimum priority level is calculated from the number of
- * priority bits supported by the specific Cortex-Mx implementation.
- */
-#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1)
-
-/**
- * @brief Maximum priority level.
- * @details The maximum allowed priority level is always zero.
- */
-#define CORTEX_MAXIMUM_PRIORITY 0
-
-/**
- * @brief Priority level verification macro.
- */
-#define CORTEX_IS_VALID_PRIORITY(n) \
- (((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
-
-/**
- * @brief Priority level verification macro.
- */
-#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
- (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
-
-/**
- * @brief Priority level to priority mask conversion macro.
- */
-#define CORTEX_PRIORITY_MASK(n) \
- ((n) << (8 - CORTEX_PRIORITY_BITS))
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-/* Includes the sub-architecture-specific part.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M1)
-#include "chcore_v6m.h"
-#elif (CORTEX_MODEL == CORTEX_M3) || (CORTEX_MODEL == CORTEX_M4)
-#include "chcore_v7m.h"
-#endif
-
-/*===========================================================================*/
-/* Module inline functions. */
-/*===========================================================================*/
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.c b/os/ports/GCC/ARMCMx/chcore_v6m.c deleted file mode 100644 index 715f6f2de..000000000 --- a/os/ports/GCC/ARMCMx/chcore_v6m.c +++ /dev/null @@ -1,206 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chcore_v6m.c
- * @brief ARMv6-M architecture port code.
- *
- * @addtogroup ARMCMx_V6M_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Module local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local functions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief System Timer vector.
- * @details This interrupt is used as system tick.
- * @note The timer must be initialized in the startup code.
- */
-CH_IRQ_HANDLER(SysTickVector) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- chSysTimerHandlerI();
- chSysUnlockFromIsr();
-
- CH_IRQ_EPILOGUE();
-}
-
-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-/**
- * @brief NMI vector.
- * @details The NMI vector is used for exception mode re-entering after a
- * context switch.
- */
-void NMIVector(void) {
- register struct extctx *ctxp;
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
- ctxp++;
- asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
- port_unlock_from_isr();
-}
-#endif /* !CORTEX_ALTERNATE_SWITCH */
-
-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-/**
- * @brief PendSV vector.
- * @details The PendSV vector is used for exception mode re-entering after a
- * context switch.
- */
-void PendSVVector(void) {
- register struct extctx *ctxp;
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
- ctxp++;
- asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
-}
-#endif /* CORTEX_ALTERNATE_SWITCH */
-
-/*===========================================================================*/
-/* Module exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief IRQ epilogue code.
- *
- * @param[in] lr value of the @p LR register on ISR entry
- */
-void _port_irq_epilogue(regarm_t lr) {
-
- if (lr != (regarm_t)0xFFFFFFF1) {
- register struct extctx *ctxp;
-
- port_lock_from_isr();
- /* Adding an artificial exception return context, there is no need to
- populate it fully.*/
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
- ctxp--;
- asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
- ctxp->xpsr = (regarm_t)0x01000000;
-
- /* The exit sequence is different depending on if a preemption is
- required or not.*/
- if (chSchIsPreemptionRequired()) {
- /* Preemption is required we need to enforce a context switch.*/
- ctxp->pc = (void *)_port_switch_from_isr;
- }
- else {
- /* Preemption not required, we just need to exit the exception
- atomically.*/
- ctxp->pc = (void *)_port_exit_from_isr;
- }
-
- /* Note, returning without unlocking is intentional, this is done in
- order to keep the rest of the context switch atomic.*/
- }
-}
-
-/**
- * @brief Post-IRQ switch code.
- * @details The switch is performed in thread context then an NMI exception
- * is enforced in order to return to the exact point before the
- * preemption.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void _port_switch_from_isr(void) {
-
- dbg_check_lock();
- chSchDoReschedule();
- dbg_check_unlock();
- asm volatile ("_port_exit_from_isr:" : : : "memory");
-#if CORTEX_ALTERNATE_SWITCH
- SCB_ICSR = ICSR_PENDSVSET;
- port_unlock();
-#else
- SCB_ICSR = ICSR_NMIPENDSET;
-#endif
- /* The following loop should never be executed, the exception will kick in
- immediately.*/
- while (TRUE)
- ;
-}
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void _port_switch(Thread *ntp, Thread *otp) {
- register struct intctx *r13 asm ("r13");
-
- asm volatile ("push {r4, r5, r6, r7, lr} \n\t"
- "mov r4, r8 \n\t"
- "mov r5, r9 \n\t"
- "mov r6, r10 \n\t"
- "mov r7, r11 \n\t"
- "push {r4, r5, r6, r7}" : : : "memory");
-
- otp->p_ctx.r13 = r13;
- r13 = ntp->p_ctx.r13;
-
- asm volatile ("pop {r4, r5, r6, r7} \n\t"
- "mov r8, r4 \n\t"
- "mov r9, r5 \n\t"
- "mov r10, r6 \n\t"
- "mov r11, r7 \n\t"
- "pop {r4, r5, r6, r7, pc}" : : "r" (r13) : "memory");
-}
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.h b/os/ports/GCC/ARMCMx/chcore_v6m.h deleted file mode 100644 index 7d6ffeaa9..000000000 --- a/os/ports/GCC/ARMCMx/chcore_v6m.h +++ /dev/null @@ -1,375 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chcore_v6m.h
- * @brief ARMv6-M architecture port macros and structures.
- *
- * @addtogroup ARMCMx_V6M_CORE
- * @{
- */
-
-#ifndef _CHCORE_V6M_H_
-#define _CHCORE_V6M_H_
-
-/*===========================================================================*/
-/* Port constants. */
-/*===========================================================================*/
-
-/**
- * @brief PendSV priority level.
- * @note This priority is enforced to be equal to @p 0,
- * this handler always has the highest priority that cannot preempt
- * the kernel.
- */
-#define CORTEX_PRIORITY_PENDSV 0
-
-/*===========================================================================*/
-/* Port macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 16 because the idle thread does have
- * a stack frame when compiling without optimizations. You may
- * reduce this value to zero when compiling with optimizations.
- */
-#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
-#define PORT_IDLE_THREAD_STACK_SIZE 16
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * @note In this port this value is conservatively set to 32 because the
- * function @p chSchDoReschedule() can have a stack frame, especially
- * with compiler optimizations disabled. The value can be reduced
- * when compiler optimizations are enabled.
- */
-#if !defined(PORT_INT_REQUIRED_STACK)
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#if !defined(CORTEX_ENABLE_WFI_IDLE)
-#define CORTEX_ENABLE_WFI_IDLE FALSE
-#endif
-
-/**
- * @brief SYSTICK handler priority.
- * @note The default SYSTICK handler priority is calculated as the priority
- * level in the middle of the numeric priorities range.
- */
-#if !defined(CORTEX_PRIORITY_SYSTICK)
-#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
-#endif
-
-/**
- * @brief Alternate preemption method.
- * @details Activating this option will make the Kernel use the PendSV
- * handler for preemption instead of the NMI handler.
- */
-#ifndef CORTEX_ALTERNATE_SWITCH
-#define CORTEX_ALTERNATE_SWITCH FALSE
-#endif
-
-/*===========================================================================*/
-/* Port derived parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Maximum usable priority for normal ISRs.
- */
-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-#define CORTEX_MAX_KERNEL_PRIORITY 1
-#else
-#define CORTEX_MAX_KERNEL_PRIORITY 0
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Macro defining the specific ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM_v6M
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "ARMv6-M"
-
-/**
- * @brief Name of the architecture variant.
- */
-#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)
-#define CH_CORE_VARIANT_NAME "Cortex-M0"
-#elif (CORTEX_MODEL == CORTEX_M1)
-#define CH_CORE_VARIANT_NAME "Cortex-M1"
-#endif
-
-/**
- * @brief Port-specific information string.
- */
-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-#define CH_PORT_INFO "Preemption through NMI"
-#else
-#define CH_PORT_INFO "Preemption through PendSV"
-#endif
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
- /* The documentation of the following declarations is in chconf.h in order
- to not have duplicated structure names into the documentation.*/
-#if !defined(__DOXYGEN__)
-
-typedef uint64_t stkalign_t __attribute__ ((aligned (8)));
-
-struct extctx {
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_thd;
- regarm_t pc;
- regarm_t xpsr;
-};
-
-struct intctx {
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t lr;
-};
-
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = (void *)(pf); \
- tp->p_ctx.r13->r5 = (void *)(arg); \
- tp->p_ctx.r13->lr = (void *)(_port_thread_start); \
-}
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE() \
- regarm_t _saved_lr; \
- asm volatile ("mov %0, lr" : "=r" (_saved_lr) : : "memory")
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() _port_irq_epilogue(_saved_lr)
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_FAST_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Port-related initialization code.
- */
-#define port_init() { \
- SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \
- nvicSetSystemHandlerPriority(HANDLER_PENDSV, \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV)); \
- nvicSetSystemHandlerPriority(HANDLER_SYSTICK, \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK)); \
-}
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- */
-#define port_lock() asm volatile ("cpsid i" : : : "memory")
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- */
-#define port_unlock() asm volatile ("cpsie i" : : : "memory")
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_lock_from_isr() port_lock()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_unlock_from_isr() port_unlock()
-
-/**
- * @brief Disables all the interrupt sources.
- */
-#define port_disable() asm volatile ("cpsid i" : : : "memory")
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- */
-#define port_suspend() asm volatile ("cpsid i" : : : "memory")
-
-/**
- * @brief Enables all the interrupt sources.
- */
-#define port_enable() asm volatile ("cpsie i" : : : "memory")
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note Implemented as an inlined @p WFI instruction.
- */
-#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() asm volatile ("wfi" : : : "memory")
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- register struct intctx *r13 asm ("r13"); \
- if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _port_irq_epilogue(regarm_t lr);
- void _port_switch_from_isr(void);
- void _port_exit_from_isr(void);
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_V6M_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.c b/os/ports/GCC/ARMCMx/chcore_v7m.c deleted file mode 100644 index 821f2403e..000000000 --- a/os/ports/GCC/ARMCMx/chcore_v7m.c +++ /dev/null @@ -1,241 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chcore_v7m.c
- * @brief ARMv7-M architecture port code.
- *
- * @addtogroup ARMCMx_V7M_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Module local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module local functions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module interrupt handlers. */
-/*===========================================================================*/
-
-#if CH_CFG_TIMEDELTA == 0
-/**
- * @brief System Timer vector.
- * @details This interrupt is used as system tick.
- * @note The timer must be initialized in the startup code.
- */
-CH_IRQ_HANDLER(SysTickVector) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromISR();
- chSysTimerHandlerI();
- chSysUnlockFromISR();
-
- CH_IRQ_EPILOGUE();
-}
-#endif /* CH_CFG_TIMEDELTA == 0 */
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief SVC vector.
- * @details The SVC vector is used for exception mode re-entering after a
- * context switch.
- * @note The PendSV vector is only used in advanced kernel mode.
- */
-void SVCallVector(void) {
- struct extctx *ctxp;
-
- /* Current PSP value.*/
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp++;
-
-#if CORTEX_USE_FPU
- /* Restoring the special register SCB_FPCCR.*/
- SCB_FPCCR = (uint32_t)ctxp->fpccr;
- SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
-#endif
- asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
- port_unlock_from_isr();
-}
-#endif /* !CORTEX_SIMPLIFIED_PRIORITY */
-
-#if CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief PendSV vector.
- * @details The PendSV vector is used for exception mode re-entering after a
- * context switch.
- * @note The PendSV vector is only used in compact kernel mode.
- */
-void PendSVVector(void) {
- struct extctx *ctxp;
-
- /* Current PSP value.*/
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp++;
-
-#if CORTEX_USE_FPU
- /* Restoring the special register SCB_FPCCR.*/
- SCB_FPCCR = (uint32_t)ctxp->fpccr;
- SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
-#endif
- asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
-}
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/*===========================================================================*/
-/* Module exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Exception exit redirection to _port_switch_from_isr().
- */
-void _port_irq_epilogue(void) {
-
- port_lock_from_isr();
- if ((SCB_ICSR & ICSR_RETTOBASE) != 0) {
- struct extctx *ctxp;
-
- /* Current PSP value.*/
- asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
-
- /* Adding an artificial exception return context, there is no need to
- populate it fully.*/
- ctxp--;
- asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
- ctxp->xpsr = (regarm_t)0x01000000;
-
- /* The exit sequence is different depending on if a preemption is
- required or not.*/
- if (chSchIsPreemptionRequired()) {
- /* Preemption is required we need to enforce a context switch.*/
- ctxp->pc = (void *)_port_switch_from_isr;
-#if CORTEX_USE_FPU
- /* Triggering a lazy FPU state save.*/
- asm volatile ("vmrs APSR_nzcv, FPSCR" : : : "memory");
-#endif
- }
- else {
- /* Preemption not required, we just need to exit the exception
- atomically.*/
- ctxp->pc = (void *)_port_exit_from_isr;
- }
-
-#if CORTEX_USE_FPU
- {
- uint32_t fpccr;
-
- /* Saving the special register SCB_FPCCR into the reserved offset of
- the Cortex-M4 exception frame.*/
- (ctxp + 1)->fpccr = (regarm_t)(fpccr = SCB_FPCCR);
-
- /* Now the FPCCR is modified in order to not restore the FPU status
- from the artificial return context.*/
- SCB_FPCCR = fpccr | FPCCR_LSPACT;
- }
-#endif
-
- /* Note, returning without unlocking is intentional, this is done in
- order to keep the rest of the context switch atomic.*/
- return;
- }
- port_unlock_from_isr();
-}
-
-/**
- * @brief Post-IRQ switch code.
- * @details Exception handlers return here for context switching.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void _port_switch_from_isr(void) {
-
- _stats_start_measure_crit_thd();
- dbg_check_lock();
- chSchDoReschedule();
- dbg_check_unlock();
- _stats_stop_measure_crit_thd();
- asm volatile ("_port_exit_from_isr:" : : : "memory");
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
- asm volatile ("svc #0");
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
- SCB_ICSR = ICSR_PENDSVSET;
- port_unlock();
- while (TRUE)
- ;
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-}
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void _port_switch(thread_t *ntp, thread_t *otp) {
-
- asm volatile ("push {r4, r5, r6, r7, r8, r9, r10, r11, lr}"
- : : : "memory");
-#if CORTEX_USE_FPU
- asm volatile ("vpush {s16-s31}" : : : "memory");
-#endif
-
- asm volatile ("str sp, [%1, #12] \n\t"
- "ldr sp, [%0, #12]" : : "r" (ntp), "r" (otp));
-
-#if CORTEX_USE_FPU
- asm volatile ("vpop {s16-s31}" : : : "memory");
-#endif
- asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}"
- : : : "memory");
-}
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.h b/os/ports/GCC/ARMCMx/chcore_v7m.h deleted file mode 100644 index 4cadae90b..000000000 --- a/os/ports/GCC/ARMCMx/chcore_v7m.h +++ /dev/null @@ -1,612 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chcore_v7m.h
- * @brief ARMv7-M architecture port macros and structures.
- *
- * @addtogroup ARMCMx_V7M_CORE
- * @{
- */
-
-#ifndef _CHCORE_V7M_H_
-#define _CHCORE_V7M_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @name Architecture and Compiler
- * @{
- */
-#if (CORTEX_MODEL == CORTEX_M3) || defined(__DOXYGEN__)
-/**
- * @brief Macro defining the specific ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM_v7M
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "ARMv7-M"
-
-/**
- * @brief Name of the architecture variant.
- */
-#define CH_CORE_VARIANT_NAME "Cortex-M3"
-
-#elif (CORTEX_MODEL == CORTEX_M4)
-#define CH_ARCHITECTURE_ARM_v7ME
-#define CH_ARCHITECTURE_NAME "ARMv7-ME"
-#if CORTEX_USE_FPU
-#define CH_CORE_VARIANT_NAME "Cortex-M4F"
-#else
-#define CH_CORE_VARIANT_NAME "Cortex-M4"
-#endif
-#endif
-
-/**
- * @brief Port-specific information string.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define CH_PORT_INFO "Advanced kernel mode"
-#else
-#define CH_PORT_INFO "Compact kernel mode"
-#endif
-/** @} */
-
-/**
- * @brief This port supports a realtime counter.
- */
-#define CH_PORT_SUPPORTS_RT TRUE
-
-/**
- * @brief Disabled value for BASEPRI register.
- */
-#define CORTEX_BASEPRI_DISABLED 0
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 16 because the idle thread does have
- * a stack frame when compiling without optimizations. You may
- * reduce this value to zero when compiling with optimizations.
- */
-#if !defined(CH_PORT_IDLE_THREAD_STACK_SIZE) || defined(__DOXYGEN__)
-#define CH_PORT_IDLE_THREAD_STACK_SIZE 16
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * @note In this port this value is conservatively set to 32 because the
- * function @p chSchDoReschedule() can have a stack frame, especially
- * with compiler optimizations disabled. The value can be reduced
- * when compiler optimizations are enabled.
- */
-#if !defined(CH_PORT_INT_REQUIRED_STACK) || defined(__DOXYGEN__)
-#define CH_PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#if !defined(CORTEX_ENABLE_WFI_IDLE)
-#define CORTEX_ENABLE_WFI_IDLE FALSE
-#endif
-
-/**
- * @brief SYSTICK handler priority.
- * @note The default SYSTICK handler priority is calculated as the priority
- * level in the middle of the numeric priorities range.
- */
-#if !defined(CORTEX_PRIORITY_SYSTICK)
-#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
-#endif
-
-/**
- * @brief FPU support in context switch.
- * @details Activating this option activates the FPU support in the kernel.
- */
-#if !defined(CORTEX_USE_FPU)
-#define CORTEX_USE_FPU CORTEX_HAS_FPU
-#elif CORTEX_USE_FPU && !CORTEX_HAS_FPU
-/* This setting requires an FPU presence check in case it is externally
- redefined.*/
-#error "the selected core does not have an FPU"
-#endif
-
-/**
- * @brief Simplified priority handling flag.
- * @details Activating this option makes the Kernel work in compact mode.
- */
-#if !defined(CORTEX_SIMPLIFIED_PRIORITY)
-#define CORTEX_SIMPLIFIED_PRIORITY FALSE
-#endif
-
-/**
- * @brief SVCALL handler priority.
- * @note The default SVCALL handler priority is defaulted to
- * @p CORTEX_MAXIMUM_PRIORITY+1, this reserves the
- * @p CORTEX_MAXIMUM_PRIORITY priority level as fast interrupts
- * priority level.
- */
-#if !defined(CORTEX_PRIORITY_SVCALL)
-#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SVCALL"
-#endif
-
-/**
- * @brief NVIC VTOR initialization expression.
- */
-#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
-#define CORTEX_VTOR_INIT 0x00000000
-#endif
-
-/**
- * @brief NVIC PRIGROUP initialization expression.
- * @details The default assigns all available priority bits as preemption
- * priority with no sub-priority.
- */
-#if !defined(CORTEX_PRIGROUP_INIT) || defined(__DOXYGEN__)
-#define CORTEX_PRIGROUP_INIT (7 - CORTEX_PRIORITY_BITS)
-#endif
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief Maximum usable priority for normal ISRs.
- */
-#define CORTEX_MAX_KERNEL_PRIORITY (CORTEX_PRIORITY_SVCALL + 1)
-
-/**
- * @brief BASEPRI level within kernel lock.
- * @note In compact kernel mode this constant value is enforced to zero.
- */
-#define CORTEX_BASEPRI_KERNEL \
- CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
-#else
-
-#define CORTEX_MAX_KERNEL_PRIORITY 1
-#define CORTEX_BASEPRI_KERNEL 0
-#endif
-
-/**
- * @brief PendSV priority level.
- * @note This priority is enforced to be equal to @p CORTEX_BASEPRI_KERNEL,
- * this handler always have the highest priority that cannot preempt
- * the kernel.
- */
-#define CORTEX_PRIORITY_PENDSV CORTEX_BASEPRI_KERNEL
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
-/* The documentation of the following declarations is in chconf.h in order
- to not have duplicated structure names into the documentation.*/
-#if !defined(__DOXYGEN__)
-
-typedef uint64_t stkalign_t __attribute__ ((aligned (8)));
-
-struct extctx {
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_thd;
- regarm_t pc;
- regarm_t xpsr;
-#if CORTEX_USE_FPU
- regarm_t s0;
- regarm_t s1;
- regarm_t s2;
- regarm_t s3;
- regarm_t s4;
- regarm_t s5;
- regarm_t s6;
- regarm_t s7;
- regarm_t s8;
- regarm_t s9;
- regarm_t s10;
- regarm_t s11;
- regarm_t s12;
- regarm_t s13;
- regarm_t s14;
- regarm_t s15;
- regarm_t fpscr;
- regarm_t fpccr;
-#endif /* CORTEX_USE_FPU */
-};
-
-struct intctx {
-#if CORTEX_USE_FPU
- regarm_t s16;
- regarm_t s17;
- regarm_t s18;
- regarm_t s19;
- regarm_t s20;
- regarm_t s21;
- regarm_t s22;
- regarm_t s23;
- regarm_t s24;
- regarm_t s25;
- regarm_t s26;
- regarm_t s27;
- regarm_t s28;
- regarm_t s29;
- regarm_t s30;
- regarm_t s31;
-#endif /* CORTEX_USE_FPU */
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t lr;
-};
-
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief Platform dependent part of the @p thread_t structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = (void *)(pf); \
- tp->p_ctx.r13->r5 = (void *)(arg); \
- tp->p_ctx.r13->lr = (void *)(_port_thread_start); \
-}
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(thread_t) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (CH_PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() _port_irq_epilogue()
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_FAST_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- register struct intctx *r13 asm ("r13"); \
- if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _port_irq_epilogue(void);
- void _port_switch_from_isr(void);
- void _port_exit_from_isr(void);
- void _port_switch(thread_t *ntp, thread_t *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#if CH_CFG_TIMEDELTA > 0
-#include "systick.h"
-#endif
-
-/*===========================================================================*/
-/* Module inline functions. */
-/*===========================================================================*/
-
-/**
- * @brief Port-related initialization code.
- */
-static inline void port_init(void) {
-
- /* Initialization of the vector table and priority related settings.*/
- SCB_VTOR = CORTEX_VTOR_INIT;
- SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(CORTEX_PRIGROUP_INIT);
-
- /* DWT cycle counter enable.*/
- SCS_DEMCR |= SCS_DEMCR_TRCENA;
- DWT_CTRL |= DWT_CTRL_CYCCNTENA;
-
- /* Initialization of the system vectors used by the port.*/
- nvicSetSystemHandlerPriority(HANDLER_SVCALL,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));
- nvicSetSystemHandlerPriority(HANDLER_PENDSV,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV));
-#if CH_CFG_TIMEDELTA == 0
- nvicSetSystemHandlerPriority(HANDLER_SYSTICK,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK));
-#else
- port_timer_init();
-#endif
-}
-
-/**
- * @brief Returns a word encoding the current interrupts status.
- *
- * @return The interrupts status.
- */
-static inline syssts_t port_get_irq_status(void) {
- register uint32_t sts;
-
-#if !CORTEX_SIMPLIFIED_PRIORITY
- asm volatile ("mrs %0, BASEPRI" : "=r" (sts) : : "memory");
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
- asm volatile ("mrs %0, PRIMASK" : "=r" (sts) : : "memory");
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
- return sts;
-}
-
-/**
- * @brief Checks the interrupt status.
- *
- * @param[in] sts the interrupt status word
- *
- * @return The interrupt status.
- * @retvel false the word specified a disabled interrupts status.
- * @retvel true the word specified an enabled interrupts status.
- */
-static inline bool port_irq_enabled(syssts_t sts) {
-
-#if !CORTEX_SIMPLIFIED_PRIORITY
- return sts >= CORTEX_BASEPRI_KERNEL;
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
- return (sts & 1) == 0;
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-}
-
-/**
- * @brief Determines the current execution context.
- *
- * @return The execution context.
- * @retval false not running in ISR mode.
- * @retval true running in ISR mode.
- */
-static inline bool port_is_isr_context(void) {
- uint32_t ipsr;
-
- asm volatile ("MRS %0, ipsr" : "=r" (ipsr));
- return (bool)((ipsr & 0x1FF) != 0);
-}
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- * @note In this port this it raises the base priority to kernel level.
- */
-static inline void port_lock(void) {
-
-#if !CORTEX_SIMPLIFIED_PRIORITY
- register uint32_t basepri = CORTEX_BASEPRI_KERNEL;
- asm volatile ("msr BASEPRI, %0" : : "r" (basepri) : "memory");
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
- asm volatile ("cpsid i" : : : "memory");
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-}
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- * @note In this port this it lowers the base priority to user level.
- */
-static inline void port_unlock(void) {
-
-#if !CORTEX_SIMPLIFIED_PRIORITY
- register uint32_t basepri = CORTEX_BASEPRI_DISABLED;
- asm volatile ("msr BASEPRI, %0" : : "r" (basepri) : "memory");
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
- asm volatile ("cpsie i" : : : "memory");
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-}
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-static inline void port_lock_from_isr(void) {
-
- port_lock();
-}
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Same as @p port_unlock() in this port.
- */
-static inline void port_unlock_from_isr(void) {
-
- port_unlock();
-}
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Of course non-maskable interrupt sources are not included.
- * @note In this port it disables all the interrupt sources by raising
- * the priority mask to level 0.
- */
-static inline void port_disable(void) {
-
- asm volatile ("cpsid i" : : : "memory");
-}
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- * @note Interrupt sources above kernel level remains enabled.
- * @note In this port it raises/lowers the base priority to kernel level.
- */
-static inline void port_suspend(void) {
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
- register uint32_t basepri = CORTEX_BASEPRI_KERNEL;
- asm volatile ("msr BASEPRI, %0 \n\t"
- "cpsie i" : : "r" (basepri) : "memory");
-#else
- asm volatile ("cpsid i" : : : "memory");
-#endif
-}
-
-/**
- * @brief Enables all the interrupt sources.
- * @note In this port it lowers the base priority to user level.
- */
-static inline void port_enable(void) {
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
- register uint32_t basepri = CORTEX_BASEPRI_DISABLED;
- asm volatile ("msr BASEPRI, %0 \n\t"
- "cpsie i" : : "r" (basepri) : "memory");
-#else
- asm volatile ("cpsie i" : : : "memory");
-#endif
-}
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note Implemented as an inlined @p WFI instruction.
- */
-static inline void port_wait_for_interrupt(void) {
-
-#if CORTEX_ENABLE_WFI_IDLE
- asm volatile ("wfi" : : : "memory");
-#endif
-}
-
-
-static inline rtcnt_t port_rt_get_counter_value(void) {
-
- return DWT_CYCCNT;
-}
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_V7M_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/chtypes.h b/os/ports/GCC/ARMCMx/chtypes.h deleted file mode 100644 index bf9932b93..000000000 --- a/os/ports/GCC/ARMCMx/chtypes.h +++ /dev/null @@ -1,68 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file GCC/ARMCMx/chtypes.h
- * @brief ARM Cortex-Mx port system types.
- *
- * @addtogroup ARMCMx_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint32_t systime_t; /**< System time. */
-typedef uint32_t rtcnt_t; /**< Realtime counter. */
-typedef uint64_t rttime_t; /**< Time accumulator. */
-typedef uint32_t syssts_t; /**< System status word. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Numeric event identifier. */
-typedef uint32_t eventmask_t; /**< Mask of event identifiers. */
-typedef uint32_t eventflags_t; /**< Mask of event flags. */
-typedef int32_t cnt_t; /**< Generic signed counter. */
-typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Makes functions not inlineable.
- * @note If the compiler does not support such attribute then the
- * realtime counter precision could be degraded.
- */
-#define NOINLINE __attribute__((noinline))
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/crt0.c b/os/ports/GCC/ARMCMx/crt0.c deleted file mode 100644 index 5151de43e..000000000 --- a/os/ports/GCC/ARMCMx/crt0.c +++ /dev/null @@ -1,354 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ARMCMx/crt0.c
- * @brief Generic ARMvx-M (Cortex-M0/M1/M3/M4) startup file for ChibiOS/RT.
- *
- * @addtogroup ARMCMx_STARTUP
- * @{
- */
-
-#include <stdint.h>
-
-#if !defined(FALSE)
-#define FALSE 0
-#endif
-
-#if !defined(TRUE)
-#define TRUE (!FALSE)
-#endif
-
-#define SCB_CPACR *((uint32_t *)0xE000ED88U)
-#define SCB_FPCCR *((uint32_t *)0xE000EF34U)
-#define SCB_FPDSCR *((uint32_t *)0xE000EF3CU)
-#define FPCCR_ASPEN (0x1U << 31)
-#define FPCCR_LSPEN (0x1U << 30)
-
-typedef void (*funcp_t)(void);
-typedef funcp_t * funcpp_t;
-
-#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))
-
-/*
- * Area fill code, it is a macro because here functions cannot be called
- * until stacks are initialized.
- */
-#define fill32(start, end, filler) { \
- uint32_t *p1 = start; \
- uint32_t *p2 = end; \
- while (p1 < p2) \
- *p1++ = filler; \
-}
-
-/*===========================================================================*/
-/**
- * @name Startup settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief Control special register initialization value.
- * @details The system is setup to run in privileged mode using the PSP
- * stack (dual stack mode).
- */
-#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__)
-#define CRT0_CONTROL_INIT 0x00000002
-#endif
-
-/**
- * @brief Stack segments initialization switch.
- */
-#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
-#define CRT0_STACKS_FILL_PATTERN 0x55555555
-#endif
-
-/**
- * @brief Stack segments initialization switch.
- */
-#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__)
-#define CRT0_INIT_STACKS TRUE
-#endif
-
-/**
- * @brief DATA segment initialization switch.
- */
-#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__)
-#define CRT0_INIT_DATA TRUE
-#endif
-
-/**
- * @brief BSS segment initialization switch.
- */
-#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__)
-#define CRT0_INIT_BSS TRUE
-#endif
-
-/**
- * @brief Constructors invocation switch.
- */
-#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__)
-#define CRT0_CALL_CONSTRUCTORS TRUE
-#endif
-
-/**
- * @brief Destructors invocation switch.
- */
-#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__)
-#define CRT0_CALL_DESTRUCTORS TRUE
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Symbols from the scatter file
- */
-/*===========================================================================*/
-
-/**
- * @brief Main stack lower boundary.
- * @details This symbol must be exported by the linker script and represents
- * the main stack lower boundary.
- */
-extern uint32_t __main_stack_base__;
-
-/**
- *
- * @brief Main stack initial position.
- * @details This symbol must be exported by the linker script and represents
- * the main stack initial position.
- */
-extern uint32_t __main_stack_end__;
-
-/**
- * @brief Process stack lower boundary.
- * @details This symbol must be exported by the linker script and represents
- * the process stack lower boundary.
- */
-extern uint32_t __process_stack_base__;
-
-/**
- * @brief Process stack initial position.
- * @details This symbol must be exported by the linker script and represents
- * the process stack initial position.
- */
-extern uint32_t __process_stack_end__;
-
-/**
- * @brief ROM image of the data segment start.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern uint32_t _textdata;
-
-/**
- * @brief Data segment start.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern uint32_t _data;
-
-/**
- * @brief Data segment end.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern uint32_t _edata;
-
-/**
- * @brief BSS segment start.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern uint32_t _bss_start;
-
-/**
- * @brief BSS segment end.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern uint32_t _bss_end;
-
-/**
- * @brief Constructors table start.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern funcp_t __init_array_start;
-
-/**
- * @brief Constructors table end.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern funcp_t __init_array_end;
-
-/**
- * @brief Destructors table start.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern funcp_t __fini_array_start;
-
-/**
- * @brief Destructors table end.
- * @pre The symbol must be aligned to a 32 bits boundary.
- */
-extern funcp_t __fini_array_end;
-
-/** @} */
-
-/**
- * @brief Application @p main() function.
- */
-extern void main(void);
-
-/**
- * @brief Early initialization.
- * @details This hook is invoked immediately after the stack initialization
- * and before the DATA and BSS segments initialization. The
- * default behavior is to do nothing.
- * @note This function is a weak symbol.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-void __early_init(void) {}
-
-/**
- * @brief Late initialization.
- * @details This hook is invoked after the DATA and BSS segments
- * initialization and before any static constructor. The
- * default behavior is to do nothing.
- * @note This function is a weak symbol.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-void __late_init(void) {}
-
-/**
- * @brief Default @p main() function exit handler.
- * @details This handler is invoked or the @p main() function exit. The
- * default behavior is to enter an infinite loop.
- * @note This function is a weak symbol.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak, naked))
-#endif
-void _default_exit(void) {
- while (1)
- ;
-}
-
-/**
- * @brief Reset vector.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void ResetHandler(void) {
- uint32_t psp, reg;
-
- /* Process Stack initialization, it is allocated starting from the
- symbol __process_stack_end__ and its lower limit is the symbol
- __process_stack_base__.*/
- asm volatile ("cpsid i");
- psp = SYMVAL(__process_stack_end__);
- asm volatile ("msr PSP, %0" : : "r" (psp));
-
-#if CORTEX_USE_FPU
- /* Initializing the FPU context save in lazy mode.*/
- SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
-
- /* CP10 and CP11 set to full access.*/
- SCB_CPACR |= 0x00F00000;
-
- /* FPSCR and FPDSCR initially zero.*/
- reg = 0;
- asm volatile ("vmsr FPSCR, %0" : : "r" (reg) : "memory");
- SCB_FPDSCR = reg;
-
- /* CPU mode initialization, enforced FPCA bit.*/
- reg = CRT0_CONTROL_INIT | 4;
-#else
- /* CPU mode initialization.*/
- reg = CRT0_CONTROL_INIT;
-#endif
- asm volatile ("msr CONTROL, %0" : : "r" (reg));
- asm volatile ("isb");
-
-#if CRT0_INIT_STACKS
- /* Main and Process stacks initialization.*/
- fill32(&__main_stack_base__,
- &__main_stack_end__,
- CRT0_STACKS_FILL_PATTERN);
- fill32(&__process_stack_base__,
- &__process_stack_end__,
- CRT0_STACKS_FILL_PATTERN);
-#endif
-
- /* Early initialization hook invocation.*/
- __early_init();
-
-#if CRT0_INIT_DATA
- /* DATA segment initialization.*/
- {
- uint32_t *tp, *dp;
-
- tp = &_textdata;
- dp = &_data;
- while (dp < &_edata)
- *dp++ = *tp++;
- }
-#endif
-
-#if CRT0_INIT_BSS
- /* BSS segment initialization.*/
- fill32(&_bss_start, &_bss_end, 0);
-#endif
-
- /* Late initialization hook invocation.*/
- __late_init();
-
-#if CRT0_CALL_CONSTRUCTORS
- /* Constructors invocation.*/
- {
- funcpp_t fpp = &__init_array_start;
- while (fpp < &__init_array_end) {
- (*fpp)();
- fpp++;
- }
- }
-#endif
-
- /* Invoking application main() function.*/
- main();
-
-#if CRT0_CALL_DESTRUCTORS
- /* Destructors invocation.*/
- {
- funcpp_t fpp = &__fini_array_start;
- while (fpp < &__fini_array_end) {
- (*fpp)();
- fpp++;
- }
- }
-#endif
-
- /* Invoking the exit handler.*/
- _default_exit();
-}
-
-/** @} */
diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox deleted file mode 100644 index 1d6260b12..000000000 --- a/os/ports/GCC/ARMCMx/port.dox +++ /dev/null @@ -1,251 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup ARMCMx ARM Cortex-Mx
- * @details ARM Cortex-Mx port for the GCC compiler.
- *
- * @section ARMCMx_INTRO Introduction
- * This port supports all the cores implementing the ARMv6-M and ARMv7-M
- * architectures.
- *
- * @section ARMCMx_MODES Kernel Modes
- * The Cortex-Mx port supports two distinct kernel modes:
- * - <b>Advanced Kernel</b> mode. In this mode the kernel only masks
- * interrupt sources with priorities below or equal to the
- * @p CORTEX_BASEPRI_KERNEL level. Higher priorities are not affected by
- * the kernel critical sections and can be used for fast interrupts.
- * This mode is not available in the ARMv6-M architecture which does not
- * support priority masking.
- * - <b>Compact Kernel</b> mode. In this mode the kernel handles IRQ priorities
- * in a simplified way, all interrupt sources are disabled when the kernel
- * enters into a critical zone and re-enabled on exit. This is simple and
- * adequate for most applications, this mode results in a more compact and
- * faster kernel.
- * .
- * The selection of the mode is performed using the port configuration option
- * @p CORTEX_SIMPLIFIED_PRIORITY. Apart from the different handling of
- * interrupts there are no other differences between the two modes. The
- * kernel API is exactly the same.
- *
- * @section ARMCMx_STATES_A System logical states in Compact Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in Compact
- * Kernel mode:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state interrupts are enabled. The processor
- * is running in thread-privileged mode.
- * - <b>Suspended</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode. In this
- * mode this state is not different from the <b>Disabled</b> state.
- * - <b>Disabled</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode. In this
- * mode this state is not different from the <b>Suspended</b> state.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wfi</b>.
- * - <b>S-Locked</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode.
- * - <b>I-Locked</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in exception-privileged mode.
- * - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
- * not globally masked but only interrupts with higher priority can preempt
- * the current handler. The processor is running in exception-privileged
- * mode.
- * - <b>Serving Fast Interrupt</b>. Not implemented in compact kernel mode.
- * - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
- * asynchronous NMI vector and several synchronous fault vectors that can
- * be considered belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
- * the maskable interrupt sources. The ARM state is whatever the processor
- * was running when @p chSysHalt() was invoked.
- *
- * @section ARMCMx_STATES_B System logical states in Advanced Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the
- * Advanced Kernel mode:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state the ARM Cortex-Mx has the BASEPRI register
- * set at @p CORTEX_BASEPRI_USER level, interrupts are not masked. The
- * processor is running in thread-privileged mode.
- * - <b>Suspended</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in thread-privileged mode.
- * - <b>Disabled</b>. Interrupt sources are globally masked. The processor
- * is running in thread-privileged mode.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wfi</b>.
- * - <b>S-Locked</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in thread-privileged mode.
- * - <b>I-Locked</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in exception-privileged mode.
- * - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
- * not globally masked but only interrupts with higher priority can preempt
- * the current handler. The processor is running in exception-privileged
- * mode.
- * - <b>Serving Fast Interrupt</b>. Fast interrupts are defined as interrupt
- * sources having higher priority level than the kernel
- * (@p CORTEX_BASEPRI_KERNEL). In this state is not possible to switch to
- * the I-Locked state because fast interrupts can preempt the kernel
- * critical zone.<br>
- * This state is not implemented in the ARMv6-M implementation because
- * priority masking is not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
- * asynchronous NMI vector and several synchronous fault vectors that can
- * be considered belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
- * the maskable interrupt sources. The ARM state is whatever the processor
- * was running when @p chSysHalt() was invoked.
- * .
- * @section ARMCMx_NOTES ARM Cortex-Mx/GCC port notes
- * The ARM Cortex-Mx port is organized as follow:
- * - The @p main() function is invoked in thread-privileged mode.
- * - Each thread has a private process stack, the system has a single main
- * stack where all the interrupts and exceptions are processed.
- * - The threads are started in thread-privileged mode.
- * - Interrupt nesting and the other advanced core/NVIC features are supported.
- * - The Cortex-Mx port is perfectly generic, support for more devices can be
- * easily added by adding a subdirectory under <tt>./os/ports/GCC/ARMCMx</tt>
- * and giving it the name of the new device, then copy the files from another
- * device into the new directory and customize them for the new device.
- * .
- * @ingroup gcc
- */
-
-/**
- * @defgroup ARMCMx_CONF Configuration Options
- * @details ARM Cortex-Mx Configuration Options. The ARMCMx port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
- * by an interrupt handler between the @p extctx and @p intctx
- * structures.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
- * - @p CORTEX_PRIORITY_SYSTICK, priority of the SYSTICK handler.
- * - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
- * - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
- * @p <b>wfi</b> instruction from within the idle loop. This option is
- * defaulted to FALSE because it can create problems with some debuggers.
- * Setting this option to TRUE reduces the system power requirements.
- * .
- * @section ARMCMx_CONF_1 ARMv6-M specific options
- * The following options are specific for the ARMv6-M architecture:
- * - @p CORTEX_ALTERNATE_SWITCH, when activated makes the OS use the PendSV
- * exception instead of NMI as preemption handler.
- * .
- * @section ARMCMx_CONF_2 ARMv7-M specific options
- * The following options are specific for the ARMv6-M architecture:
- * - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
- * - @p CORTEX_SIMPLIFIED_PRIORITY, when enabled activates the Compact kernel
- * mode.
- * .
- * @ingroup ARMCMx
- */
-
-/**
- * @defgroup ARMCMx_CORE Core Port Implementation
- * @details ARM Cortex-Mx specific port code, structures and macros.
- *
- * @ingroup ARMCMx
- */
-
-/**
- * @defgroup ARMCMx_V6M_CORE ARMv6-M Specific Implementation
- * @details ARMv6-M specific port code, structures and macros.
- *
- * @ingroup ARMCMx_CORE
- */
-
-/**
- * @defgroup ARMCMx_V7M_CORE ARMv7-M Specific Implementation
- * @details ARMv7-M specific port code, structures and macros.
- *
- * @ingroup ARMCMx_CORE
- */
-
-/**
- * @defgroup ARMCMx_STARTUP Startup Support
- * @details ChibiOS/RT provides its own generic startup file for the ARM
- * Cortex-Mx port.
- * Of course it is not mandatory to use it but care should be taken about the
- * startup phase details.
- *
- * @section ARMCMx_STARTUP_1 Startup Process
- * The startup process, as implemented, is the following:
- * -# Interrupts are masked globally.
- * -# The two stacks are initialized by assigning them the sizes defined in
- * the linker script (also known as scatter file).
- * -# The CPU state is switched to Privileged and the PSP stack is used.
- * -# An early initialization routine @p __early_init() is invoked, if the
- * symbol is not defined then an empty default routine is executed
- * (weak symbol).
- * -# DATA and BSS segments are initialized.
- * -# Constructors are invoked.
- * -# The @p main() function is invoked with no parameters.
- * -# Destructors are invoked.
- * -# A branch is performed to the weak symbol @p _default_exit(). The
- * default code is an endless empty loop.
- * .
- * @section ARMCMx_STARTUP_2 Expected linker symbols
- * The startup code starts at the symbol @p ResetHandler and expects the
- * following symbols to be defined in the linker script:
- * - @p __ram_end__, end of RAM.
- * - @p __main_stack_base__, main stack lower boundary.
- * - @p __main_stack_end__, main stack initial position.
- * - @p __process_stack_base__, process stack lower boundary.
- * - @p __process_stack_end__, process stack initial position.
- * - @p _textdata, address of the data segment source read only data.
- * - @p _data, start of the data segment.
- * - @p _edata, end of the data segment end location.
- * - @p _bss_start, start of the BSS.
- * - @p _bss_end, end of the BSS segment.
- * - @p __init_array_start, start of the constructors array.
- * - @p __init_array_end, end of the constructors array.
- * - @p __fini_array_start, start of the destructors array.
- * - @p __fini_array_end, end of the destructors array.
- * .
- * Additionally the kernel expects the following symbols:
- * - @p __main_thread_stack_base__, this symbol is required when the
- * stack checking is enabled (<tt>CH_DBG_ENABLE_STACK_CHECK==TRUE</tt>),
- * it is an alias of @p __process_stack_base__ in this port.
- * - @p __heap_base__ and @p __heap_end__, those symbols are required
- * if the memory core manager is enabled (<tt>CH_CFG_USE_MEMCORE==TRUE</tt>)
- * with a default core size set to zero (<tt>CH_MEMCORE_SIZE==0</tt>).
- * .
- * @ingroup ARMCMx
- */
-
-/**
- * @defgroup ARMCMx_SPECIFIC Specific Implementations
- * @details Platform-specific port code.
- *
- * @ingroup ARMCMx
- */
diff --git a/os/ports/GCC/ARMCMx/rules.mk b/os/ports/GCC/ARMCMx/rules.mk deleted file mode 100644 index 33531d201..000000000 --- a/os/ports/GCC/ARMCMx/rules.mk +++ /dev/null @@ -1,220 +0,0 @@ -# ARM Cortex-Mx common makefile scripts and rules.
-
-# Output directory and files
-ifeq ($(BUILDDIR),)
- BUILDDIR = build
-endif
-ifeq ($(BUILDDIR),.)
- BUILDDIR = build
-endif
-OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
- $(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp
-
-# Automatic compiler options
-OPT = $(USE_OPT)
-COPT = $(USE_COPT)
-CPPOPT = $(USE_CPPOPT)
-ifeq ($(USE_LINK_GC),yes)
- OPT += -ffunction-sections -fdata-sections -fno-common
-endif
-
-# Source files groups and paths
-ifeq ($(USE_THUMB),yes)
- TCSRC += $(CSRC)
- TCPPSRC += $(CPPSRC)
-else
- ACSRC += $(CSRC)
- ACPPSRC += $(CPPSRC)
-endif
-ASRC = $(ACSRC)$(ACPPSRC)
-TSRC = $(TCSRC)$(TCPPSRC)
-SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
-
-# Various directories
-OBJDIR = $(BUILDDIR)/obj
-LSTDIR = $(BUILDDIR)/lst
-
-# Object files groups
-ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
-ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
-TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
-TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
-ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
-ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
-OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
-
-# Paths
-IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
-LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-
-# Macros
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-
-# Libs
-LIBS = $(DLIBS) $(ULIBS)
-
-# Various settings
-MCFLAGS = -mcpu=$(MCU)
-ODFLAGS = -x --syms
-ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
-ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
-CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
-CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
-ifeq ($(USE_LINK_GC),yes)
- LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)
-else
- LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)
-endif
-
-# Thumb interwork enabled only if needed because it kills performance.
-ifneq ($(TSRC),)
- CFLAGS += -DTHUMB_PRESENT
- CPPFLAGS += -DTHUMB_PRESENT
- ASFLAGS += -DTHUMB_PRESENT
- ifneq ($(ASRC),)
- # Mixed ARM and THUMB mode.
- CFLAGS += -mthumb-interwork
- CPPFLAGS += -mthumb-interwork
- ASFLAGS += -mthumb-interwork
- LDFLAGS += -mthumb-interwork
- else
- # Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
- CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
- ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
- LDFLAGS += -mno-thumb-interwork -mthumb
- endif
-else
- # Pure ARM mode
- CFLAGS += -mno-thumb-interwork
- CPPFLAGS += -mno-thumb-interwork
- ASFLAGS += -mno-thumb-interwork
- LDFLAGS += -mno-thumb-interwork
-endif
-
-# Generate dependency information
-CFLAGS += -MD -MP -MF .dep/$(@F).d
-CPPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-# Paths where to search for sources
-VPATH = $(SRCPATHS)
-
-#
-# Makefile rules
-#
-
-all: $(OBJS) $(OUTFILES) MAKE_ALL_RULE_HOOK
-
-MAKE_ALL_RULE_HOOK:
-
-$(OBJS): | $(BUILDDIR)
-
-$(BUILDDIR) $(OBJDIR) $(LSTDIR):
-ifneq ($(USE_VERBOSE_COMPILE),yes)
- @echo Compiler Options
- @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
- @echo
-endif
- mkdir -p $(OBJDIR)
- mkdir -p $(LSTDIR)
-
-$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
-endif
-
-%.elf: $(OBJS) $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-else
- @echo Linking $@
- @$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-endif
-
-%.hex: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(HEX) $< $@
-else
- @echo Creating $@
- @$(HEX) $< $@
-endif
-
-%.bin: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(BIN) $< $@
-else
- @echo Creating $@
- @$(BIN) $< $@
-endif
-
-%.dmp: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) $(ODFLAGS) $< > $@
-else
- @echo Creating $@
- @$(OD) $(ODFLAGS) $< > $@
- @echo Done
-endif
-
-clean:
- @echo Cleaning
- -rm -fR .dep $(BUILDDIR)
- @echo Done
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF ***
diff --git a/os/ports/GCC/AVR/chcore.c b/os/ports/GCC/AVR/chcore.c deleted file mode 100644 index d7a33ecad..000000000 --- a/os/ports/GCC/AVR/chcore.c +++ /dev/null @@ -1,133 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file AVR/chcore.c
- * @brief AVR architecture port code.
- *
- * @addtogroup AVR_CORE
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- * @note The function is declared as a weak symbol, it is possible to
- * redefine it in your application code.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked, weak))
-#endif
-void port_switch(Thread *ntp, Thread *otp) {
-
- asm volatile ("push r2");
- asm volatile ("push r3");
- asm volatile ("push r4");
- asm volatile ("push r5");
- asm volatile ("push r6");
- asm volatile ("push r7");
- asm volatile ("push r8");
- asm volatile ("push r9");
- asm volatile ("push r10");
- asm volatile ("push r11");
- asm volatile ("push r12");
- asm volatile ("push r13");
- asm volatile ("push r14");
- asm volatile ("push r15");
- asm volatile ("push r16");
- asm volatile ("push r17");
- asm volatile ("push r28");
- asm volatile ("push r29");
-
- asm volatile ("movw r30, r22");
- asm volatile ("in r0, 0x3d");
- asm volatile ("std Z+5, r0");
- asm volatile ("in r0, 0x3e");
- asm volatile ("std Z+6, r0");
-
- asm volatile ("movw r30, r24");
- asm volatile ("ldd r0, Z+5");
- asm volatile ("out 0x3d, r0");
- asm volatile ("ldd r0, Z+6");
- asm volatile ("out 0x3e, r0");
-
- asm volatile ("pop r29");
- asm volatile ("pop r28");
- asm volatile ("pop r17");
- asm volatile ("pop r16");
- asm volatile ("pop r15");
- asm volatile ("pop r14");
- asm volatile ("pop r13");
- asm volatile ("pop r12");
- asm volatile ("pop r11");
- asm volatile ("pop r10");
- asm volatile ("pop r9");
- asm volatile ("pop r8");
- asm volatile ("pop r7");
- asm volatile ("pop r6");
- asm volatile ("pop r5");
- asm volatile ("pop r4");
- asm volatile ("pop r3");
- asm volatile ("pop r2");
- asm volatile ("ret");
-}
-
-/**
- * @brief Halts the system.
- * @details This function is invoked by the operating system when an
- * unrecoverable error is detected (for example because a programming
- * error in the application code that triggers an assertion while in
- * debug mode).
- * @note The function is declared as a weak symbol, it is possible to
- * redefine it in your application code.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/**
- * @brief Start a thread by invoking its work function.
- * @details If the work function returns @p chThdExit() is automatically
- * invoked.
- */
-void _port_thread_start(void) {
-
- chSysUnlock();
- asm volatile ("movw r24, r4");
- asm volatile ("movw r30, r2");
- asm volatile ("icall");
- asm volatile ("call chThdExit");
-}
-
-/** @} */
diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h deleted file mode 100644 index 203c6886f..000000000 --- a/os/ports/GCC/AVR/chcore.h +++ /dev/null @@ -1,325 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file AVR/chcore.h
- * @brief AVR architecture port macros and structures.
- *
- * @addtogroup AVR_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#include <avr/io.h>
-#include <avr/interrupt.h>
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/**
- * @brief If enabled allows the idle thread to enter a low power mode.
- */
-#ifndef ENABLE_WFI_IDLE
-#define ENABLE_WFI_IDLE 0
-#endif
-
-/**
- * @brief Macro defining the AVR architecture.
- */
-#define CH_ARCHITECTURE_AVR
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "AVR"
-
-/**
- * @brief Name of the architecture variant (optional).
- */
-#define CH_CORE_VARIANT_NAME "MegaAVR"
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "GCC " __VERSION__
-
-/**
- * @brief Port-specific information string.
- */
-#define CH_PORT_INFO "None"
-
-/**
- * @brief 8 bits stack and memory alignment enforcement.
- */
-typedef uint8_t stkalign_t;
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note The field @p _next is not part of the context, it represents the
- * offset of the structure relative to the stack pointer.
- */
-struct extctx {
- uint8_t _next;
- uint8_t r31;
- uint8_t r30;
- uint8_t r27;
- uint8_t r26;
- uint8_t r25;
- uint8_t r24;
- uint8_t r23;
- uint8_t r22;
- uint8_t r21;
- uint8_t r20;
- uint8_t r19;
- uint8_t r18;
- uint8_t sr;
- uint8_t r1;
- uint8_t r0;
- uint16_t pc;
-};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- * @note The field @p _next is not part of the context, it represents the
- * offset of the structure relative to the stack pointer.
- */
-struct intctx {
- uint8_t _next;
- uint8_t r29;
- uint8_t r28;
- uint8_t r17;
- uint8_t r16;
- uint8_t r15;
- uint8_t r14;
- uint8_t r13;
- uint8_t r12;
- uint8_t r11;
- uint8_t r10;
- uint8_t r9;
- uint8_t r8;
- uint8_t r7;
- uint8_t r6;
- uint8_t r5;
- uint8_t r4;
- uint8_t r3;
- uint8_t r2;
- uint8_t pcl;
- uint8_t pch;
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In the AVR port this structure just holds a pointer to the
- * @p intctx structure representing the stack pointer at the time
- * of the context switch.
- */
-struct context {
- struct intctx *sp;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.sp = (struct intctx*)((uint8_t *)workspace + wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.sp->r2 = (int)pf; \
- tp->p_ctx.sp->r3 = (int)pf >> 8; \
- tp->p_ctx.sp->r4 = (int)arg; \
- tp->p_ctx.sp->r5 = (int)arg >> 8; \
- tp->p_ctx.sp->pcl = (int)_port_thread_start >> 8; \
- tp->p_ctx.sp->pch = (int)_port_thread_start; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 8.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 8
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * This value can be zero on those architecture where there is a
- * separate interrupt stack and the stack space between @p intctx and
- * @p extctx is known to be zero.
- * @note In this port the default is 32 bytes per thread.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- (sizeof(struct intctx) - 1) + \
- (sizeof(struct extctx) - 1) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- * @note This code tricks the compiler to save all the specified registers
- * by "touching" them.
- */
-#define PORT_IRQ_PROLOGUE() { \
- asm ("" : : : "r18", "r19", "r20", "r21", "r22", "r23", "r24", \
- "r25", "r26", "r27", "r30", "r31"); \
-}
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() { \
- dbg_check_lock(); \
- if (chSchIsPreemptionRequired()) \
- chSchDoReschedule(); \
- dbg_check_unlock(); \
-}
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) ISR(id)
-
-/**
- * @brief Port-related initialization code.
- * @note This function is empty in this port.
- */
-#define port_init()
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform more
- * actions.
- * @note Implemented as global interrupt disable.
- */
-#define port_lock() asm volatile ("cli" : : : "memory")
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform more
- * actions.
- * @note Implemented as global interrupt enable.
- */
-#define port_unlock() asm volatile ("sei" : : : "memory")
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note This function is empty in this port.
- */
-#define port_lock_from_isr()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note This function is empty in this port.
- */
-#define port_unlock_from_isr()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Of course non-maskable interrupt sources are not included.
- * @note Implemented as global interrupt disable.
- */
-#define port_disable() asm volatile ("cli" : : : "memory")
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- * @note Interrupt sources above kernel level remains enabled.
- * @note Same as @p port_disable() in this port, there is no difference
- * between the two states.
- */
-#define port_suspend() asm volatile ("cli" : : : "memory")
-
-/**
- * @brief Enables all the interrupt sources.
- * @note Implemented as global interrupt enable.
- */
-#define port_enable() asm volatile ("sei" : : : "memory")
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note This port function is implemented as inlined code for performance
- * reasons.
- */
-#if ENABLE_WFI_IDLE != 0
-#define port_wait_for_interrupt() { \
- asm volatile ("sleep" : : : "memory"); \
-}
-#else
-#define port_wait_for_interrupt()
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_switch(Thread *ntp, Thread *otp);
- void port_halt(void);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/AVR/chtypes.h b/os/ports/GCC/AVR/chtypes.h deleted file mode 100644 index 59d896af4..000000000 --- a/os/ports/GCC/AVR/chtypes.h +++ /dev/null @@ -1,80 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file AVR/chtypes.h
- * @brief AVR architecture port system types.
- *
- * @addtogroup AVR_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint8_t tprio_t; /**< Thread priority. */
-typedef int16_t msg_t; /**< Inter-thread message. */
-typedef uint8_t eventid_t; /**< Event Id. */
-typedef uint8_t eventmask_t; /**< Event mask. */
-typedef uint8_t flagsmask_t; /**< Event flags. */
-typedef uint16_t systime_t; /**< System time. */
-typedef int8_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note It uses the "packed" GCC attribute.
- */
-#define PACK_STRUCT_STRUCT __attribute__((packed))
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/AVR/port.dox b/os/ports/GCC/AVR/port.dox deleted file mode 100644 index 002a37bbc..000000000 --- a/os/ports/GCC/AVR/port.dox +++ /dev/null @@ -1,87 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup AVR MegaAVR
- * @details AVR port for the GCC compiler.
- *
- * @section AVR_STATES Mapping of the System States in the AVR port
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the AVR
- * port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). Interrupts are enabled.
- * - <b>Suspended</b>. Interrupts are disabled.
- * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
- * Suspended state because there are no fast interrupts in this architecture.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>sleep</b>.
- * - <b>S-Locked</b>. Interrupts are disabled.
- * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
- * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. Not present in this architecture.
- * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- * .
- * @section AVR_NOTES The AVR port notes
- * - The AVR does not have a dedicated interrupt stack, make sure to reserve
- * enough stack space for interrupts in each thread stack. This can be done
- * by modifying the @p INT_REQUIRED_STACK macro into
- * <b>./ports/AVR/chcore.h</b>.
- * .
- * @ingroup gcc
- */
-
-/**
- * @defgroup AVR_CONF Configuration Options
- * @details AVR Configuration Options. The AVR port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space
- * used by the interrupt handlers.<br>
- * The default for this value is @p 32, this space is allocated for each
- * thread so be careful in order to not waste precious RAM space.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread hook macro.
- * .
- * @ingroup AVR
- */
-
-/**
- * @defgroup AVR_CORE Core Port Implementation
- * @details AVR specific port code, structures and macros.
- *
- * @ingroup AVR
- */
-
- /**
- * @defgroup AVR_STARTUP Startup Support
- * @details ChibiOS/RT doed not provide startup files for the AVR, there
- * are no special startup requirement so the normal toolchain-provided
- * startup files can be used.
- *
- * @ingroup AVR
- */
diff --git a/os/ports/GCC/AVR/port.mk b/os/ports/GCC/AVR/port.mk deleted file mode 100644 index 7cafb56b2..000000000 --- a/os/ports/GCC/AVR/port.mk +++ /dev/null @@ -1,6 +0,0 @@ -# List of the ChibiOS/RT AVR port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/AVR/chcore.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/AVR
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h deleted file mode 100644 index 22dde173d..000000000 --- a/os/ports/GCC/MSP430/chcore.h +++ /dev/null @@ -1,315 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file MSP430/chcore.h
- * @brief MSP430 architecture port macros and structures.
- *
- * @addtogroup MSP430_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#include <iomacros.h>
-#include <isr_compat.h>
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/**
- * @brief Enables the use of a wait state in the idle thread loop.
- */
-#ifndef ENABLE_WFI_IDLE
-#define ENABLE_WFI_IDLE 0
-#endif
-
-/**
- * @brief Macro defining the MSP430 architecture.
- */
-#define CH_ARCHITECTURE_MSP430
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "MSP430"
-
-/**
- * @brief Name of the architecture variant (optional).
- */
-#define CH_CORE_VARIANT_NAME "MSP430"
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "GCC " __VERSION__
-
-/**
- * @brief Port-specific information string.
- */
-#define CH_PORT_INFO "None"
-
-/**
- * @brief 16 bits stack and memory alignment enforcement.
- */
-typedef uint16_t stkalign_t;
-
-/**
- * @brief Generic MSP430 register.
- */
-typedef void *regmsp_t;
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- */
-struct extctx {
- regmsp_t r12;
- regmsp_t r13;
- regmsp_t r14;
- regmsp_t r15;
- regmsp_t sr;
- regmsp_t pc;
-};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
-struct intctx {
- regmsp_t r4;
- regmsp_t r5;
- regmsp_t r6;
- regmsp_t r7;
- regmsp_t r8;
- regmsp_t r9;
- regmsp_t r10;
- regmsp_t r11;
- regmsp_t pc;
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details This structure usually contains just the saved stack pointer
- * defined as a pointer to a @p intctx structure.
- */
-struct context {
- struct intctx *sp;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.sp->r10 = pf; \
- tp->p_ctx.sp->r11 = arg; \
- tp->p_ctx.sp->pc = _port_thread_start; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 0
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * This value can be zero on those architecture where there is a
- * separate interrupt stack and the stack space between @p intctx and
- * @p extctx is known to be zero.
- * @note In this port the default is 32 bytes per thread.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() { \
- dbg_check_lock(); \
- if (chSchIsPreemptionRequired()) \
- chSchDoReschedule(); \
- dbg_check_unlock(); \
-}
-
-#define ISRNAME(pre, id) pre##id
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) ISR(id, ISRNAME(vect, id))
-
-/**
- * @brief Port-related initialization code.
- * @note This function is empty in this port.
- */
-#define port_init()
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform more
- * actions.
- * @note Implemented as global interrupt disable.
- */
-#define port_lock() asm volatile ("dint" : : : "memory")
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform more
- * actions.
- * @note Implemented as global interrupt enable.
- */
-#define port_unlock() asm volatile ("eint" : : : "memory")
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependen#define PORT_IRQ_EPILOGUE() { \
- if (chSchIsPreemptionRequired()) \
- chSchDoReschedule(); \
-}
- * t,
- * in its simplest form it is void.
- * @note This function is empty in this port.
- */
-#define port_lock_from_isr()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note This function is empty in this port.
- */
-#define port_unlock_from_isr()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Of course non-maskable interrupt sources are not included.
- * @note Implemented as global interrupt disable.
- */
-#define port_disable() asm volatile ("dint" : : : "memory")
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- * @note Interrupt sources above kernel level remains enabled.
- * @note Same as @p port_disable() in this port, there is no difference
- * between the two states.
- */
-#define port_suspend() asm volatile ("dint" : : : "memory")
-
-/**
- * @brief Enables all the interrupt sources.
- * @note Implemented as global interrupt enable.
- */
-#define port_enable() asm volatile ("eint" : : : "memory")
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note This port function is implemented as inlined code for performance
- * reasons.
- * @note The port code does not define a low power mode, this macro has to
- * be defined externally. The default implementation is a "nop", not
- * a real low power mode.
- */
-#if ENABLE_WFI_IDLE != 0
-#ifndef port_wait_for_interrupt
-#define port_wait_for_interrupt() { \
- asm volatile ("nop" : : : "memory"); \
-}
-#endif
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Wrapper of the assembler @p _port_switch() function.
- */
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-
-/**
- * @brief Wrapper of the assembler @p _port_halt() function.
- */
-#define port_halt() _port_halt()
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_halt(void);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/MSP430/chcoreasm.s b/os/ports/GCC/MSP430/chcoreasm.s deleted file mode 100644 index 8c42d0856..000000000 --- a/os/ports/GCC/MSP430/chcoreasm.s +++ /dev/null @@ -1,66 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include "chconf.h"
-
-#define FALSE 0
-#define TRUE 1
-
- .text
- .p2align 1, 0
- .weak _port_switch
-_port_switch:
- push r11
- push r10
- push r9
- push r8
- push r7
- push r6
- push r5
- push r4
- mov r1, 6(r14)
- mov 6(r15), r1
- pop r4
- pop r5
- pop r6
- pop r7
- pop r8
- pop r9
- pop r10
- pop r11
- ret
-
- .p2align 1, 0
- .weak _port_thread_start
-_port_thread_start:
-#if CH_DBG_SYSTEM_STATE_CHECK
- call #dbg_check_unlock
-#endif
- eint
- mov r11, r15
- call r10
- call #chThdExit
- ; Falls into _port_halt
-
- .p2align 1, 0
- .weak _port_halt
-_port_halt:
- dint
-.L1: jmp .L1
diff --git a/os/ports/GCC/MSP430/chtypes.h b/os/ports/GCC/MSP430/chtypes.h deleted file mode 100644 index 84ced2aaf..000000000 --- a/os/ports/GCC/MSP430/chtypes.h +++ /dev/null @@ -1,80 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file MSP430/chtypes.h
- * @brief MSP430 architecture port system types.
- *
- * @addtogroup MSP430_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint16_t tprio_t; /**< Thread priority. */
-typedef int16_t msg_t; /**< Inter-thread message. */
-typedef int16_t eventid_t; /**< Event Id. */
-typedef uint16_t eventmask_t; /**< Event mask. */
-typedef uint16_t flagsmask_t; /**< Event flags. */
-typedef uint16_t systime_t; /**< System time. */
-typedef int16_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note It uses the "packed" GCC attribute.
- */
-#define PACK_STRUCT_STRUCT __attribute__((packed))
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/MSP430/port.dox b/os/ports/GCC/MSP430/port.dox deleted file mode 100644 index 8f316d0c4..000000000 --- a/os/ports/GCC/MSP430/port.dox +++ /dev/null @@ -1,95 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup MSP430 MSP430
- * @details MSP430 port for the GCC compiler.
- *
- * @section MSP430_INTRO Introduction
- * This port supports all the cores implementing the MSP430 architecture.
- *
- * @section MSP430_STATES Mapping of the System States in the MSP430 port
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the MSP430
- * port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). Interrupts are enabled.
- * - <b>Suspended</b>. Interrupts are disabled.
- * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
- * Suspended state because there are no fast interrupts in this architecture.
- * - <b>Sleep</b>. Not yet implemented.
- * - <b>S-Locked</b>. Interrupts are disabled.
- * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
- * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The MSP430 has several non
- * maskable interrupt sources that can be associated to this state.
- * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- * .
- * @section MSP430_NOTES The MSP430 port notes
- * - The MSP430 does not have a dedicated interrupt stack, make sure to reserve
- * enough stack space for interrupts in each thread stack. This can be done
- * by modifying the @p INT_REQUIRED_STACK configuration options.
- * - The state of the hardware multiplier is not saved in the thread context,
- * make sure to use it in <b>Suspended</b> state (interrupts masked).
- * - The port code does not define the switch to a low power mode for the
- * idle thread because the MSP430 has several low power modes. You can
- * select the proper low power mode for you application by defining the
- * macro @p port_wait_for_interrupt().
- * .
- * @ingroup gcc
- */
-
-/**
- * @defgroup MSP430_CONF Configuration Options
- * @details MSP430 Configuration Options. The MSP430 port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space
- * used by the interrupt handlers.<br>
- * The default for this value is @p 32, this space is allocated for each
- * thread so be careful in order to not waste precious RAM space.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread hook macro.
- * .
- * @ingroup MSP430
- */
-
-/**
- * @defgroup MSP430_CORE Core Port Implementation
- * @details MSP430 specific port code, structures and macros.
- *
- * @ingroup MSP430
- */
-
- /**
- * @defgroup MSP430_STARTUP Startup Support
- * @details ChibiOS/RT doed not provide startup files for the MSP430, there
- * are no special startup requirement so the normal toolchain-provided
- * startup files can be used.
- *
- * @ingroup MSP430
- */
diff --git a/os/ports/GCC/MSP430/port.mk b/os/ports/GCC/MSP430/port.mk deleted file mode 100644 index 8291fa9d9..000000000 --- a/os/ports/GCC/MSP430/port.mk +++ /dev/null @@ -1,6 +0,0 @@ -# List of the ChibiOS/RT MSP430 port files.
-PORTSRC =
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/MSP430/chcoreasm.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/MSP430
diff --git a/os/ports/GCC/MSP430/rules.mk b/os/ports/GCC/MSP430/rules.mk deleted file mode 100644 index e5df10916..000000000 --- a/os/ports/GCC/MSP430/rules.mk +++ /dev/null @@ -1,87 +0,0 @@ -# MSP430 makefile scripts and rules.
-
-# Automatic compiler options
-OPT = $(USE_OPT)
-COPT = $(USE_COPT)
-CPPOPT = $(USE_CPPOPT)
-ifeq ($(USE_LINK_GC),yes)
- OPT += -ffunction-sections -fdata-sections
-endif
-
-# Source files groups
-SRC = $(CSRC)$(CPPSRC)
-
-# Object files groups
-COBJS = $(CSRC:.c=.o)
-CPPOBJS = $(CPPSRC:.cpp=.o)
-ASMOBJS = $(ASMSRC:.s=.o)
-OBJS = $(ASMOBJS) $(COBJS) $(CPPOBJS)
-
-# Paths
-IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
-LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-
-# Macros
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-
-# Libs
-LIBS = $(DLIBS) $(ULIBS)
-
-MCFLAGS = -mmcu=$(MCU)
-ODFLAGS = -x --syms
-ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
-CPFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
-ifeq ($(LINK_GC),yes)
- LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)
-else
- LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)
-endif
-
-# Generate dependency information
-CPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-#
-# Makefile rules
-#
-all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dmp MAKE_ALL_RULE_HOOK
-
-MAKE_ALL_RULE_HOOK:
-
-$(CPPOBJS) : %.o : %.cpp
- @echo
- $(CPPC) -c $(CPPFLAGS) -I . $(IINCDIR) $< -o $@
-
-$(COBJS) : %.o : %.c
- @echo
- $(CC) -c $(CPFLAGS) -I . $(IINCDIR) $< -o $@
-
-$(ASMOBJS) : %.o : %.s
- @echo
- $(AS) -c $(ASFLAGS) -I . $(IINCDIR) $< -o $@
-
-%elf: $(OBJS)
- @echo
- $(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-
-%hex: %elf
- $(HEX) $< $@
-
-%bin: %elf
- $(BIN) $< $@
-
-%dmp: %elf
- $(OD) $(ODFLAGS) $< > $@
-
-clean:
- -rm -f $(OBJS)
- -rm -f $(CSRC:.c=.lst) $(CPPSRC:.cpp=.lst) $(ASMSRC:.s=.lst)
- -rm -f $(PROJECT).elf $(PROJECT).dmp $(PROJECT).map $(PROJECT).hex $(PROJECT).bin
- -rm -fR .dep
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF ***
diff --git a/os/ports/GCC/PPC/SPC560BCxx/bam.s b/os/ports/GCC/PPC/SPC560BCxx/bam.s deleted file mode 100644 index f62c854dd..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/bam.s +++ /dev/null @@ -1,47 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/bam.s
- * @brief SPC560BCxx boot assistant record.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* BAM record.*/
- .section .bam, "ax"
- .long 0x015A0000
- .long _reset_address
-
- .align 2
- .globl _reset_address
- .type _reset_address, @function
-_reset_address:
- bl _coreinit
- bl _ivinit
-
- b _boot_address
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560BCxx/core.s b/os/ports/GCC/PPC/SPC560BCxx/core.s deleted file mode 100644 index e4de3d453..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/core.s +++ /dev/null @@ -1,214 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/core.s
- * @brief e200z0 core configuration.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/**
- * @name BUCSR registers definitions
- * @{
- */
-#define BUCSR_BPEN 0x00000001
-#define BUCSR_BALLOC_BFI 0x00000200
-/** @} */
-
-/**
- * @name BUCSR default settings
- * @{
- */
-#define BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BALLOC_BFI)
-/** @} */
-
-/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_ME 0x00001000
-#define MSR_DE 0x00000200
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
- * @name MSR default settings
- * @{
- */
-#define MSR_DEFAULT (MSR_WE | MSR_CE | MSR_ME)
-/** @} */
-
-#if !defined(__DOXYGEN__)
-
- .section .coreinit, "ax"
-
- .align 2
- .globl _coreinit
- .type _coreinit, @function
-_coreinit:
- /*
- * RAM clearing, this device requires a write to all RAM location in
- * order to initialize the ECC detection hardware, this is going to
- * slow down the startup but there is no way around.
- */
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
-.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
-.cleareccend:
-
- /*
- * Branch prediction enabled.
- */
- li %r3, BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
-
- blr
-
- /*
- * Exception vectors initialization.
- */
- .global _ivinit
- .type _ivinit, @function
-_ivinit:
- /* MSR initialization.*/
- lis %r3, MSR_DEFAULT@h
- ori %r3, %r3, MSR_DEFAULT@l
- mtMSR %r3
-
- /* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- blr
-
- .section .ivors, "ax"
-
- .globl IVORS
-IVORS:
-IVOR0: b IVOR0
- .align 4
-IVOR1: b _IVOR1
- .align 4
-IVOR2: b _IVOR2
- .align 4
-IVOR3: b _IVOR3
- .align 4
-IVOR4: b _IVOR4
- .align 4
-IVOR5: b _IVOR5
- .align 4
-IVOR6: b _IVOR6
- .align 4
-IVOR7: b _IVOR7
- .align 4
-IVOR8: b _IVOR8
- .align 4
-IVOR9: b _IVOR9
- .align 4
-IVOR10: b _IVOR10
- .align 4
-IVOR11: b _IVOR11
- .align 4
-IVOR12: b _IVOR12
- .align 4
-IVOR13: b _IVOR13
- .align 4
-IVOR14: b _IVOR14
- .align 4
-IVOR15: b _IVOR15
-
- .section .handlers, "ax"
-
- /*
- * Unhandled exceptions handler.
- */
- .weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
- .weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
- .weak _IVOR12, _IVOR13, _IVOR14, _IVOR15
- .weak _unhandled_exception
-_IVOR0:
-_IVOR1:
-_IVOR2:
-_IVOR3:
-_IVOR5:
-_IVOR6:
-_IVOR7:
-_IVOR8:
-_IVOR9:
-_IVOR11:
-_IVOR12:
-_IVOR13:
-_IVOR14:
-_IVOR15:
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560BCxx/ld/SPC560B44.ld b/os/ports/GCC/PPC/SPC560BCxx/ld/SPC560B44.ld deleted file mode 100644 index 2b81984d1..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/ld/SPC560B44.ld +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC560B44 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 384k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 28k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 4KB because the IVPR register
- requires an alignment of 4KB and the first 4KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 4KB by using special sections.*/
- . = ALIGN(0x00001000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC560BCxx/ld/SPC560B50.ld b/os/ports/GCC/PPC/SPC560BCxx/ld/SPC560B50.ld deleted file mode 100644 index 7ccede017..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/ld/SPC560B50.ld +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC560B50 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 512k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 32k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 4KB because the IVPR register
- requires an alignment of 4KB and the first 4KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 4KB by using special sections.*/
- . = ALIGN(0x00001000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC560BCxx/port.mk b/os/ports/GCC/PPC/SPC560BCxx/port.mk deleted file mode 100644 index c798e2886..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/port.mk +++ /dev/null @@ -1,13 +0,0 @@ -# List of the ChibiOS/RT SPC560BCxx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC560BCxx/bam.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560BCxx/core.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560BCxx/vectors.s \
- ${CHIBIOS}/os/ports/GCC/PPC/ivor.s \
- ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560BCxx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC560BCxx/ld
diff --git a/os/ports/GCC/PPC/SPC560BCxx/ppcparams.h b/os/ports/GCC/PPC/SPC560BCxx/ppcparams.h deleted file mode 100644 index 5d4d9a37e..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/ppcparams.h +++ /dev/null @@ -1,72 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/ppcparams.h
- * @brief PowerPC parameters for the SPC560B/Cxx.
- *
- * @defgroup PPC_SPC560BCxx SPC560BCxx Specific Parameters
- * @ingroup PPC_SPECIFIC
- * @details This file contains the PowerPC specific parameters for the
- * SPC560BCxx platform.
- * @{
- */
-
-#ifndef _PPCPARAMS_H_
-#define _PPCPARAMS_H_
-
-/**
- * @brief PPC core model.
- */
-#define PPC_VARIANT PPC_VARIANT_e200z0
-
-/**
- * @brief Number of writable bits in IVPR register.
- */
-#define PPC_IVPR_BITS 20
-
-/**
- * @brief IVORx registers support.
- */
-#define PPC_SUPPORTS_IVORS FALSE
-
-/**
- * @brief Book E instruction set support.
- */
-#define PPC_SUPPORTS_BOOKE FALSE
-
-/**
- * @brief VLE instruction set support.
- */
-#define PPC_SUPPORTS_VLE TRUE
-
-/**
- * @brief Supports VLS Load/Store Multiple Volatile instructions.
- */
-#define PPC_SUPPORTS_VLE_MULTI TRUE
-
-/**
- * @brief Supports the decrementer timer.
- */
-#define PPC_SUPPORTS_DECREMENTER FALSE
-
-#endif /* _PPCPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560BCxx/vectors.h b/os/ports/GCC/PPC/SPC560BCxx/vectors.h deleted file mode 100644 index 4a54e0f70..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/vectors.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _VECTORS_H_
-#define _VECTORS_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @brief Number of ISR vectors available.
- */
-#define VECTORS_NUMBER 217
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[VECTORS_NUMBER];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _OSAL_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560BCxx/vectors.s b/os/ports/GCC/PPC/SPC560BCxx/vectors.s deleted file mode 100644 index 1ed6ddde3..000000000 --- a/os/ports/GCC/PPC/SPC560BCxx/vectors.s +++ /dev/null @@ -1,379 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/vectors.s
- * @brief SPC560BCxx vectors table.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
- .long vector4, vector5, vector6, vector7
- .long vector8, vector9, vector10, vector11
- .long vector12, vector13, vector14, vector15
- .long vector16, vector17, vector18, vector19
- .long vector20, vector21, vector22, vector23
- .long vector24, vector25, vector26, vector27
- .long vector28, vector29, vector30, vector31
- .long vector32, vector33, vector34, vector35
- .long vector36, vector37, vector38, vector39
- .long vector40, vector41, vector42, vector43
- .long vector44, vector45, vector46, vector47
- .long vector48, vector49, vector50, vector51
- .long vector52, vector53, vector54, vector55
- .long vector56, vector57, vector58, vector59
- .long vector60, vector61, vector62, vector63
- .long vector64, vector65, vector66, vector67
- .long vector68, vector69, vector70, vector71
- .long vector72, vector73, vector74, vector75
- .long vector76, vector77, vector78, vector79
- .long vector80, vector81, vector82, vector83
- .long vector84, vector85, vector86, vector87
- .long vector88, vector89, vector90, vector91
- .long vector92, vector93, vector94, vector95
- .long vector96, vector97, vector98, vector99
- .long vector100, vector101, vector102, vector103
- .long vector104, vector105, vector106, vector107
- .long vector108, vector109, vector110, vector111
- .long vector112, vector113, vector114, vector115
- .long vector116, vector117, vector118, vector119
- .long vector120, vector121, vector122, vector123
- .long vector124, vector125, vector126, vector127
- .long vector128, vector129, vector130, vector131
- .long vector132, vector133, vector134, vector135
- .long vector136, vector137, vector138, vector139
- .long vector140, vector141, vector142, vector143
- .long vector144, vector145, vector146, vector147
- .long vector148, vector149, vector150, vector151
- .long vector152, vector153, vector154, vector155
- .long vector156, vector157, vector158, vector159
- .long vector160, vector161, vector162, vector163
- .long vector164, vector165, vector166, vector167
- .long vector168, vector169, vector170, vector171
- .long vector172, vector173, vector174, vector175
- .long vector176, vector177, vector178, vector179
- .long vector180, vector181, vector182, vector183
- .long vector184, vector185, vector186, vector187
- .long vector188, vector189, vector190, vector191
- .long vector192, vector193, vector194, vector195
- .long vector196, vector197, vector198, vector199
- .long vector200, vector201, vector202, vector203
- .long vector204, vector205, vector206, vector207
- .long vector208, vector209, vector210, vector211
- .long vector212, vector213, vector214, vector215
- .long vector216
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
- .weak vector4, vector5, vector6, vector7
- .weak vector8, vector9, vector10, vector11
- .weak vector12, vector13, vector14, vector15
- .weak vector16, vector17, vector18, vector19
- .weak vector20, vector21, vector22, vector23
- .weak vector24, vector25, vector26, vector27
- .weak vector28, vector29, vector30, vector31
- .weak vector32, vector33, vector34, vector35
- .weak vector36, vector37, vector38, vector39
- .weak vector40, vector41, vector42, vector43
- .weak vector44, vector45, vector46, vector47
- .weak vector48, vector49, vector50, vector51
- .weak vector52, vector53, vector54, vector55
- .weak vector56, vector57, vector58, vector59
- .weak vector60, vector61, vector62, vector63
- .weak vector64, vector65, vector66, vector67
- .weak vector68, vector69, vector70, vector71
- .weak vector72, vector73, vector74, vector75
- .weak vector76, vector77, vector78, vector79
- .weak vector80, vector81, vector82, vector83
- .weak vector84, vector85, vector86, vector87
- .weak vector88, vector89, vector90, vector91
- .weak vector92, vector93, vector94, vector95
- .weak vector96, vector97, vector98, vector99
- .weak vector100, vector101, vector102, vector103
- .weak vector104, vector105, vector106, vector107
- .weak vector108, vector109, vector110, vector111
- .weak vector112, vector113, vector114, vector115
- .weak vector116, vector117, vector118, vector119
- .weak vector120, vector121, vector122, vector123
- .weak vector124, vector125, vector126, vector127
- .weak vector128, vector129, vector130, vector131
- .weak vector132, vector133, vector134, vector135
- .weak vector136, vector137, vector138, vector139
- .weak vector140, vector141, vector142, vector143
- .weak vector144, vector145, vector146, vector147
- .weak vector148, vector149, vector150, vector151
- .weak vector152, vector153, vector154, vector155
- .weak vector156, vector157, vector158, vector159
- .weak vector160, vector161, vector162, vector163
- .weak vector164, vector165, vector166, vector167
- .weak vector168, vector169, vector170, vector171
- .weak vector172, vector173, vector174, vector175
- .weak vector176, vector177, vector178, vector179
- .weak vector180, vector181, vector182, vector183
- .weak vector184, vector185, vector186, vector187
- .weak vector188, vector189, vector190, vector191
- .weak vector192, vector193, vector194, vector195
- .weak vector196, vector197, vector198, vector199
- .weak vector200, vector201, vector202, vector203
- .weak vector204, vector205, vector206, vector207
- .weak vector208, vector209, vector210, vector211
- .weak vector212, vector213, vector214, vector215
- .weak vector216
-
-vector0:
-vector1:
-vector2:
-vector3:
-vector4:
-vector5:
-vector6:
-vector7:
-vector8:
-vector9:
-vector10:
-vector11:
-vector12:
-vector13:
-vector14:
-vector15:
-vector16:
-vector17:
-vector18:
-vector19:
-vector20:
-vector21:
-vector22:
-vector23:
-vector24:
-vector25:
-vector26:
-vector27:
-vector28:
-vector29:
-vector30:
-vector31:
-vector32:
-vector33:
-vector34:
-vector35:
-vector36:
-vector37:
-vector38:
-vector39:
-vector40:
-vector41:
-vector42:
-vector43:
-vector44:
-vector45:
-vector46:
-vector47:
-vector48:
-vector49:
-vector50:
-vector51:
-vector52:
-vector53:
-vector54:
-vector55:
-vector56:
-vector57:
-vector58:
-vector59:
-vector60:
-vector61:
-vector62:
-vector63:
-vector64:
-vector65:
-vector66:
-vector67:
-vector68:
-vector69:
-vector70:
-vector71:
-vector72:
-vector73:
-vector74:
-vector75:
-vector76:
-vector77:
-vector78:
-vector79:
-vector80:
-vector81:
-vector82:
-vector83:
-vector84:
-vector85:
-vector86:
-vector87:
-vector88:
-vector89:
-vector90:
-vector91:
-vector92:
-vector93:
-vector94:
-vector95:
-vector96:
-vector97:
-vector98:
-vector99:
-vector100:
-vector101:
-vector102:
-vector103:
-vector104:
-vector105:
-vector106:
-vector107:
-vector108:
-vector109:
-vector110:
-vector111:
-vector112:
-vector113:
-vector114:
-vector115:
-vector116:
-vector117:
-vector118:
-vector119:
-vector120:
-vector121:
-vector122:
-vector123:
-vector124:
-vector125:
-vector126:
-vector127:
-vector128:
-vector129:
-vector130:
-vector131:
-vector132:
-vector133:
-vector134:
-vector135:
-vector136:
-vector137:
-vector138:
-vector139:
-vector140:
-vector141:
-vector142:
-vector143:
-vector144:
-vector145:
-vector146:
-vector147:
-vector148:
-vector149:
-vector150:
-vector151:
-vector152:
-vector153:
-vector154:
-vector155:
-vector156:
-vector157:
-vector158:
-vector159:
-vector160:
-vector161:
-vector162:
-vector163:
-vector164:
-vector165:
-vector166:
-vector167:
-vector168:
-vector169:
-vector170:
-vector171:
-vector172:
-vector173:
-vector174:
-vector175:
-vector176:
-vector177:
-vector178:
-vector179:
-vector180:
-vector181:
-vector182:
-vector183:
-vector184:
-vector185:
-vector186:
-vector187:
-vector188:
-vector189:
-vector190:
-vector191:
-vector192:
-vector193:
-vector194:
-vector195:
-vector196:
-vector197:
-vector198:
-vector199:
-vector200:
-vector201:
-vector202:
-vector203:
-vector204:
-vector205:
-vector206:
-vector207:
-vector208:
-vector209:
-vector210:
-vector211:
-vector212:
-vector213:
-vector214:
-vector215:
-vector216:
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Dxx/bam.s b/os/ports/GCC/PPC/SPC560Dxx/bam.s deleted file mode 100644 index 28792c3c3..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/bam.s +++ /dev/null @@ -1,47 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Dxx/bam.s
- * @brief SPC560Dxx boot assistant record.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* BAM record.*/
- .section .bam, "ax"
- .long 0x015A0000
- .long _reset_address
-
- .align 2
- .globl _reset_address
- .type _reset_address, @function
-_reset_address:
- bl _coreinit
- bl _ivinit
-
- b _boot_address
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Dxx/core.s b/os/ports/GCC/PPC/SPC560Dxx/core.s deleted file mode 100644 index 434f96fa3..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/core.s +++ /dev/null @@ -1,214 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Dxx/core.s
- * @brief e200z0 core configuration.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/**
- * @name BUCSR registers definitions
- * @{
- */
-#define BUCSR_BPEN 0x00000001
-#define BUCSR_BALLOC_BFI 0x00000200
-/** @} */
-
-/**
- * @name BUCSR default settings
- * @{
- */
-#define BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BALLOC_BFI)
-/** @} */
-
-/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_ME 0x00001000
-#define MSR_DE 0x00000200
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
- * @name MSR default settings
- * @{
- */
-#define MSR_DEFAULT (MSR_WE | MSR_CE | MSR_ME)
-/** @} */
-
-#if !defined(__DOXYGEN__)
-
- .section .coreinit, "ax"
-
- .align 2
- .globl _coreinit
- .type _coreinit, @function
-_coreinit:
- /*
- * RAM clearing, this device requires a write to all RAM location in
- * order to initialize the ECC detection hardware, this is going to
- * slow down the startup but there is no way around.
- */
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
-.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
-.cleareccend:
-
- /*
- * Branch prediction enabled.
- */
- li %r3, BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
-
- blr
-
- /*
- * Exception vectors initialization.
- */
- .global _ivinit
- .type _ivinit, @function
-_ivinit:
- /* MSR initialization.*/
- lis %r3, MSR_DEFAULT@h
- ori %r3, %r3, MSR_DEFAULT@l
- mtMSR %r3
-
- /* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- blr
-
- .section .ivors, "ax"
-
- .globl IVORS
-IVORS:
-IVOR0: b IVOR0
- .align 4
-IVOR1: b _IVOR1
- .align 4
-IVOR2: b _IVOR2
- .align 4
-IVOR3: b _IVOR3
- .align 4
-IVOR4: b _IVOR4
- .align 4
-IVOR5: b _IVOR5
- .align 4
-IVOR6: b _IVOR6
- .align 4
-IVOR7: b _IVOR7
- .align 4
-IVOR8: b _IVOR8
- .align 4
-IVOR9: b _IVOR9
- .align 4
-IVOR10: b _IVOR10
- .align 4
-IVOR11: b _IVOR11
- .align 4
-IVOR12: b _IVOR12
- .align 4
-IVOR13: b _IVOR13
- .align 4
-IVOR14: b _IVOR14
- .align 4
-IVOR15: b _IVOR15
-
- .section .handlers, "ax"
-
- /*
- * Unhandled exceptions handler.
- */
- .weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
- .weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
- .weak _IVOR12, _IVOR13, _IVOR14, _IVOR15
- .weak _unhandled_exception
-_IVOR0:
-_IVOR1:
-_IVOR2:
-_IVOR3:
-_IVOR5:
-_IVOR6:
-_IVOR7:
-_IVOR8:
-_IVOR9:
-_IVOR11:
-_IVOR12:
-_IVOR13:
-_IVOR14:
-_IVOR15:
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Dxx/ld/SPC560D30.ld b/os/ports/GCC/PPC/SPC560Dxx/ld/SPC560D30.ld deleted file mode 100644 index 78a18c527..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/ld/SPC560D30.ld +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC560D30 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 128k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 12k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 4KB because the IVPR register
- requires an alignment of 4KB and the first 4KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 4KB by using special sections.*/
- . = ALIGN(0x00001000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC560Dxx/ld/SPC560D40.ld b/os/ports/GCC/PPC/SPC560Dxx/ld/SPC560D40.ld deleted file mode 100644 index 7283994bf..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/ld/SPC560D40.ld +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC560D40 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 256k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 16k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 4KB because the IVPR register
- requires an alignment of 4KB and the first 4KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 4KB by using special sections.*/
- . = ALIGN(0x00001000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC560Dxx/port.mk b/os/ports/GCC/PPC/SPC560Dxx/port.mk deleted file mode 100644 index e0756b8c2..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/port.mk +++ /dev/null @@ -1,13 +0,0 @@ -# List of the ChibiOS/RT SPC560Dxx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC560Dxx/bam.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560Dxx/core.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560Dxx/vectors.s \
- ${CHIBIOS}/os/ports/GCC/PPC/ivor.s \
- ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560Dxx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC560Dxx/ld
diff --git a/os/ports/GCC/PPC/SPC560Dxx/ppcparams.h b/os/ports/GCC/PPC/SPC560Dxx/ppcparams.h deleted file mode 100644 index 5d4d9a37e..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/ppcparams.h +++ /dev/null @@ -1,72 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/ppcparams.h
- * @brief PowerPC parameters for the SPC560B/Cxx.
- *
- * @defgroup PPC_SPC560BCxx SPC560BCxx Specific Parameters
- * @ingroup PPC_SPECIFIC
- * @details This file contains the PowerPC specific parameters for the
- * SPC560BCxx platform.
- * @{
- */
-
-#ifndef _PPCPARAMS_H_
-#define _PPCPARAMS_H_
-
-/**
- * @brief PPC core model.
- */
-#define PPC_VARIANT PPC_VARIANT_e200z0
-
-/**
- * @brief Number of writable bits in IVPR register.
- */
-#define PPC_IVPR_BITS 20
-
-/**
- * @brief IVORx registers support.
- */
-#define PPC_SUPPORTS_IVORS FALSE
-
-/**
- * @brief Book E instruction set support.
- */
-#define PPC_SUPPORTS_BOOKE FALSE
-
-/**
- * @brief VLE instruction set support.
- */
-#define PPC_SUPPORTS_VLE TRUE
-
-/**
- * @brief Supports VLS Load/Store Multiple Volatile instructions.
- */
-#define PPC_SUPPORTS_VLE_MULTI TRUE
-
-/**
- * @brief Supports the decrementer timer.
- */
-#define PPC_SUPPORTS_DECREMENTER FALSE
-
-#endif /* _PPCPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Dxx/vectors.h b/os/ports/GCC/PPC/SPC560Dxx/vectors.h deleted file mode 100644 index 4347796d5..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/vectors.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560BCxx/vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _VECTORS_H_
-#define _VECTORS_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @brief Number of ISR vectors available.
- */
-#define VECTORS_NUMBER 155
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[VECTORS_NUMBER];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _OSAL_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Dxx/vectors.s b/os/ports/GCC/PPC/SPC560Dxx/vectors.s deleted file mode 100644 index 2536e51ce..000000000 --- a/os/ports/GCC/PPC/SPC560Dxx/vectors.s +++ /dev/null @@ -1,285 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Dxx/vectors.s
- * @brief SPC560Dxx vectors table.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
- .long vector4, vector5, vector6, vector7
- .long vector8, vector9, vector10, vector11
- .long vector12, vector13, vector14, vector15
- .long vector16, vector17, vector18, vector19
- .long vector20, vector21, vector22, vector23
- .long vector24, vector25, vector26, vector27
- .long vector28, vector29, vector30, vector31
- .long vector32, vector33, vector34, vector35
- .long vector36, vector37, vector38, vector39
- .long vector40, vector41, vector42, vector43
- .long vector44, vector45, vector46, vector47
- .long vector48, vector49, vector50, vector51
- .long vector52, vector53, vector54, vector55
- .long vector56, vector57, vector58, vector59
- .long vector60, vector61, vector62, vector63
- .long vector64, vector65, vector66, vector67
- .long vector68, vector69, vector70, vector71
- .long vector72, vector73, vector74, vector75
- .long vector76, vector77, vector78, vector79
- .long vector80, vector81, vector82, vector83
- .long vector84, vector85, vector86, vector87
- .long vector88, vector89, vector90, vector91
- .long vector92, vector93, vector94, vector95
- .long vector96, vector97, vector98, vector99
- .long vector100, vector101, vector102, vector103
- .long vector104, vector105, vector106, vector107
- .long vector108, vector109, vector110, vector111
- .long vector112, vector113, vector114, vector115
- .long vector116, vector117, vector118, vector119
- .long vector120, vector121, vector122, vector123
- .long vector124, vector125, vector126, vector127
- .long vector128, vector129, vector130, vector131
- .long vector132, vector133, vector134, vector135
- .long vector136, vector137, vector138, vector139
- .long vector140, vector141, vector142, vector143
- .long vector144, vector145, vector146, vector147
- .long vector148, vector149, vector150, vector151
- .long vector152, vector153, vector154
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
- .weak vector4, vector5, vector6, vector7
- .weak vector8, vector9, vector10, vector11
- .weak vector12, vector13, vector14, vector15
- .weak vector16, vector17, vector18, vector19
- .weak vector20, vector21, vector22, vector23
- .weak vector24, vector25, vector26, vector27
- .weak vector28, vector29, vector30, vector31
- .weak vector32, vector33, vector34, vector35
- .weak vector36, vector37, vector38, vector39
- .weak vector40, vector41, vector42, vector43
- .weak vector44, vector45, vector46, vector47
- .weak vector48, vector49, vector50, vector51
- .weak vector52, vector53, vector54, vector55
- .weak vector56, vector57, vector58, vector59
- .weak vector60, vector61, vector62, vector63
- .weak vector64, vector65, vector66, vector67
- .weak vector68, vector69, vector70, vector71
- .weak vector72, vector73, vector74, vector75
- .weak vector76, vector77, vector78, vector79
- .weak vector80, vector81, vector82, vector83
- .weak vector84, vector85, vector86, vector87
- .weak vector88, vector89, vector90, vector91
- .weak vector92, vector93, vector94, vector95
- .weak vector96, vector97, vector98, vector99
- .weak vector100, vector101, vector102, vector103
- .weak vector104, vector105, vector106, vector107
- .weak vector108, vector109, vector110, vector111
- .weak vector112, vector113, vector114, vector115
- .weak vector116, vector117, vector118, vector119
- .weak vector120, vector121, vector122, vector123
- .weak vector124, vector125, vector126, vector127
- .weak vector128, vector129, vector130, vector131
- .weak vector132, vector133, vector134, vector135
- .weak vector136, vector137, vector138, vector139
- .weak vector140, vector141, vector142, vector143
- .weak vector144, vector145, vector146, vector147
- .weak vector148, vector149, vector150, vector151
- .weak vector152, vector153, vector154
-
-vector0:
-vector1:
-vector2:
-vector3:
-vector4:
-vector5:
-vector6:
-vector7:
-vector8:
-vector9:
-vector10:
-vector11:
-vector12:
-vector13:
-vector14:
-vector15:
-vector16:
-vector17:
-vector18:
-vector19:
-vector20:
-vector21:
-vector22:
-vector23:
-vector24:
-vector25:
-vector26:
-vector27:
-vector28:
-vector29:
-vector30:
-vector31:
-vector32:
-vector33:
-vector34:
-vector35:
-vector36:
-vector37:
-vector38:
-vector39:
-vector40:
-vector41:
-vector42:
-vector43:
-vector44:
-vector45:
-vector46:
-vector47:
-vector48:
-vector49:
-vector50:
-vector51:
-vector52:
-vector53:
-vector54:
-vector55:
-vector56:
-vector57:
-vector58:
-vector59:
-vector60:
-vector61:
-vector62:
-vector63:
-vector64:
-vector65:
-vector66:
-vector67:
-vector68:
-vector69:
-vector70:
-vector71:
-vector72:
-vector73:
-vector74:
-vector75:
-vector76:
-vector77:
-vector78:
-vector79:
-vector80:
-vector81:
-vector82:
-vector83:
-vector84:
-vector85:
-vector86:
-vector87:
-vector88:
-vector89:
-vector90:
-vector91:
-vector92:
-vector93:
-vector94:
-vector95:
-vector96:
-vector97:
-vector98:
-vector99:
-vector100:
-vector101:
-vector102:
-vector103:
-vector104:
-vector105:
-vector106:
-vector107:
-vector108:
-vector109:
-vector110:
-vector111:
-vector112:
-vector113:
-vector114:
-vector115:
-vector116:
-vector117:
-vector118:
-vector119:
-vector120:
-vector121:
-vector122:
-vector123:
-vector124:
-vector125:
-vector126:
-vector127:
-vector128:
-vector129:
-vector130:
-vector131:
-vector132:
-vector133:
-vector134:
-vector135:
-vector136:
-vector137:
-vector138:
-vector139:
-vector140:
-vector141:
-vector142:
-vector143:
-vector144:
-vector145:
-vector146:
-vector147:
-vector148:
-vector149:
-vector150:
-vector151:
-vector152:
-vector153:
-vector154:
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/bam.s b/os/ports/GCC/PPC/SPC560Pxx/bam.s deleted file mode 100644 index d1feed8d3..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/bam.s +++ /dev/null @@ -1,47 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Pxx/bam.s
- * @brief SPC560Pxx boot assistant record.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* BAM record.*/
- .section .bam, "ax"
- .long 0x015A0000
- .long _reset_address
-
- .align 2
- .globl _reset_address
- .type _reset_address, @function
-_reset_address:
- bl _coreinit
- bl _ivinit
-
- b _boot_address
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/core.s b/os/ports/GCC/PPC/SPC560Pxx/core.s deleted file mode 100644 index 43d145ddd..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/core.s +++ /dev/null @@ -1,214 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Pxx/core.s
- * @brief e200z0 core configuration.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/**
- * @name BUCSR registers definitions
- * @{
- */
-#define BUCSR_BPEN 0x00000001
-#define BUCSR_BALLOC_BFI 0x00000200
-/** @} */
-
-/**
- * @name BUCSR default settings
- * @{
- */
-#define BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BALLOC_BFI)
-/** @} */
-
-/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_ME 0x00001000
-#define MSR_DE 0x00000200
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
- * @name MSR default settings
- * @{
- */
-#define MSR_DEFAULT (MSR_WE | MSR_CE | MSR_ME)
-/** @} */
-
-#if !defined(__DOXYGEN__)
-
- .section .coreinit, "ax"
-
- .align 2
- .globl _coreinit
- .type _coreinit, @function
-_coreinit:
- /*
- * RAM clearing, this device requires a write to all RAM location in
- * order to initialize the ECC detection hardware, this is going to
- * slow down the startup but there is no way around.
- */
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
-.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
-.cleareccend:
-
- /*
- * Branch prediction enabled.
- */
- li %r3, BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
-
- blr
-
- /*
- * Exception vectors initialization.
- */
- .global _ivinit
- .type _ivinit, @function
-_ivinit:
- /* MSR initialization.*/
- lis %r3, MSR_DEFAULT@h
- ori %r3, %r3, MSR_DEFAULT@l
- mtMSR %r3
-
- /* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- blr
-
- .section .ivors, "ax"
-
- .globl IVORS
-IVORS:
-IVOR0: b IVOR0
- .align 4
-IVOR1: b _IVOR1
- .align 4
-IVOR2: b _IVOR2
- .align 4
-IVOR3: b _IVOR3
- .align 4
-IVOR4: b _IVOR4
- .align 4
-IVOR5: b _IVOR5
- .align 4
-IVOR6: b _IVOR6
- .align 4
-IVOR7: b _IVOR7
- .align 4
-IVOR8: b _IVOR8
- .align 4
-IVOR9: b _IVOR9
- .align 4
-IVOR10: b _IVOR10
- .align 4
-IVOR11: b _IVOR11
- .align 4
-IVOR12: b _IVOR12
- .align 4
-IVOR13: b _IVOR13
- .align 4
-IVOR14: b _IVOR14
- .align 4
-IVOR15: b _IVOR15
-
- .section .handlers, "ax"
-
- /*
- * Unhandled exceptions handler.
- */
- .weak _IVOR0, _IVOR1, _IVOR2, _IVOR3, _IVOR4, _IVOR5
- .weak _IVOR6, _IVOR7, _IVOR8, _IVOR9, _IVOR10, _IVOR11
- .weak _IVOR12, _IVOR13, _IVOR14, _IVOR15
- .weak _unhandled_exception
-_IVOR0:
-_IVOR1:
-_IVOR2:
-_IVOR3:
-_IVOR5:
-_IVOR6:
-_IVOR7:
-_IVOR8:
-_IVOR9:
-_IVOR11:
-_IVOR12:
-_IVOR13:
-_IVOR14:
-_IVOR15:
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld b/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld deleted file mode 100644 index de3e0bc37..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC560P44 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 384k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 36k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 64KB because the IVPR register
- requires an alignment of 64KB and the first 64KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 64KB by using special sections.*/
- . = ALIGN(0x00010000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P50.ld b/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P50.ld deleted file mode 100644 index e02b092a5..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P50.ld +++ /dev/null @@ -1,182 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC560P44 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 512k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 40k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 64KB because the IVPR register
- requires an alignment of 64KB and the first 64KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 64KB by using special sections.*/
- . = ALIGN(0x00010000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC560Pxx/port.mk b/os/ports/GCC/PPC/SPC560Pxx/port.mk deleted file mode 100644 index 112728112..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/port.mk +++ /dev/null @@ -1,13 +0,0 @@ -# List of the ChibiOS/RT SPC560Pxx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/bam.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/core.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/vectors.s \
- ${CHIBIOS}/os/ports/GCC/PPC/ivor.s \
- ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC560Pxx/ld
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ppcparams.h b/os/ports/GCC/PPC/SPC560Pxx/ppcparams.h deleted file mode 100644 index febb90017..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/ppcparams.h +++ /dev/null @@ -1,72 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Pxx/ppcparams.h
- * @brief PowerPC parameters for the SPC560Pxx.
- *
- * @defgroup PPC_SPC560Pxx SPC560Pxx Specific Parameters
- * @ingroup PPC_SPECIFIC
- * @details This file contains the PowerPC specific parameters for the
- * SPC560Pxx platform.
- * @{
- */
-
-#ifndef _PPCPARAMS_H_
-#define _PPCPARAMS_H_
-
-/**
- * @brief PPC core model.
- */
-#define PPC_VARIANT PPC_VARIANT_e200z0
-
-/**
- * @brief Number of writable bits in IVPR register.
- */
-#define PPC_IVPR_BITS 16
-
-/**
- * @brief IVORx registers support.
- */
-#define PPC_SUPPORTS_IVORS FALSE
-
-/**
- * @brief Book E instruction set support.
- */
-#define PPC_SUPPORTS_BOOKE FALSE
-
-/**
- * @brief VLE instruction set support.
- */
-#define PPC_SUPPORTS_VLE TRUE
-
-/**
- * @brief Supports VLS Load/Store Multiple Volatile instructions.
- */
-#define PPC_SUPPORTS_VLE_MULTI TRUE
-
-/**
- * @brief Supports the decrementer timer.
- */
-#define PPC_SUPPORTS_DECREMENTER FALSE
-
-#endif /* _PPCPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/vectors.h b/os/ports/GCC/PPC/SPC560Pxx/vectors.h deleted file mode 100644 index fc2f6e47c..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/vectors.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Pxx/vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _VECTORS_H_
-#define _VECTORS_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @brief Number of ISR vectors available.
- */
-#define VECTORS_NUMBER 261
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[VECTORS_NUMBER];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _OSAL_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC560Pxx/vectors.s b/os/ports/GCC/PPC/SPC560Pxx/vectors.s deleted file mode 100644 index 8fcbb27d9..000000000 --- a/os/ports/GCC/PPC/SPC560Pxx/vectors.s +++ /dev/null @@ -1,445 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC560Pxx/vectors.s
- * @brief SPC560Pxx vectors table.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
- .long vector4, vector5, vector6, vector7
- .long vector8, vector9, vector10, vector11
- .long vector12, vector13, vector14, vector15
- .long vector16, vector17, vector18, vector19
- .long vector20, vector21, vector22, vector23
- .long vector24, vector25, vector26, vector27
- .long vector28, vector29, vector30, vector31
- .long vector32, vector33, vector34, vector35
- .long vector36, vector37, vector38, vector39
- .long vector40, vector41, vector42, vector43
- .long vector44, vector45, vector46, vector47
- .long vector48, vector49, vector50, vector51
- .long vector52, vector53, vector54, vector55
- .long vector56, vector57, vector58, vector59
- .long vector60, vector61, vector62, vector63
- .long vector64, vector65, vector66, vector67
- .long vector68, vector69, vector70, vector71
- .long vector72, vector73, vector74, vector75
- .long vector76, vector77, vector78, vector79
- .long vector80, vector81, vector82, vector83
- .long vector84, vector85, vector86, vector87
- .long vector88, vector89, vector90, vector91
- .long vector92, vector93, vector94, vector95
- .long vector96, vector97, vector98, vector99
- .long vector100, vector101, vector102, vector103
- .long vector104, vector105, vector106, vector107
- .long vector108, vector109, vector110, vector111
- .long vector112, vector113, vector114, vector115
- .long vector116, vector117, vector118, vector119
- .long vector120, vector121, vector122, vector123
- .long vector124, vector125, vector126, vector127
- .long vector128, vector129, vector130, vector131
- .long vector132, vector133, vector134, vector135
- .long vector136, vector137, vector138, vector139
- .long vector140, vector141, vector142, vector143
- .long vector144, vector145, vector146, vector147
- .long vector148, vector149, vector150, vector151
- .long vector152, vector153, vector154, vector155
- .long vector156, vector157, vector158, vector159
- .long vector160, vector161, vector162, vector163
- .long vector164, vector165, vector166, vector167
- .long vector168, vector169, vector170, vector171
- .long vector172, vector173, vector174, vector175
- .long vector176, vector177, vector178, vector179
- .long vector180, vector181, vector182, vector183
- .long vector184, vector185, vector186, vector187
- .long vector188, vector189, vector190, vector191
- .long vector192, vector193, vector194, vector195
- .long vector196, vector197, vector198, vector199
- .long vector200, vector201, vector202, vector203
- .long vector204, vector205, vector206, vector207
- .long vector208, vector209, vector210, vector211
- .long vector212, vector213, vector214, vector215
- .long vector216, vector217, vector218, vector219
- .long vector220, vector221, vector222, vector223
- .long vector224, vector225, vector226, vector227
- .long vector228, vector229, vector230, vector231
- .long vector232, vector233, vector234, vector235
- .long vector236, vector237, vector238, vector239
- .long vector240, vector241, vector242, vector243
- .long vector244, vector245, vector246, vector247
- .long vector248, vector249, vector250, vector251
- .long vector252, vector253, vector254, vector255
- .long vector256, vector257, vector258, vector259
- .long vector260
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
- .weak vector4, vector5, vector6, vector7
- .weak vector8, vector9, vector10, vector11
- .weak vector12, vector13, vector14, vector15
- .weak vector16, vector17, vector18, vector19
- .weak vector20, vector21, vector22, vector23
- .weak vector24, vector25, vector26, vector27
- .weak vector28, vector29, vector30, vector31
- .weak vector32, vector33, vector34, vector35
- .weak vector36, vector37, vector38, vector39
- .weak vector40, vector41, vector42, vector43
- .weak vector44, vector45, vector46, vector47
- .weak vector48, vector49, vector50, vector51
- .weak vector52, vector53, vector54, vector55
- .weak vector56, vector57, vector58, vector59
- .weak vector60, vector61, vector62, vector63
- .weak vector64, vector65, vector66, vector67
- .weak vector68, vector69, vector70, vector71
- .weak vector72, vector73, vector74, vector75
- .weak vector76, vector77, vector78, vector79
- .weak vector80, vector81, vector82, vector83
- .weak vector84, vector85, vector86, vector87
- .weak vector88, vector89, vector90, vector91
- .weak vector92, vector93, vector94, vector95
- .weak vector96, vector97, vector98, vector99
- .weak vector100, vector101, vector102, vector103
- .weak vector104, vector105, vector106, vector107
- .weak vector108, vector109, vector110, vector111
- .weak vector112, vector113, vector114, vector115
- .weak vector116, vector117, vector118, vector119
- .weak vector120, vector121, vector122, vector123
- .weak vector124, vector125, vector126, vector127
- .weak vector128, vector129, vector130, vector131
- .weak vector132, vector133, vector134, vector135
- .weak vector136, vector137, vector138, vector139
- .weak vector140, vector141, vector142, vector143
- .weak vector144, vector145, vector146, vector147
- .weak vector148, vector149, vector150, vector151
- .weak vector152, vector153, vector154, vector155
- .weak vector156, vector157, vector158, vector159
- .weak vector160, vector161, vector162, vector163
- .weak vector164, vector165, vector166, vector167
- .weak vector168, vector169, vector170, vector171
- .weak vector172, vector173, vector174, vector175
- .weak vector176, vector177, vector178, vector179
- .weak vector180, vector181, vector182, vector183
- .weak vector184, vector185, vector186, vector187
- .weak vector188, vector189, vector190, vector191
- .weak vector192, vector193, vector194, vector195
- .weak vector196, vector197, vector198, vector199
- .weak vector200, vector201, vector202, vector203
- .weak vector204, vector205, vector206, vector207
- .weak vector208, vector209, vector210, vector211
- .weak vector212, vector213, vector214, vector215
- .weak vector216, vector217, vector218, vector219
- .weak vector220, vector221, vector222, vector223
- .weak vector224, vector225, vector226, vector227
- .weak vector228, vector229, vector230, vector231
- .weak vector232, vector233, vector234, vector235
- .weak vector236, vector237, vector238, vector239
- .weak vector240, vector241, vector242, vector243
- .weak vector244, vector245, vector246, vector247
- .weak vector248, vector249, vector250, vector251
- .weak vector252, vector253, vector254, vector255
- .weak vector256, vector257, vector258, vector259
- .weak vector260
-
-vector0:
-vector1:
-vector2:
-vector3:
-vector4:
-vector5:
-vector6:
-vector7:
-vector8:
-vector9:
-vector10:
-vector11:
-vector12:
-vector13:
-vector14:
-vector15:
-vector16:
-vector17:
-vector18:
-vector19:
-vector20:
-vector21:
-vector22:
-vector23:
-vector24:
-vector25:
-vector26:
-vector27:
-vector28:
-vector29:
-vector30:
-vector31:
-vector32:
-vector33:
-vector34:
-vector35:
-vector36:
-vector37:
-vector38:
-vector39:
-vector40:
-vector41:
-vector42:
-vector43:
-vector44:
-vector45:
-vector46:
-vector47:
-vector48:
-vector49:
-vector50:
-vector51:
-vector52:
-vector53:
-vector54:
-vector55:
-vector56:
-vector57:
-vector58:
-vector59:
-vector60:
-vector61:
-vector62:
-vector63:
-vector64:
-vector65:
-vector66:
-vector67:
-vector68:
-vector69:
-vector70:
-vector71:
-vector72:
-vector73:
-vector74:
-vector75:
-vector76:
-vector77:
-vector78:
-vector79:
-vector80:
-vector81:
-vector82:
-vector83:
-vector84:
-vector85:
-vector86:
-vector87:
-vector88:
-vector89:
-vector90:
-vector91:
-vector92:
-vector93:
-vector94:
-vector95:
-vector96:
-vector97:
-vector98:
-vector99:
-vector100:
-vector101:
-vector102:
-vector103:
-vector104:
-vector105:
-vector106:
-vector107:
-vector108:
-vector109:
-vector110:
-vector111:
-vector112:
-vector113:
-vector114:
-vector115:
-vector116:
-vector117:
-vector118:
-vector119:
-vector120:
-vector121:
-vector122:
-vector123:
-vector124:
-vector125:
-vector126:
-vector127:
-vector128:
-vector129:
-vector130:
-vector131:
-vector132:
-vector133:
-vector134:
-vector135:
-vector136:
-vector137:
-vector138:
-vector139:
-vector140:
-vector141:
-vector142:
-vector143:
-vector144:
-vector145:
-vector146:
-vector147:
-vector148:
-vector149:
-vector150:
-vector151:
-vector152:
-vector153:
-vector154:
-vector155:
-vector156:
-vector157:
-vector158:
-vector159:
-vector160:
-vector161:
-vector162:
-vector163:
-vector164:
-vector165:
-vector166:
-vector167:
-vector168:
-vector169:
-vector170:
-vector171:
-vector172:
-vector173:
-vector174:
-vector175:
-vector176:
-vector177:
-vector178:
-vector179:
-vector180:
-vector181:
-vector182:
-vector183:
-vector184:
-vector185:
-vector186:
-vector187:
-vector188:
-vector189:
-vector190:
-vector191:
-vector192:
-vector193:
-vector194:
-vector195:
-vector196:
-vector197:
-vector198:
-vector199:
-vector200:
-vector201:
-vector202:
-vector203:
-vector204:
-vector205:
-vector206:
-vector207:
-vector208:
-vector209:
-vector210:
-vector211:
-vector212:
-vector213:
-vector214:
-vector215:
-vector216:
-vector217:
-vector218:
-vector219:
-vector220:
-vector221:
-vector222:
-vector223:
-vector224:
-vector225:
-vector226:
-vector227:
-vector228:
-vector229:
-vector230:
-vector231:
-vector232:
-vector233:
-vector234:
-vector235:
-vector236:
-vector237:
-vector238:
-vector239:
-vector240:
-vector241:
-vector242:
-vector243:
-vector244:
-vector245:
-vector246:
-vector247:
-vector248:
-vector249:
-vector250:
-vector251:
-vector252:
-vector253:
-vector254:
-vector255:
-vector256:
-vector257:
-vector258:
-vector259:
-vector260:
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC563Mxx/bam.s b/os/ports/GCC/PPC/SPC563Mxx/bam.s deleted file mode 100644 index 19ce1e014..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/bam.s +++ /dev/null @@ -1,51 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC563Mxx/bam.s
- * @brief SPC563Mxx boot assistant record.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* BAM record.*/
- .section .bam, "ax"
-#if PPC_USE_VLE
- .long 0x015A0000
-#else
- .long 0x005A0000
-#endif
- .long _reset_address
-
- .align 2
- .globl _reset_address
- .type _reset_address, @function
-_reset_address:
- bl _coreinit
- bl _ivinit
-
- b _boot_address
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC563Mxx/core.s b/os/ports/GCC/PPC/SPC563Mxx/core.s deleted file mode 100644 index a1b3ca37b..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/core.s +++ /dev/null @@ -1,191 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC563Mxx/core.s
- * @brief e200z3 core configuration.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/**
- * @name BUCSR registers definitions
- * @{
- */
-#define BUCSR_BPEN 0x00000001
-#define BUCSR_BALLOC_BFI 0x00000200
-/** @} */
-
-/**
- * @name BUCSR default settings
- * @{
- */
-#define BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BALLOC_BFI)
-/** @} */
-
-/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_UCLE 0x04000000
-#define MSR_SPE 0x02000000
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_FP 0x00002000
-#define MSR_ME 0x00001000
-#define MSR_FE0 0x00000800
-#define MSR_DE 0x00000200
-#define MSR_FE1 0x00000100
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
- * @name MSR default settings
- * @{
- */
-#define MSR_DEFAULT (MSR_SPE | MSR_WE | MSR_CE | MSR_ME)
-/** @} */
-
-#if !defined(__DOXYGEN__)
-
- .section .coreinit, "ax"
-
- .align 2
- .globl _coreinit
- .type _coreinit, @function
-_coreinit:
-
- /*
- * RAM clearing, this device requires a write to all RAM location in
- * order to initialize the ECC detection hardware, this is going to
- * slow down the startup but there is no way around.
- */
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
-.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
-.cleareccend:
-
- /*
- * Branch prediction enabled.
- */
- li %r3, BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
-
- blr
-
- /*
- * Exception vectors initialization.
- */
- .global _ivinit
- .type _ivinit, @function
-_ivinit:
- /* MSR initialization.*/
- lis %r3, MSR_DEFAULT@h
- ori %r3, %r3, MSR_DEFAULT@l
- mtMSR %r3
-
- /* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- /* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
-
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- blr
-
- .section .handlers, "ax"
-
- /*
- * Unhandled exceptions handler.
- */
- .weak _unhandled_exception
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld b/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld deleted file mode 100644 index 25fe1143b..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/ld/SPC563M64.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC563M64 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 1536k
- ram : org = 0x40000000, len = 94k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.crt0))
- KEEP(*(.handlers))
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC563Mxx/port.mk b/os/ports/GCC/PPC/SPC563Mxx/port.mk deleted file mode 100644 index 5f5a1b309..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/port.mk +++ /dev/null @@ -1,13 +0,0 @@ -# List of the ChibiOS/RT SPC563Mxx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/bam.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/core.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/vectors.s \
- ${CHIBIOS}/os/ports/GCC/PPC/ivor.s \
- ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC563Mxx/ld
diff --git a/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h b/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h deleted file mode 100644 index 94aa98ffd..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/ppcparams.h +++ /dev/null @@ -1,72 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC563Mxx/ppcparams.h
- * @brief PowerPC parameters for the SPC563Mxx.
- *
- * @defgroup PPC_SPC563Mxx SPC563Mxx Specific Parameters
- * @ingroup PPC_SPECIFIC
- * @details This file contains the PowerPC specific parameters for the
- * SPC563Mxx platform.
- * @{
- */
-
-#ifndef _PPCPARAMS_H_
-#define _PPCPARAMS_H_
-
-/**
- * @brief PPC core model.
- */
-#define PPC_VARIANT PPC_VARIANT_e200z3
-
-/**
- * @brief Number of writable bits in IVPR register.
- */
-#define PPC_IVPR_BITS 16
-
-/**
- * @brief IVORx registers support.
- */
-#define PPC_SUPPORTS_IVORS TRUE
-
-/**
- * @brief Book E instruction set support.
- */
-#define PPC_SUPPORTS_BOOKE TRUE
-
-/**
- * @brief VLE instruction set support.
- */
-#define PPC_SUPPORTS_VLE TRUE
-
-/**
- * @brief Supports VLS Load/Store Multiple Volatile instructions.
- */
-#define PPC_SUPPORTS_VLE_MULTI TRUE
-
-/**
- * @brief Supports the decrementer timer.
- */
-#define PPC_SUPPORTS_DECREMENTER TRUE
-
-#endif /* _PPCPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC563Mxx/vectors.h b/os/ports/GCC/PPC/SPC563Mxx/vectors.h deleted file mode 100644 index 9d6d744f6..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/vectors.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC563Mxx/vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _VECTORS_H_
-#define _VECTORS_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @brief Number of ISR vectors available.
- */
-#define VECTORS_NUMBER 360
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[VECTORS_NUMBER];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _OSAL_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC563Mxx/vectors.s b/os/ports/GCC/PPC/SPC563Mxx/vectors.s deleted file mode 100644 index dc4cbdfef..000000000 --- a/os/ports/GCC/PPC/SPC563Mxx/vectors.s +++ /dev/null @@ -1,592 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC563Mxx/vectors.s
- * @brief SPC563Mxx vectors table.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
- .long vector4, vector5, vector6, vector7
- .long vector8, vector9, vector10, vector11
- .long vector12, vector13, vector14, vector15
- .long vector16, vector17, vector18, vector19
- .long vector20, vector21, vector22, vector23
- .long vector24, vector25, vector26, vector27
- .long vector28, vector29, vector30, vector31
- .long vector32, vector33, vector34, vector35
- .long vector36, vector37, vector38, vector39
- .long vector40, vector41, vector42, vector43
- .long vector44, vector45, vector46, vector47
- .long vector48, vector49, vector50, vector51
- .long vector52, vector53, vector54, vector55
- .long vector56, vector57, vector58, vector59
- .long vector60, vector61, vector62, vector63
- .long vector64, vector65, vector66, vector67
- .long vector68, vector69, vector70, vector71
- .long vector72, vector73, vector74, vector75
- .long vector76, vector77, vector78, vector79
- .long vector80, vector81, vector82, vector83
- .long vector84, vector85, vector86, vector87
- .long vector88, vector89, vector90, vector91
- .long vector92, vector93, vector94, vector95
- .long vector96, vector97, vector98, vector99
- .long vector100, vector101, vector102, vector103
- .long vector104, vector105, vector106, vector107
- .long vector108, vector109, vector110, vector111
- .long vector112, vector113, vector114, vector115
- .long vector116, vector117, vector118, vector119
- .long vector120, vector121, vector122, vector123
- .long vector124, vector125, vector126, vector127
- .long vector128, vector129, vector130, vector131
- .long vector132, vector133, vector134, vector135
- .long vector136, vector137, vector138, vector139
- .long vector140, vector141, vector142, vector143
- .long vector144, vector145, vector146, vector147
- .long vector148, vector149, vector150, vector151
- .long vector152, vector153, vector154, vector155
- .long vector156, vector157, vector158, vector159
- .long vector160, vector161, vector162, vector163
- .long vector164, vector165, vector166, vector167
- .long vector168, vector169, vector170, vector171
- .long vector172, vector173, vector174, vector175
- .long vector176, vector177, vector178, vector179
- .long vector180, vector181, vector182, vector183
- .long vector184, vector185, vector186, vector187
- .long vector188, vector189, vector190, vector191
- .long vector192, vector193, vector194, vector195
- .long vector196, vector197, vector198, vector199
- .long vector200, vector201, vector202, vector203
- .long vector204, vector205, vector206, vector207
- .long vector208, vector209, vector210, vector211
- .long vector212, vector213, vector214, vector215
- .long vector216, vector217, vector218, vector219
- .long vector220, vector221, vector222, vector223
- .long vector224, vector225, vector226, vector227
- .long vector228, vector229, vector230, vector231
- .long vector232, vector233, vector234, vector235
- .long vector236, vector237, vector238, vector239
- .long vector240, vector241, vector242, vector243
- .long vector244, vector245, vector246, vector247
- .long vector248, vector249, vector250, vector251
- .long vector252, vector253, vector254, vector255
- .long vector256, vector257, vector258, vector259
- .long vector260, vector261, vector262, vector263
- .long vector264, vector265, vector266, vector267
- .long vector268, vector269, vector270, vector271
- .long vector272, vector273, vector274, vector275
- .long vector276, vector277, vector278, vector279
- .long vector280, vector281, vector282, vector283
- .long vector284, vector285, vector286, vector287
- .long vector288, vector289, vector290, vector291
- .long vector292, vector293, vector294, vector295
- .long vector296, vector297, vector298, vector299
- .long vector300, vector301, vector302, vector303
- .long vector304, vector305, vector306, vector307
- .long vector308, vector309, vector310, vector311
- .long vector312, vector313, vector314, vector315
- .long vector316, vector317, vector318, vector319
- .long vector320, vector321, vector322, vector323
- .long vector324, vector325, vector326, vector327
- .long vector328, vector329, vector330, vector331
- .long vector332, vector333, vector334, vector335
- .long vector336, vector337, vector338, vector339
- .long vector340, vector341, vector342, vector343
- .long vector344, vector345, vector346, vector347
- .long vector348, vector349, vector350, vector351
- .long vector352, vector353, vector354, vector355
- .long vector356, vector357, vector358, vector359
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
- .weak vector4, vector5, vector6, vector7
- .weak vector8, vector9, vector10, vector11
- .weak vector12, vector13, vector14, vector15
- .weak vector16, vector17, vector18, vector19
- .weak vector20, vector21, vector22, vector23
- .weak vector24, vector25, vector26, vector27
- .weak vector28, vector29, vector30, vector31
- .weak vector32, vector33, vector34, vector35
- .weak vector36, vector37, vector38, vector39
- .weak vector40, vector41, vector42, vector43
- .weak vector44, vector45, vector46, vector47
- .weak vector48, vector49, vector50, vector51
- .weak vector52, vector53, vector54, vector55
- .weak vector56, vector57, vector58, vector59
- .weak vector60, vector61, vector62, vector63
- .weak vector64, vector65, vector66, vector67
- .weak vector68, vector69, vector70, vector71
- .weak vector72, vector73, vector74, vector75
- .weak vector76, vector77, vector78, vector79
- .weak vector80, vector81, vector82, vector83
- .weak vector84, vector85, vector86, vector87
- .weak vector88, vector89, vector90, vector91
- .weak vector92, vector93, vector94, vector95
- .weak vector96, vector97, vector98, vector99
- .weak vector100, vector101, vector102, vector103
- .weak vector104, vector105, vector106, vector107
- .weak vector108, vector109, vector110, vector111
- .weak vector112, vector113, vector114, vector115
- .weak vector116, vector117, vector118, vector119
- .weak vector120, vector121, vector122, vector123
- .weak vector124, vector125, vector126, vector127
- .weak vector128, vector129, vector130, vector131
- .weak vector132, vector133, vector134, vector135
- .weak vector136, vector137, vector138, vector139
- .weak vector140, vector141, vector142, vector143
- .weak vector144, vector145, vector146, vector147
- .weak vector148, vector149, vector150, vector151
- .weak vector152, vector153, vector154, vector155
- .weak vector156, vector157, vector158, vector159
- .weak vector160, vector161, vector162, vector163
- .weak vector164, vector165, vector166, vector167
- .weak vector168, vector169, vector170, vector171
- .weak vector172, vector173, vector174, vector175
- .weak vector176, vector177, vector178, vector179
- .weak vector180, vector181, vector182, vector183
- .weak vector184, vector185, vector186, vector187
- .weak vector188, vector189, vector190, vector191
- .weak vector192, vector193, vector194, vector195
- .weak vector196, vector197, vector198, vector199
- .weak vector200, vector201, vector202, vector203
- .weak vector204, vector205, vector206, vector207
- .weak vector208, vector209, vector210, vector211
- .weak vector212, vector213, vector214, vector215
- .weak vector216, vector217, vector218, vector219
- .weak vector220, vector221, vector222, vector223
- .weak vector224, vector225, vector226, vector227
- .weak vector228, vector229, vector230, vector231
- .weak vector232, vector233, vector234, vector235
- .weak vector236, vector237, vector238, vector239
- .weak vector240, vector241, vector242, vector243
- .weak vector244, vector245, vector246, vector247
- .weak vector248, vector249, vector250, vector251
- .weak vector252, vector253, vector254, vector255
- .weak vector256, vector257, vector258, vector259
- .weak vector260, vector261, vector262, vector263
- .weak vector264, vector265, vector266, vector267
- .weak vector268, vector269, vector270, vector271
- .weak vector272, vector273, vector274, vector275
- .weak vector276, vector277, vector278, vector279
- .weak vector280, vector281, vector282, vector283
- .weak vector284, vector285, vector286, vector287
- .weak vector288, vector289, vector290, vector291
- .weak vector292, vector293, vector294, vector295
- .weak vector296, vector297, vector298, vector299
- .weak vector300, vector301, vector302, vector303
- .weak vector304, vector305, vector306, vector307
- .weak vector308, vector309, vector310, vector311
- .weak vector312, vector313, vector314, vector315
- .weak vector316, vector317, vector318, vector319
- .weak vector320, vector321, vector322, vector323
- .weak vector324, vector325, vector326, vector327
- .weak vector328, vector329, vector330, vector331
- .weak vector332, vector333, vector334, vector335
- .weak vector336, vector337, vector338, vector339
- .weak vector340, vector341, vector342, vector343
- .weak vector344, vector345, vector346, vector347
- .weak vector348, vector349, vector350, vector351
- .weak vector352, vector353, vector354, vector355
- .weak vector356, vector357, vector358, vector359
-
-vector0:
-vector1:
-vector2:
-vector3:
-vector4:
-vector5:
-vector6:
-vector7:
-vector8:
-vector9:
-vector10:
-vector11:
-vector12:
-vector13:
-vector14:
-vector15:
-vector16:
-vector17:
-vector18:
-vector19:
-vector20:
-vector21:
-vector22:
-vector23:
-vector24:
-vector25:
-vector26:
-vector27:
-vector28:
-vector29:
-vector30:
-vector31:
-vector32:
-vector33:
-vector34:
-vector35:
-vector36:
-vector37:
-vector38:
-vector39:
-vector40:
-vector41:
-vector42:
-vector43:
-vector44:
-vector45:
-vector46:
-vector47:
-vector48:
-vector49:
-vector50:
-vector51:
-vector52:
-vector53:
-vector54:
-vector55:
-vector56:
-vector57:
-vector58:
-vector59:
-vector60:
-vector61:
-vector62:
-vector63:
-vector64:
-vector65:
-vector66:
-vector67:
-vector68:
-vector69:
-vector70:
-vector71:
-vector72:
-vector73:
-vector74:
-vector75:
-vector76:
-vector77:
-vector78:
-vector79:
-vector80:
-vector81:
-vector82:
-vector83:
-vector84:
-vector85:
-vector86:
-vector87:
-vector88:
-vector89:
-vector90:
-vector91:
-vector92:
-vector93:
-vector94:
-vector95:
-vector96:
-vector97:
-vector98:
-vector99:
-vector100:
-vector101:
-vector102:
-vector103:
-vector104:
-vector105:
-vector106:
-vector107:
-vector108:
-vector109:
-vector110:
-vector111:
-vector112:
-vector113:
-vector114:
-vector115:
-vector116:
-vector117:
-vector118:
-vector119:
-vector120:
-vector121:
-vector122:
-vector123:
-vector124:
-vector125:
-vector126:
-vector127:
-vector128:
-vector129:
-vector130:
-vector131:
-vector132:
-vector133:
-vector134:
-vector135:
-vector136:
-vector137:
-vector138:
-vector139:
-vector140:
-vector141:
-vector142:
-vector143:
-vector144:
-vector145:
-vector146:
-vector147:
-vector148:
-vector149:
-vector150:
-vector151:
-vector152:
-vector153:
-vector154:
-vector155:
-vector156:
-vector157:
-vector158:
-vector159:
-vector160:
-vector161:
-vector162:
-vector163:
-vector164:
-vector165:
-vector166:
-vector167:
-vector168:
-vector169:
-vector170:
-vector171:
-vector172:
-vector173:
-vector174:
-vector175:
-vector176:
-vector177:
-vector178:
-vector179:
-vector180:
-vector181:
-vector182:
-vector183:
-vector184:
-vector185:
-vector186:
-vector187:
-vector188:
-vector189:
-vector190:
-vector191:
-vector192:
-vector193:
-vector194:
-vector195:
-vector196:
-vector197:
-vector198:
-vector199:
-vector200:
-vector201:
-vector202:
-vector203:
-vector204:
-vector205:
-vector206:
-vector207:
-vector208:
-vector209:
-vector210:
-vector211:
-vector212:
-vector213:
-vector214:
-vector215:
-vector216:
-vector217:
-vector218:
-vector219:
-vector220:
-vector221:
-vector222:
-vector223:
-vector224:
-vector225:
-vector226:
-vector227:
-vector228:
-vector229:
-vector230:
-vector231:
-vector232:
-vector233:
-vector234:
-vector235:
-vector236:
-vector237:
-vector238:
-vector239:
-vector240:
-vector241:
-vector242:
-vector243:
-vector244:
-vector245:
-vector246:
-vector247:
-vector248:
-vector249:
-vector250:
-vector251:
-vector252:
-vector253:
-vector254:
-vector255:
-vector256:
-vector257:
-vector258:
-vector259:
-vector260:
-vector261:
-vector262:
-vector263:
-vector264:
-vector265:
-vector266:
-vector267:
-vector268:
-vector269:
-vector270:
-vector271:
-vector272:
-vector273:
-vector274:
-vector275:
-vector276:
-vector277:
-vector278:
-vector279:
-vector280:
-vector281:
-vector282:
-vector283:
-vector284:
-vector285:
-vector286:
-vector287:
-vector288:
-vector289:
-vector290:
-vector291:
-vector292:
-vector293:
-vector294:
-vector295:
-vector296:
-vector297:
-vector298:
-vector299:
-vector300:
-vector301:
-vector302:
-vector303:
-vector304:
-vector305:
-vector306:
-vector307:
-vector308:
-vector309:
-vector310:
-vector311:
-vector312:
-vector313:
-vector314:
-vector315:
-vector316:
-vector317:
-vector318:
-vector319:
-vector320:
-vector321:
-vector322:
-vector323:
-vector324:
-vector325:
-vector326:
-vector327:
-vector328:
-vector329:
-vector330:
-vector331:
-vector332:
-vector333:
-vector334:
-vector335:
-vector336:
-vector337:
-vector338:
-vector339:
-vector340:
-vector341:
-vector342:
-vector343:
-vector344:
-vector345:
-vector346:
-vector347:
-vector348:
-vector349:
-vector350:
-vector351:
-vector352:
-vector353:
-vector354:
-vector355:
-vector356:
-vector357:
-vector358:
-vector359:
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC564Axx/bam.s b/os/ports/GCC/PPC/SPC564Axx/bam.s deleted file mode 100644 index 316724abf..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/bam.s +++ /dev/null @@ -1,51 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC564Axx/bam.s
- * @brief SPC564Axx boot assistant record.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* BAM record.*/
- .section .bam, "ax"
-#if PPC_USE_VLE
- .long 0x015A0000
-#else
- .long 0x005A0000
-#endif
- .long _reset_address
-
- .align 2
- .globl _reset_address
- .type _reset_address, @function
-_reset_address:
- bl _coreinit
- bl _ivinit
-
- b _boot_address
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC564Axx/core.s b/os/ports/GCC/PPC/SPC564Axx/core.s deleted file mode 100644 index bd6ad0fed..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/core.s +++ /dev/null @@ -1,479 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC564Axx/core.s
- * @brief e200z4 core configuration.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/**
- * @name MASx registers definitions
- * @{
- */
-#define MAS0_TBLMAS_TBL 0x10000000
-#define MAS0_ESEL_MASK 0x000F0000
-#define MAS0_ESEL(n) ((n) << 16)
-
-#define MAS1_VALID 0x80000000
-#define MAS1_IPROT 0x40000000
-#define MAS1_TID_MASK 0x00FF0000
-#define MAS1_TS 0x00001000
-#define MAS1_TSISE_MASK 0x00000F80
-#define MAS1_TSISE_1K 0x00000000
-#define MAS1_TSISE_2K 0x00000080
-#define MAS1_TSISE_4K 0x00000100
-#define MAS1_TSISE_8K 0x00000180
-#define MAS1_TSISE_16K 0x00000200
-#define MAS1_TSISE_32K 0x00000280
-#define MAS1_TSISE_64K 0x00000300
-#define MAS1_TSISE_128K 0x00000380
-#define MAS1_TSISE_256K 0x00000400
-#define MAS1_TSISE_512K 0x00000480
-#define MAS1_TSISE_1M 0x00000500
-#define MAS1_TSISE_2M 0x00000580
-#define MAS1_TSISE_4M 0x00000600
-#define MAS1_TSISE_8M 0x00000680
-#define MAS1_TSISE_16M 0x00000700
-#define MAS1_TSISE_32M 0x00000780
-#define MAS1_TSISE_64M 0x00000800
-#define MAS1_TSISE_128M 0x00000880
-#define MAS1_TSISE_256M 0x00000900
-#define MAS1_TSISE_512M 0x00000980
-#define MAS1_TSISE_1G 0x00000A00
-#define MAS1_TSISE_2G 0x00000A80
-#define MAS1_TSISE_4G 0x00000B00
-
-#define MAS2_EPN_MASK 0xFFFFFC00
-#define MAS2_EPN(n) ((n) & MAS2_EPN_MASK)
-#define MAS2_EBOOK 0x00000000
-#define MAS2_VLE 0x00000020
-#define MAS2_W 0x00000010
-#define MAS2_I 0x00000008
-#define MAS2_M 0x00000004
-#define MAS2_G 0x00000002
-#define MAS2_E 0x00000001
-
-#define MAS3_RPN_MASK 0xFFFFFC00
-#define MAS3_RPN(n) ((n) & MAS3_RPN_MASK)
-#define MAS3_U0 0x00000200
-#define MAS3_U1 0x00000100
-#define MAS3_U2 0x00000080
-#define MAS3_U3 0x00000040
-#define MAS3_UX 0x00000020
-#define MAS3_SX 0x00000010
-#define MAS3_UW 0x00000008
-#define MAS3_SW 0x00000004
-#define MAS3_UR 0x00000002
-#define MAS3_SR 0x00000001
-/** @} */
-
-/**
- * @name BUCSR registers definitions
- * @{
- */
-#define BUCSR_BPEN 0x00000001
-#define BUCSR_BPRED_MASK 0x00000006
-#define BUCSR_BPRED_0 0x00000000
-#define BUCSR_BPRED_1 0x00000002
-#define BUCSR_BPRED_2 0x00000004
-#define BUCSR_BPRED_3 0x00000006
-#define BUCSR_BALLOC_MASK 0x00000030
-#define BUCSR_BALLOC_0 0x00000000
-#define BUCSR_BALLOC_1 0x00000010
-#define BUCSR_BALLOC_2 0x00000020
-#define BUCSR_BALLOC_3 0x00000030
-#define BUCSR_BALLOC_BFI 0x00000200
-/** @} */
-
-/**
- * @name TLB default settings
- * @{
- */
-#define TLB0_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(0))
-#define TLB0_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_256K)
-#define TLB0_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE)
-#define TLB0_MAS3 (MAS3_RPN(0x40000000) | \
- MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
- MAS3_UR | MAS3_SR)
-
-#define TLB1_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(1))
-#define TLB1_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_4M)
-#define TLB1_MAS2 (MAS2_EPN(0x00000000) | MAS2_VLE)
-#define TLB1_MAS3 (MAS3_RPN(0x00000000) | \
- MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
- MAS3_UR | MAS3_SR)
-
-#define TLB2_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(2))
-#define TLB2_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB2_MAS2 (MAS2_EPN(0xC3F00000) | MAS2_I)
-#define TLB2_MAS3 (MAS3_RPN(0xC3F00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-
-#define TLB3_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(3))
-#define TLB3_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB3_MAS2 (MAS2_EPN(0xFFE00000) | MAS2_I)
-#define TLB3_MAS3 (MAS3_RPN(0xFFE00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-
-#define TLB4_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(4))
-#define TLB4_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB4_MAS2 (MAS2_EPN(0xFFF00000) | MAS2_I)
-#define TLB4_MAS3 (MAS3_RPN(0xFFF00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-/** @} */
-
-/**
- * @name LICSR1 registers definitions
- * @{
- */
-#define LICSR1_ICE 0x00000001
-#define LICSR1_ICINV 0x00000002
-#define LICSR1_ICORG 0x00000010
-/** @} */
-
-/**
- * @name BUCSR default settings
- * @{
- */
-#define BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BPRED_0 | \
- BUCSR_BALLOC_0 | BUCSR_BALLOC_BFI)
-/** @} */
-
-/**
- * @name LICSR1 default settings
- * @{
- */
-#define LICSR1_DEFAULT (LICSR1_ICE | LICSR1_ICORG)
-/** @} */
-
-/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_UCLE 0x04000000
-#define MSR_SPE 0x02000000
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_FP 0x00002000
-#define MSR_ME 0x00001000
-#define MSR_FE0 0x00000800
-#define MSR_DE 0x00000200
-#define MSR_FE1 0x00000100
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
- * @name MSR default settings
- * @{
- */
-#define MSR_DEFAULT (MSR_SPE | MSR_WE | MSR_CE | MSR_ME)
-/** @} */
-
-#if !defined(__DOXYGEN__)
-
- .section .coreinit, "ax"
-
- .align 2
-_ramcode:
- tlbwe
- isync
- blr
-
- .align 2
- .globl _coreinit
- .type _coreinit, @function
-_coreinit:
- /*
- * Invalidating all TLBs except TLB1.
- */
- lis %r3, 0
- mtspr 625, %r3 /* MAS1 */
- mtspr 626, %r3 /* MAS2 */
- mtspr 627, %r3 /* MAS3 */
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(0))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
-
- /*
- * TLB0 allocated to internal RAM.
- */
- lis %r3, TLB0_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB0_MAS1@h
- ori %r3, %r3, TLB0_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB0_MAS2@h
- ori %r3, %r3, TLB0_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB0_MAS3@h
- ori %r3, %r3, TLB0_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB2 allocated to internal Peripherals Bridge A.
- */
- lis %r3, TLB2_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB2_MAS1@h
- ori %r3, %r3, TLB2_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB2_MAS2@h
- ori %r3, %r3, TLB2_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB2_MAS3@h
- ori %r3, %r3, TLB2_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB3 allocated to internal Peripherals Bridge B.
- */
- lis %r3, TLB3_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB3_MAS1@h
- ori %r3, %r3, TLB3_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB3_MAS2@h
- ori %r3, %r3, TLB3_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB3_MAS3@h
- ori %r3, %r3, TLB3_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB4 allocated to on-platform peripherals.
- */
- lis %r3, TLB4_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB4_MAS1@h
- ori %r3, %r3, TLB4_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB4_MAS2@h
- ori %r3, %r3, TLB4_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB4_MAS3@h
- ori %r3, %r3, TLB4_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * RAM clearing, this device requires a write to all RAM location in
- * order to initialize the ECC detection hardware, this is going to
- * slow down the startup but there is no way around.
- */
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
-.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
-.cleareccend:
-
- /*
- * *Finally* the TLB1 is re-allocated to flash, note, the final phase
- * is executed from RAM.
- */
- lis %r3, TLB1_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB1_MAS1@h
- ori %r3, %r3, TLB1_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB1_MAS2@h
- ori %r3, %r3, TLB1_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB1_MAS3@h
- ori %r3, %r3, TLB1_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- mflr %r4
- lis %r6, _ramcode@h
- ori %r6, %r6, _ramcode@l
- lis %r7, 0x40010000@h
- mtctr %r7
- lwz %r3, 0(%r6)
- stw %r3, 0(%r7)
- lwz %r3, 4(%r6)
- stw %r3, 4(%r7)
- lwz %r3, 8(%r6)
- stw %r3, 8(%r7)
- bctrl
- mtlr %r4
-
- /*
- * Branch prediction enabled.
- */
- li %r3, BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
-
- /*
- * Cache invalidated and then enabled.
- */
- li %r3, LICSR1_ICINV
- mtspr 1011, %r3 /* LICSR1 */
-.inv: mfspr %r3, 1011 /* LICSR1 */
- andi. %r3, %r3, LICSR1_ICINV
- bne .inv
- lis %r3, LICSR1_DEFAULT@h
- ori %r3, %r3, LICSR1_DEFAULT@l
- mtspr 1011, %r3 /* LICSR1 */
-
- blr
-
- /*
- * Exception vectors initialization.
- */
- .global _ivinit
- .type _ivinit, @function
-_ivinit:
- /* MSR initialization.*/
- lis %r3, MSR_DEFAULT@h
- ori %r3, %r3, MSR_DEFAULT@l
- mtMSR %r3
-
- /* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- /* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
-
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- blr
-
- .section .handlers, "ax"
-
- /*
- * Unhandled exceptions handler.
- */
- .weak _unhandled_exception
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC564Axx/ld/SPC564A70.ld b/os/ports/GCC/PPC/SPC564Axx/ld/SPC564A70.ld deleted file mode 100644 index adcb41763..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/ld/SPC564A70.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC564A70 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 2M
- ram : org = 0x40000000, len = 128k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.crt0))
- KEEP(*(.handlers))
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC564Axx/ld/SPC564A80.ld b/os/ports/GCC/PPC/SPC564Axx/ld/SPC564A80.ld deleted file mode 100644 index ab503114e..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/ld/SPC564A80.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC564A80 memory setup.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 4M
- ram : org = 0x40000000, len = 192k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.crt0))
- KEEP(*(.handlers))
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC564Axx/port.mk b/os/ports/GCC/PPC/SPC564Axx/port.mk deleted file mode 100644 index 81422d7c6..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/port.mk +++ /dev/null @@ -1,13 +0,0 @@ -# List of the ChibiOS/RT SPC564Axx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC564Axx/bam.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC564Axx/core.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC564Axx/vectors.s \
- ${CHIBIOS}/os/ports/GCC/PPC/ivor.s \
- ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC564Axx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC564Axx/ld
diff --git a/os/ports/GCC/PPC/SPC564Axx/ppcparams.h b/os/ports/GCC/PPC/SPC564Axx/ppcparams.h deleted file mode 100644 index 4525b168c..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/ppcparams.h +++ /dev/null @@ -1,67 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC564Axx/ppcparams.h
- * @brief PowerPC parameters for the SPC564Axx.
- *
- * @defgroup PPC_SPC564Axx SPC564Axx Specific Parameters
- * @ingroup PPC_SPECIFIC
- * @details This file contains the PowerPC specific parameters for the
- * SPC564Axx platform.
- * @{
- */
-
-#ifndef _PPCPARAMS_H_
-#define _PPCPARAMS_H_
-
-/**
- * @brief PPC core model.
- */
-#define PPC_VARIANT PPC_VARIANT_e200z4
-
-/**
- * @brief IVORx registers support.
- */
-#define PPC_SUPPORTS_IVORS TRUE
-
-/**
- * @brief Book E instruction set support.
- */
-#define PPC_SUPPORTS_BOOKE TRUE
-
-/**
- * @brief VLE instruction set support.
- */
-#define PPC_SUPPORTS_VLE TRUE
-
-/**
- * @brief Supports VLS Load/Store Multiple Volatile instructions.
- */
-#define PPC_SUPPORTS_VLE_MULTI TRUE
-
-/**
- * @brief Supports the decrementer timer.
- */
-#define PPC_SUPPORTS_DECREMENTER TRUE
-
-#endif /* _PPCPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC564Axx/vectors.h b/os/ports/GCC/PPC/SPC564Axx/vectors.h deleted file mode 100644 index 2e8ab38a1..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/vectors.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC564Axx/vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _VECTORS_H_
-#define _VECTORS_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @brief Number of ISR vectors available.
- */
-#define VECTORS_NUMBER 486
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[VECTORS_NUMBER];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _OSAL_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC564Axx/vectors.s b/os/ports/GCC/PPC/SPC564Axx/vectors.s deleted file mode 100644 index 7ac668d35..000000000 --- a/os/ports/GCC/PPC/SPC564Axx/vectors.s +++ /dev/null @@ -1,782 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC564Axx/vectors.s
- * @brief SPC564Axx vectors table.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
- .long vector4, vector5, vector6, vector7
- .long vector8, vector9, vector10, vector11
- .long vector12, vector13, vector14, vector15
- .long vector16, vector17, vector18, vector19
- .long vector20, vector21, vector22, vector23
- .long vector24, vector25, vector26, vector27
- .long vector28, vector29, vector30, vector31
- .long vector32, vector33, vector34, vector35
- .long vector36, vector37, vector38, vector39
- .long vector40, vector41, vector42, vector43
- .long vector44, vector45, vector46, vector47
- .long vector48, vector49, vector50, vector51
- .long vector52, vector53, vector54, vector55
- .long vector56, vector57, vector58, vector59
- .long vector60, vector61, vector62, vector63
- .long vector64, vector65, vector66, vector67
- .long vector68, vector69, vector70, vector71
- .long vector72, vector73, vector74, vector75
- .long vector76, vector77, vector78, vector79
- .long vector80, vector81, vector82, vector83
- .long vector84, vector85, vector86, vector87
- .long vector88, vector89, vector90, vector91
- .long vector92, vector93, vector94, vector95
- .long vector96, vector97, vector98, vector99
- .long vector100, vector101, vector102, vector103
- .long vector104, vector105, vector106, vector107
- .long vector108, vector109, vector110, vector111
- .long vector112, vector113, vector114, vector115
- .long vector116, vector117, vector118, vector119
- .long vector120, vector121, vector122, vector123
- .long vector124, vector125, vector126, vector127
- .long vector128, vector129, vector130, vector131
- .long vector132, vector133, vector134, vector135
- .long vector136, vector137, vector138, vector139
- .long vector140, vector141, vector142, vector143
- .long vector144, vector145, vector146, vector147
- .long vector148, vector149, vector150, vector151
- .long vector152, vector153, vector154, vector155
- .long vector156, vector157, vector158, vector159
- .long vector160, vector161, vector162, vector163
- .long vector164, vector165, vector166, vector167
- .long vector168, vector169, vector170, vector171
- .long vector172, vector173, vector174, vector175
- .long vector176, vector177, vector178, vector179
- .long vector180, vector181, vector182, vector183
- .long vector184, vector185, vector186, vector187
- .long vector188, vector189, vector190, vector191
- .long vector192, vector193, vector194, vector195
- .long vector196, vector197, vector198, vector199
- .long vector200, vector201, vector202, vector203
- .long vector204, vector205, vector206, vector207
- .long vector208, vector209, vector210, vector211
- .long vector212, vector213, vector214, vector215
- .long vector216, vector217, vector218, vector219
- .long vector220, vector221, vector222, vector223
- .long vector224, vector225, vector226, vector227
- .long vector228, vector229, vector230, vector231
- .long vector232, vector233, vector234, vector235
- .long vector236, vector237, vector238, vector239
- .long vector240, vector241, vector242, vector243
- .long vector244, vector245, vector246, vector247
- .long vector248, vector249, vector250, vector251
- .long vector252, vector253, vector254, vector255
- .long vector256, vector257, vector258, vector259
- .long vector260, vector261, vector262, vector263
- .long vector264, vector265, vector266, vector267
- .long vector268, vector269, vector270, vector271
- .long vector272, vector273, vector274, vector275
- .long vector276, vector277, vector278, vector279
- .long vector280, vector281, vector282, vector283
- .long vector284, vector285, vector286, vector287
- .long vector288, vector289, vector290, vector291
- .long vector292, vector293, vector294, vector295
- .long vector296, vector297, vector298, vector299
- .long vector300, vector301, vector302, vector303
- .long vector304, vector305, vector306, vector307
- .long vector308, vector309, vector310, vector311
- .long vector312, vector313, vector314, vector315
- .long vector316, vector317, vector318, vector319
- .long vector320, vector321, vector322, vector323
- .long vector324, vector325, vector326, vector327
- .long vector328, vector329, vector330, vector331
- .long vector332, vector333, vector334, vector335
- .long vector336, vector337, vector338, vector339
- .long vector340, vector341, vector342, vector343
- .long vector344, vector345, vector346, vector347
- .long vector348, vector349, vector350, vector351
- .long vector352, vector353, vector354, vector355
- .long vector356, vector357, vector358, vector359
- .long vector360, vector361, vector362, vector363
- .long vector364, vector365, vector366, vector367
- .long vector368, vector369, vector370, vector371
- .long vector372, vector373, vector374, vector375
- .long vector376, vector377, vector378, vector379
- .long vector380, vector381, vector382, vector383
- .long vector384, vector385, vector386, vector387
- .long vector388, vector389, vector390, vector391
- .long vector392, vector393, vector394, vector395
- .long vector396, vector397, vector398, vector399
- .long vector400, vector401, vector402, vector403
- .long vector404, vector405, vector406, vector407
- .long vector408, vector409, vector410, vector411
- .long vector412, vector413, vector414, vector415
- .long vector416, vector417, vector418, vector419
- .long vector420, vector421, vector422, vector423
- .long vector424, vector425, vector426, vector427
- .long vector428, vector429, vector430, vector431
- .long vector432, vector433, vector434, vector435
- .long vector436, vector437, vector438, vector439
- .long vector440, vector441, vector442, vector443
- .long vector444, vector445, vector446, vector447
- .long vector448, vector449, vector450, vector451
- .long vector452, vector453, vector454, vector455
- .long vector456, vector457, vector458, vector459
- .long vector460, vector461, vector462, vector463
- .long vector464, vector465, vector466, vector467
- .long vector468, vector469, vector470, vector471
- .long vector472, vector473, vector474, vector475
- .long vector476, vector477, vector478, vector479
- .long vector480, vector481, vector482, vector483
- .long vector484, vector485
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
- .weak vector4, vector5, vector6, vector7
- .weak vector8, vector9, vector10, vector11
- .weak vector12, vector13, vector14, vector15
- .weak vector16, vector17, vector18, vector19
- .weak vector20, vector21, vector22, vector23
- .weak vector24, vector25, vector26, vector27
- .weak vector28, vector29, vector30, vector31
- .weak vector32, vector33, vector34, vector35
- .weak vector36, vector37, vector38, vector39
- .weak vector40, vector41, vector42, vector43
- .weak vector44, vector45, vector46, vector47
- .weak vector48, vector49, vector50, vector51
- .weak vector52, vector53, vector54, vector55
- .weak vector56, vector57, vector58, vector59
- .weak vector60, vector61, vector62, vector63
- .weak vector64, vector65, vector66, vector67
- .weak vector68, vector69, vector70, vector71
- .weak vector72, vector73, vector74, vector75
- .weak vector76, vector77, vector78, vector79
- .weak vector80, vector81, vector82, vector83
- .weak vector84, vector85, vector86, vector87
- .weak vector88, vector89, vector90, vector91
- .weak vector92, vector93, vector94, vector95
- .weak vector96, vector97, vector98, vector99
- .weak vector100, vector101, vector102, vector103
- .weak vector104, vector105, vector106, vector107
- .weak vector108, vector109, vector110, vector111
- .weak vector112, vector113, vector114, vector115
- .weak vector116, vector117, vector118, vector119
- .weak vector120, vector121, vector122, vector123
- .weak vector124, vector125, vector126, vector127
- .weak vector128, vector129, vector130, vector131
- .weak vector132, vector133, vector134, vector135
- .weak vector136, vector137, vector138, vector139
- .weak vector140, vector141, vector142, vector143
- .weak vector144, vector145, vector146, vector147
- .weak vector148, vector149, vector150, vector151
- .weak vector152, vector153, vector154, vector155
- .weak vector156, vector157, vector158, vector159
- .weak vector160, vector161, vector162, vector163
- .weak vector164, vector165, vector166, vector167
- .weak vector168, vector169, vector170, vector171
- .weak vector172, vector173, vector174, vector175
- .weak vector176, vector177, vector178, vector179
- .weak vector180, vector181, vector182, vector183
- .weak vector184, vector185, vector186, vector187
- .weak vector188, vector189, vector190, vector191
- .weak vector192, vector193, vector194, vector195
- .weak vector196, vector197, vector198, vector199
- .weak vector200, vector201, vector202, vector203
- .weak vector204, vector205, vector206, vector207
- .weak vector208, vector209, vector210, vector211
- .weak vector212, vector213, vector214, vector215
- .weak vector216, vector217, vector218, vector219
- .weak vector220, vector221, vector222, vector223
- .weak vector224, vector225, vector226, vector227
- .weak vector228, vector229, vector230, vector231
- .weak vector232, vector233, vector234, vector235
- .weak vector236, vector237, vector238, vector239
- .weak vector240, vector241, vector242, vector243
- .weak vector244, vector245, vector246, vector247
- .weak vector248, vector249, vector250, vector251
- .weak vector252, vector253, vector254, vector255
- .weak vector256, vector257, vector258, vector259
- .weak vector260, vector261, vector262, vector263
- .weak vector264, vector265, vector266, vector267
- .weak vector268, vector269, vector270, vector271
- .weak vector272, vector273, vector274, vector275
- .weak vector276, vector277, vector278, vector279
- .weak vector280, vector281, vector282, vector283
- .weak vector284, vector285, vector286, vector287
- .weak vector288, vector289, vector290, vector291
- .weak vector292, vector293, vector294, vector295
- .weak vector296, vector297, vector298, vector299
- .weak vector300, vector301, vector302, vector303
- .weak vector304, vector305, vector306, vector307
- .weak vector308, vector309, vector310, vector311
- .weak vector312, vector313, vector314, vector315
- .weak vector316, vector317, vector318, vector319
- .weak vector320, vector321, vector322, vector323
- .weak vector324, vector325, vector326, vector327
- .weak vector328, vector329, vector330, vector331
- .weak vector332, vector333, vector334, vector335
- .weak vector336, vector337, vector338, vector339
- .weak vector340, vector341, vector342, vector343
- .weak vector344, vector345, vector346, vector347
- .weak vector348, vector349, vector350, vector351
- .weak vector352, vector353, vector354, vector355
- .weak vector356, vector357, vector358, vector359
- .weak vector360, vector361, vector362, vector363
- .weak vector364, vector365, vector366, vector367
- .weak vector368, vector369, vector370, vector371
- .weak vector372, vector373, vector374, vector375
- .weak vector376, vector377, vector378, vector379
- .weak vector380, vector381, vector382, vector383
- .weak vector384, vector385, vector386, vector387
- .weak vector388, vector389, vector390, vector391
- .weak vector392, vector393, vector394, vector395
- .weak vector396, vector397, vector398, vector399
- .weak vector400, vector401, vector402, vector403
- .weak vector404, vector405, vector406, vector407
- .weak vector408, vector409, vector410, vector411
- .weak vector412, vector413, vector414, vector415
- .weak vector416, vector417, vector418, vector419
- .weak vector420, vector421, vector422, vector423
- .weak vector424, vector425, vector426, vector427
- .weak vector428, vector429, vector430, vector431
- .weak vector432, vector433, vector434, vector435
- .weak vector436, vector437, vector438, vector439
- .weak vector440, vector441, vector442, vector443
- .weak vector444, vector445, vector446, vector447
- .weak vector448, vector449, vector450, vector451
- .weak vector452, vector453, vector454, vector455
- .weak vector456, vector457, vector458, vector459
- .weak vector460, vector461, vector462, vector463
- .weak vector464, vector465, vector466, vector467
- .weak vector468, vector469, vector470, vector471
- .weak vector472, vector473, vector474, vector475
- .weak vector476, vector477, vector478, vector479
- .weak vector480, vector481, vector482, vector483
- .weak vector484, vector485
-
-vector0:
-vector1:
-vector2:
-vector3:
-vector4:
-vector5:
-vector6:
-vector7:
-vector8:
-vector9:
-vector10:
-vector11:
-vector12:
-vector13:
-vector14:
-vector15:
-vector16:
-vector17:
-vector18:
-vector19:
-vector20:
-vector21:
-vector22:
-vector23:
-vector24:
-vector25:
-vector26:
-vector27:
-vector28:
-vector29:
-vector30:
-vector31:
-vector32:
-vector33:
-vector34:
-vector35:
-vector36:
-vector37:
-vector38:
-vector39:
-vector40:
-vector41:
-vector42:
-vector43:
-vector44:
-vector45:
-vector46:
-vector47:
-vector48:
-vector49:
-vector50:
-vector51:
-vector52:
-vector53:
-vector54:
-vector55:
-vector56:
-vector57:
-vector58:
-vector59:
-vector60:
-vector61:
-vector62:
-vector63:
-vector64:
-vector65:
-vector66:
-vector67:
-vector68:
-vector69:
-vector70:
-vector71:
-vector72:
-vector73:
-vector74:
-vector75:
-vector76:
-vector77:
-vector78:
-vector79:
-vector80:
-vector81:
-vector82:
-vector83:
-vector84:
-vector85:
-vector86:
-vector87:
-vector88:
-vector89:
-vector90:
-vector91:
-vector92:
-vector93:
-vector94:
-vector95:
-vector96:
-vector97:
-vector98:
-vector99:
-vector100:
-vector101:
-vector102:
-vector103:
-vector104:
-vector105:
-vector106:
-vector107:
-vector108:
-vector109:
-vector110:
-vector111:
-vector112:
-vector113:
-vector114:
-vector115:
-vector116:
-vector117:
-vector118:
-vector119:
-vector120:
-vector121:
-vector122:
-vector123:
-vector124:
-vector125:
-vector126:
-vector127:
-vector128:
-vector129:
-vector130:
-vector131:
-vector132:
-vector133:
-vector134:
-vector135:
-vector136:
-vector137:
-vector138:
-vector139:
-vector140:
-vector141:
-vector142:
-vector143:
-vector144:
-vector145:
-vector146:
-vector147:
-vector148:
-vector149:
-vector150:
-vector151:
-vector152:
-vector153:
-vector154:
-vector155:
-vector156:
-vector157:
-vector158:
-vector159:
-vector160:
-vector161:
-vector162:
-vector163:
-vector164:
-vector165:
-vector166:
-vector167:
-vector168:
-vector169:
-vector170:
-vector171:
-vector172:
-vector173:
-vector174:
-vector175:
-vector176:
-vector177:
-vector178:
-vector179:
-vector180:
-vector181:
-vector182:
-vector183:
-vector184:
-vector185:
-vector186:
-vector187:
-vector188:
-vector189:
-vector190:
-vector191:
-vector192:
-vector193:
-vector194:
-vector195:
-vector196:
-vector197:
-vector198:
-vector199:
-vector200:
-vector201:
-vector202:
-vector203:
-vector204:
-vector205:
-vector206:
-vector207:
-vector208:
-vector209:
-vector210:
-vector211:
-vector212:
-vector213:
-vector214:
-vector215:
-vector216:
-vector217:
-vector218:
-vector219:
-vector220:
-vector221:
-vector222:
-vector223:
-vector224:
-vector225:
-vector226:
-vector227:
-vector228:
-vector229:
-vector230:
-vector231:
-vector232:
-vector233:
-vector234:
-vector235:
-vector236:
-vector237:
-vector238:
-vector239:
-vector240:
-vector241:
-vector242:
-vector243:
-vector244:
-vector245:
-vector246:
-vector247:
-vector248:
-vector249:
-vector250:
-vector251:
-vector252:
-vector253:
-vector254:
-vector255:
-vector256:
-vector257:
-vector258:
-vector259:
-vector260:
-vector261:
-vector262:
-vector263:
-vector264:
-vector265:
-vector266:
-vector267:
-vector268:
-vector269:
-vector270:
-vector271:
-vector272:
-vector273:
-vector274:
-vector275:
-vector276:
-vector277:
-vector278:
-vector279:
-vector280:
-vector281:
-vector282:
-vector283:
-vector284:
-vector285:
-vector286:
-vector287:
-vector288:
-vector289:
-vector290:
-vector291:
-vector292:
-vector293:
-vector294:
-vector295:
-vector296:
-vector297:
-vector298:
-vector299:
-vector300:
-vector301:
-vector302:
-vector303:
-vector304:
-vector305:
-vector306:
-vector307:
-vector308:
-vector309:
-vector310:
-vector311:
-vector312:
-vector313:
-vector314:
-vector315:
-vector316:
-vector317:
-vector318:
-vector319:
-vector320:
-vector321:
-vector322:
-vector323:
-vector324:
-vector325:
-vector326:
-vector327:
-vector328:
-vector329:
-vector330:
-vector331:
-vector332:
-vector333:
-vector334:
-vector335:
-vector336:
-vector337:
-vector338:
-vector339:
-vector340:
-vector341:
-vector342:
-vector343:
-vector344:
-vector345:
-vector346:
-vector347:
-vector348:
-vector349:
-vector350:
-vector351:
-vector352:
-vector353:
-vector354:
-vector355:
-vector356:
-vector357:
-vector358:
-vector359:
-vector360:
-vector361:
-vector362:
-vector363:
-vector364:
-vector365:
-vector366:
-vector367:
-vector368:
-vector369:
-vector370:
-vector371:
-vector372:
-vector373:
-vector374:
-vector375:
-vector376:
-vector377:
-vector378:
-vector379:
-vector380:
-vector381:
-vector382:
-vector383:
-vector384:
-vector385:
-vector386:
-vector387:
-vector388:
-vector389:
-vector390:
-vector391:
-vector392:
-vector393:
-vector394:
-vector395:
-vector396:
-vector397:
-vector398:
-vector399:
-vector400:
-vector401:
-vector402:
-vector403:
-vector404:
-vector405:
-vector406:
-vector407:
-vector408:
-vector409:
-vector410:
-vector411:
-vector412:
-vector413:
-vector414:
-vector415:
-vector416:
-vector417:
-vector418:
-vector419:
-vector420:
-vector421:
-vector422:
-vector423:
-vector424:
-vector425:
-vector426:
-vector427:
-vector428:
-vector429:
-vector430:
-vector431:
-vector432:
-vector433:
-vector434:
-vector435:
-vector436:
-vector437:
-vector438:
-vector439:
-vector440:
-vector441:
-vector442:
-vector443:
-vector444:
-vector445:
-vector446:
-vector447:
-vector448:
-vector449:
-vector450:
-vector451:
-vector452:
-vector453:
-vector454:
-vector455:
-vector456:
-vector457:
-vector458:
-vector459:
-vector460:
-vector461:
-vector462:
-vector463:
-vector464:
-vector465:
-vector466:
-vector467:
-vector468:
-vector469:
-vector470:
-vector471:
-vector472:
-vector473:
-vector474:
-vector475:
-vector476:
-vector477:
-vector478:
-vector479:
-vector480:
-vector481:
-vector482:
-vector483:
-vector484:
-vector485:
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC56ELxx/bam.s b/os/ports/GCC/PPC/SPC56ELxx/bam.s deleted file mode 100644 index 623428ce3..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/bam.s +++ /dev/null @@ -1,51 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC56ELxx/bam.s
- * @brief SPC56ELxx boot assistant record.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* BAM record.*/
- .section .bam, "ax"
-#if PPC_USE_VLE
- .long 0x015A0000
-#else
- .long 0x005A0000
-#endif
- .long _reset_address
-
- .align 2
- .globl _reset_address
- .type _reset_address, @function
-_reset_address:
- bl _coreinit
- bl _ivinit
-
- b _boot_address
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC56ELxx/core.s b/os/ports/GCC/PPC/SPC56ELxx/core.s deleted file mode 100644 index 0675cd20d..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/core.s +++ /dev/null @@ -1,535 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC56ELxx/core.s
- * @brief e200z4 core configuration.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/**
- * @name MASx registers definitions
- * @{
- */
-#define MAS0_TBLMAS_TBL 0x10000000
-#define MAS0_ESEL_MASK 0x000F0000
-#define MAS0_ESEL(n) ((n) << 16)
-
-#define MAS1_VALID 0x80000000
-#define MAS1_IPROT 0x40000000
-#define MAS1_TID_MASK 0x00FF0000
-#define MAS1_TS 0x00001000
-#define MAS1_TSISE_MASK 0x00000F80
-#define MAS1_TSISE_1K 0x00000000
-#define MAS1_TSISE_2K 0x00000080
-#define MAS1_TSISE_4K 0x00000100
-#define MAS1_TSISE_8K 0x00000180
-#define MAS1_TSISE_16K 0x00000200
-#define MAS1_TSISE_32K 0x00000280
-#define MAS1_TSISE_64K 0x00000300
-#define MAS1_TSISE_128K 0x00000380
-#define MAS1_TSISE_256K 0x00000400
-#define MAS1_TSISE_512K 0x00000480
-#define MAS1_TSISE_1M 0x00000500
-#define MAS1_TSISE_2M 0x00000580
-#define MAS1_TSISE_4M 0x00000600
-#define MAS1_TSISE_8M 0x00000680
-#define MAS1_TSISE_16M 0x00000700
-#define MAS1_TSISE_32M 0x00000780
-#define MAS1_TSISE_64M 0x00000800
-#define MAS1_TSISE_128M 0x00000880
-#define MAS1_TSISE_256M 0x00000900
-#define MAS1_TSISE_512M 0x00000980
-#define MAS1_TSISE_1G 0x00000A00
-#define MAS1_TSISE_2G 0x00000A80
-#define MAS1_TSISE_4G 0x00000B00
-
-#define MAS2_EPN_MASK 0xFFFFFC00
-#define MAS2_EPN(n) ((n) & MAS2_EPN_MASK)
-#define MAS2_EBOOK 0x00000000
-#define MAS2_VLE 0x00000020
-#define MAS2_W 0x00000010
-#define MAS2_I 0x00000008
-#define MAS2_M 0x00000004
-#define MAS2_G 0x00000002
-#define MAS2_E 0x00000001
-
-#define MAS3_RPN_MASK 0xFFFFFC00
-#define MAS3_RPN(n) ((n) & MAS3_RPN_MASK)
-#define MAS3_U0 0x00000200
-#define MAS3_U1 0x00000100
-#define MAS3_U2 0x00000080
-#define MAS3_U3 0x00000040
-#define MAS3_UX 0x00000020
-#define MAS3_SX 0x00000010
-#define MAS3_UW 0x00000008
-#define MAS3_SW 0x00000004
-#define MAS3_UR 0x00000002
-#define MAS3_SR 0x00000001
-/** @} */
-
-/**
- * @name BUCSR registers definitions
- * @{
- */
-#define BUCSR_BPEN 0x00000001
-#define BUCSR_BPRED_MASK 0x00000006
-#define BUCSR_BPRED_0 0x00000000
-#define BUCSR_BPRED_1 0x00000002
-#define BUCSR_BPRED_2 0x00000004
-#define BUCSR_BPRED_3 0x00000006
-#define BUCSR_BALLOC_MASK 0x00000030
-#define BUCSR_BALLOC_0 0x00000000
-#define BUCSR_BALLOC_1 0x00000010
-#define BUCSR_BALLOC_2 0x00000020
-#define BUCSR_BALLOC_3 0x00000030
-#define BUCSR_BALLOC_BFI 0x00000200
-/** @} */
-
-/**
- * @name LICSR1 registers definitions
- * @{
- */
-#define LICSR1_ICE 0x00000001
-#define LICSR1_ICINV 0x00000002
-#define LICSR1_ICORG 0x00000010
-/** @} */
-
-/**
- * @name TLB default settings
- * @{
- */
-#define TLB0_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(0))
-#define TLB0_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_2M)
-#define TLB0_MAS2 (MAS2_EPN(0x00000000) | MAS2_VLE)
-#define TLB0_MAS3 (MAS3_RPN(0x00000000) | \
- MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
- MAS3_UR | MAS3_SR)
-
-#define TLB1_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(1))
-#define TLB1_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_128K)
-#define TLB1_MAS2 (MAS2_EPN(0x40000000) | MAS2_VLE)
-#define TLB1_MAS3 (MAS3_RPN(0x40000000) | \
- MAS3_UX | MAS3_SX | MAS3_UW | MAS3_SW | \
- MAS3_UR | MAS3_SR)
-
-#define TLB2_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(2))
-#define TLB2_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB2_MAS2 (MAS2_EPN(0xC3F00000) | MAS2_I)
-#define TLB2_MAS3 (MAS3_RPN(0xC3F00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-
-#define TLB3_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(3))
-#define TLB3_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB3_MAS2 (MAS2_EPN(0xFFE00000) | MAS2_I)
-#define TLB3_MAS3 (MAS3_RPN(0xFFE00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-
-#define TLB4_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(4))
-#define TLB4_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB4_MAS2 (MAS2_EPN(0x8FF00000) | MAS2_I)
-#define TLB4_MAS3 (MAS3_RPN(0x8FF00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-
-#define TLB5_MAS0 (MAS0_TBLMAS_TBL | MAS0_ESEL(5))
-#define TLB5_MAS1 (MAS1_VALID | MAS1_IPROT | MAS1_TSISE_1M)
-#define TLB5_MAS2 (MAS2_EPN(0xFFF00000) | MAS2_I)
-#define TLB5_MAS3 (MAS3_RPN(0xFFF00000) | \
- MAS3_UW | MAS3_SW | MAS3_UR | MAS3_SR)
-/** @} */
-
-/**
- * @name BUCSR default settings
- * @{
- */
-#define BUCSR_DEFAULT (BUCSR_BPEN | BUCSR_BPRED_0 | \
- BUCSR_BALLOC_0 | BUCSR_BALLOC_BFI)
-/** @} */
-
-/**
- * @name LICSR1 default settings
- * @{
- */
-#define LICSR1_DEFAULT (LICSR1_ICE | LICSR1_ICORG)
-/** @} */
-
-/**
- * @name MSR register definitions
- * @{
- */
-#define MSR_UCLE 0x04000000
-#define MSR_SPE 0x02000000
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_EE 0x00008000
-#define MSR_PR 0x00004000
-#define MSR_FP 0x00002000
-#define MSR_ME 0x00001000
-#define MSR_FE0 0x00000800
-#define MSR_DE 0x00000200
-#define MSR_FE1 0x00000100
-#define MSR_IS 0x00000020
-#define MSR_DS 0x00000010
-#define MSR_RI 0x00000002
-/** @} */
-
-/**
- * @name MSR default settings
- * @{
- */
-#define MSR_DEFAULT (MSR_SPE | MSR_WE | MSR_CE | MSR_ME)
-/** @} */
-
-#if !defined(__DOXYGEN__)
-
- .section .coreinit, "ax"
-
- .align 2
-_ramcode:
- tlbwe
- isync
- blr
-
- .align 2
- .globl _coreinit
- .type _coreinit, @function
-_coreinit:
- /*
- * Invalidating all TLBs except TLB0.
- */
- lis %r3, 0
- mtspr 625, %r3 /* MAS1 */
- mtspr 626, %r3 /* MAS2 */
- mtspr 627, %r3 /* MAS3 */
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(1))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
- mtspr 624, %r3 /* MAS0 */
- tlbwe
-
- /*
- * TLB1 allocated to internal RAM.
- */
- lis %r3, TLB1_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB1_MAS1@h
- ori %r3, %r3, TLB1_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB1_MAS2@h
- ori %r3, %r3, TLB1_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB1_MAS3@h
- ori %r3, %r3, TLB1_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB2 allocated to internal Peripherals Bridge A.
- */
- lis %r3, TLB2_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB2_MAS1@h
- ori %r3, %r3, TLB2_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB2_MAS2@h
- ori %r3, %r3, TLB2_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB2_MAS3@h
- ori %r3, %r3, TLB2_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB3 allocated to internal Peripherals Bridge B.
- */
- lis %r3, TLB3_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB3_MAS1@h
- ori %r3, %r3, TLB3_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB3_MAS2@h
- ori %r3, %r3, TLB3_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB3_MAS3@h
- ori %r3, %r3, TLB3_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB4 allocated to on-platform peripherals.
- */
- lis %r3, TLB4_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB4_MAS1@h
- ori %r3, %r3, TLB4_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB4_MAS2@h
- ori %r3, %r3, TLB4_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB4_MAS3@h
- ori %r3, %r3, TLB4_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * TLB5 allocated to on-platform peripherals.
- */
- lis %r3, TLB5_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB5_MAS1@h
- ori %r3, %r3, TLB5_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB5_MAS2@h
- ori %r3, %r3, TLB5_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB5_MAS3@h
- ori %r3, %r3, TLB5_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- tlbwe
-
- /*
- * RAM clearing, this device requires a write to all RAM location in
- * order to initialize the ECC detection hardware, this is going to
- * slow down the startup but there is no way around.
- */
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
-.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
-.cleareccend:
-
- /*
- * Special function registers clearing, required in order to avoid
- * possible problems with lockstep mode.
- */
- mtcrf 0xFF, %r31
- mtspr 9, %r31 /* CTR */
- mtspr 22, %r31 /* DEC */
- mtspr 26, %r31 /* SRR0-1 */
- mtspr 27, %r31
- mtspr 54, %r31 /* DECAR */
- mtspr 58, %r31 /* CSRR0-1 */
- mtspr 59, %r31
- mtspr 61, %r31 /* DEAR */
- mtspr 256, %r31 /* USPRG0 */
- mtspr 272, %r31 /* SPRG1-7 */
- mtspr 273, %r31
- mtspr 274, %r31
- mtspr 275, %r31
- mtspr 276, %r31
- mtspr 277, %r31
- mtspr 278, %r31
- mtspr 279, %r31
- mtspr 285, %r31 /* TBU */
- mtspr 284, %r31 /* TBL */
-#if 0
- mtspr 318, %r31 /* DVC1-2 */
- mtspr 319, %r31
-#endif
- mtspr 562, %r31 /* DBCNT */
- mtspr 570, %r31 /* MCSRR0 */
- mtspr 571, %r31 /* MCSRR1 */
- mtspr 604, %r31 /* SPRG8-9 */
- mtspr 605, %r31
-
- /*
- * *Finally* the TLB0 is re-allocated to flash, note, the final phase
- * is executed from RAM.
- */
- lis %r3, TLB0_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB0_MAS1@h
- ori %r3, %r3, TLB0_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB0_MAS2@h
- ori %r3, %r3, TLB0_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB0_MAS3@h
- ori %r3, %r3, TLB0_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- mflr %r4
- lis %r6, _ramcode@h
- ori %r6, %r6, _ramcode@l
- lis %r7, 0x40010000@h
- mtctr %r7
- lwz %r3, 0(%r6)
- stw %r3, 0(%r7)
- lwz %r3, 4(%r6)
- stw %r3, 4(%r7)
- lwz %r3, 8(%r6)
- stw %r3, 8(%r7)
- bctrl
- mtlr %r4
-
- /*
- * Branch prediction enabled.
- */
- li %r3, BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
-
- /*
- * Cache invalidated and then enabled.
- */
- li %r3, LICSR1_ICINV
- mtspr 1011, %r3 /* LICSR1 */
-.inv: mfspr %r3, 1011 /* LICSR1 */
- andi. %r3, %r3, LICSR1_ICINV
- bne .inv
- lis %r3, LICSR1_DEFAULT@h
- ori %r3, %r3, LICSR1_DEFAULT@l
- mtspr 1011, %r3 /* LICSR1 */
-
- blr
-
- /*
- * Exception vectors initialization.
- */
- .global _ivinit
- .type _ivinit, @function
-_ivinit:
- /* MSR initialization.*/
- lis %r3, MSR_DEFAULT@h
- ori %r3, %r3, MSR_DEFAULT@l
- mtMSR %r3
-
- /* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
-
- /* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
-
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- blr
-
- .section .handlers, "ax"
-
- /*
- * Unhandled exceptions handler.
- */
- .weak _unhandled_exception
- .type _unhandled_exception, @function
-_unhandled_exception:
- b _unhandled_exception
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld deleted file mode 100644 index 592c435f5..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC56EL54 memory setup in LSM mode.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 768k
- ram : org = 0x40000000, len = 128k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld deleted file mode 100644 index 193c21c05..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC56EL60 memory setup in LSM mode.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 1M
- ram : org = 0x40000000, len = 128k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld deleted file mode 100644 index 7afb4bf78..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld +++ /dev/null @@ -1,175 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * SPC56EL70 memory setup in LSM mode.
- */
-__irq_stack_size__ = 0x0000; /* Not yet used.*/
-__process_stack_size__ = 0x0800;
-
-MEMORY
-{
- flash : org = 0x00000000, len = 2M
- ram : org = 0x40000000, len = 192k
-}
-
-ENTRY(_reset_address)
-
-/*
- * Derived constants.
- */
-__flash_size__ = LENGTH(flash);
-__flash_start__ = ORIGIN(flash);
-__flash_end__ = ORIGIN(flash) + LENGTH(flash);
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.bam))
- KEEP(*(.coreinit))
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks :
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/ports/GCC/PPC/SPC56ELxx/port.mk b/os/ports/GCC/PPC/SPC56ELxx/port.mk deleted file mode 100644 index 5a81771db..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/port.mk +++ /dev/null @@ -1,13 +0,0 @@ -# List of the ChibiOS/RT SPC56ELxx port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/PPC/chcore.c
-
-PORTASM = ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/bam.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/core.s \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/vectors.s \
- ${CHIBIOS}/os/ports/GCC/PPC/ivor.s \
- ${CHIBIOS}/os/ports/GCC/PPC/crt0.s
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/PPC \
- ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx
-
-PORTLD = ${CHIBIOS}/os/ports/GCC/PPC/SPC56ELxx/ld
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ppcparams.h b/os/ports/GCC/PPC/SPC56ELxx/ppcparams.h deleted file mode 100644 index c09b0b875..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/ppcparams.h +++ /dev/null @@ -1,72 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC56ELxx/ppcparams.h
- * @brief PowerPC parameters for the SPC56ELxx.
- *
- * @defgroup PPC_SPC56ELxx SPC56ELxx Specific Parameters
- * @ingroup PPC_SPECIFIC
- * @details This file contains the PowerPC specific parameters for the
- * SPC56ELxx platform.
- * @{
- */
-
-#ifndef _PPCPARAMS_H_
-#define _PPCPARAMS_H_
-
-/**
- * @brief PPC core model.
- */
-#define PPC_VARIANT PPC_VARIANT_e200z4
-
-/**
- * @brief Number of writable bits in IVPR register.
- */
-#define PPC_IVPR_BITS 16
-
-/**
- * @brief IVORx registers support.
- */
-#define PPC_SUPPORTS_IVORS TRUE
-
-/**
- * @brief Book E instruction set support.
- */
-#define PPC_SUPPORTS_BOOKE TRUE
-
-/**
- * @brief VLE instruction set support.
- */
-#define PPC_SUPPORTS_VLE TRUE
-
-/**
- * @brief Supports VLS Load/Store Multiple Volatile instructions.
- */
-#define PPC_SUPPORTS_VLE_MULTI TRUE
-
-/**
- * @brief Supports the decrementer timer.
- */
-#define PPC_SUPPORTS_DECREMENTER TRUE
-
-#endif /* _PPCPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC56ELxx/vectors.h b/os/ports/GCC/PPC/SPC56ELxx/vectors.h deleted file mode 100644 index 628b075b5..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/vectors.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC56ELxx/vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _VECTORS_H_
-#define _VECTORS_H_
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/**
- * @brief Number of ISR vectors available.
- */
-#define VECTORS_NUMBER 256
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[VECTORS_NUMBER];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _OSAL_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/SPC56ELxx/vectors.s b/os/ports/GCC/PPC/SPC56ELxx/vectors.s deleted file mode 100644 index 22a35f1d5..000000000 --- a/os/ports/GCC/PPC/SPC56ELxx/vectors.s +++ /dev/null @@ -1,436 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file SPC56ELxx/vectors.s
- * @brief SPC56ELxx vectors table.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
- .long vector4, vector5, vector6, vector7
- .long vector8, vector9, vector10, vector11
- .long vector12, vector13, vector14, vector15
- .long vector16, vector17, vector18, vector19
- .long vector20, vector21, vector22, vector23
- .long vector24, vector25, vector26, vector27
- .long vector28, vector29, vector30, vector31
- .long vector32, vector33, vector34, vector35
- .long vector36, vector37, vector38, vector39
- .long vector40, vector41, vector42, vector43
- .long vector44, vector45, vector46, vector47
- .long vector48, vector49, vector50, vector51
- .long vector52, vector53, vector54, vector55
- .long vector56, vector57, vector58, vector59
- .long vector60, vector61, vector62, vector63
- .long vector64, vector65, vector66, vector67
- .long vector68, vector69, vector70, vector71
- .long vector72, vector73, vector74, vector75
- .long vector76, vector77, vector78, vector79
- .long vector80, vector81, vector82, vector83
- .long vector84, vector85, vector86, vector87
- .long vector88, vector89, vector90, vector91
- .long vector92, vector93, vector94, vector95
- .long vector96, vector97, vector98, vector99
- .long vector100, vector101, vector102, vector103
- .long vector104, vector105, vector106, vector107
- .long vector108, vector109, vector110, vector111
- .long vector112, vector113, vector114, vector115
- .long vector116, vector117, vector118, vector119
- .long vector120, vector121, vector122, vector123
- .long vector124, vector125, vector126, vector127
- .long vector128, vector129, vector130, vector131
- .long vector132, vector133, vector134, vector135
- .long vector136, vector137, vector138, vector139
- .long vector140, vector141, vector142, vector143
- .long vector144, vector145, vector146, vector147
- .long vector148, vector149, vector150, vector151
- .long vector152, vector153, vector154, vector155
- .long vector156, vector157, vector158, vector159
- .long vector160, vector161, vector162, vector163
- .long vector164, vector165, vector166, vector167
- .long vector168, vector169, vector170, vector171
- .long vector172, vector173, vector174, vector175
- .long vector176, vector177, vector178, vector179
- .long vector180, vector181, vector182, vector183
- .long vector184, vector185, vector186, vector187
- .long vector188, vector189, vector190, vector191
- .long vector192, vector193, vector194, vector195
- .long vector196, vector197, vector198, vector199
- .long vector200, vector201, vector202, vector203
- .long vector204, vector205, vector206, vector207
- .long vector208, vector209, vector210, vector211
- .long vector212, vector213, vector214, vector215
- .long vector216, vector217, vector218, vector219
- .long vector220, vector221, vector222, vector223
- .long vector224, vector225, vector226, vector227
- .long vector228, vector229, vector230, vector231
- .long vector232, vector233, vector234, vector235
- .long vector236, vector237, vector238, vector239
- .long vector240, vector241, vector242, vector243
- .long vector244, vector245, vector246, vector247
- .long vector248, vector249, vector250, vector251
- .long vector252, vector253, vector254, vector255
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
- .weak vector4, vector5, vector6, vector7
- .weak vector8, vector9, vector10, vector11
- .weak vector12, vector13, vector14, vector15
- .weak vector16, vector17, vector18, vector19
- .weak vector20, vector21, vector22, vector23
- .weak vector24, vector25, vector26, vector27
- .weak vector28, vector29, vector30, vector31
- .weak vector32, vector33, vector34, vector35
- .weak vector36, vector37, vector38, vector39
- .weak vector40, vector41, vector42, vector43
- .weak vector44, vector45, vector46, vector47
- .weak vector48, vector49, vector50, vector51
- .weak vector52, vector53, vector54, vector55
- .weak vector56, vector57, vector58, vector59
- .weak vector60, vector61, vector62, vector63
- .weak vector64, vector65, vector66, vector67
- .weak vector68, vector69, vector70, vector71
- .weak vector72, vector73, vector74, vector75
- .weak vector76, vector77, vector78, vector79
- .weak vector80, vector81, vector82, vector83
- .weak vector84, vector85, vector86, vector87
- .weak vector88, vector89, vector90, vector91
- .weak vector92, vector93, vector94, vector95
- .weak vector96, vector97, vector98, vector99
- .weak vector100, vector101, vector102, vector103
- .weak vector104, vector105, vector106, vector107
- .weak vector108, vector109, vector110, vector111
- .weak vector112, vector113, vector114, vector115
- .weak vector116, vector117, vector118, vector119
- .weak vector120, vector121, vector122, vector123
- .weak vector124, vector125, vector126, vector127
- .weak vector128, vector129, vector130, vector131
- .weak vector132, vector133, vector134, vector135
- .weak vector136, vector137, vector138, vector139
- .weak vector140, vector141, vector142, vector143
- .weak vector144, vector145, vector146, vector147
- .weak vector148, vector149, vector150, vector151
- .weak vector152, vector153, vector154, vector155
- .weak vector156, vector157, vector158, vector159
- .weak vector160, vector161, vector162, vector163
- .weak vector164, vector165, vector166, vector167
- .weak vector168, vector169, vector170, vector171
- .weak vector172, vector173, vector174, vector175
- .weak vector176, vector177, vector178, vector179
- .weak vector180, vector181, vector182, vector183
- .weak vector184, vector185, vector186, vector187
- .weak vector188, vector189, vector190, vector191
- .weak vector192, vector193, vector194, vector195
- .weak vector196, vector197, vector198, vector199
- .weak vector200, vector201, vector202, vector203
- .weak vector204, vector205, vector206, vector207
- .weak vector208, vector209, vector210, vector211
- .weak vector212, vector213, vector214, vector215
- .weak vector216, vector217, vector218, vector219
- .weak vector220, vector221, vector222, vector223
- .weak vector224, vector225, vector226, vector227
- .weak vector228, vector229, vector230, vector231
- .weak vector232, vector233, vector234, vector235
- .weak vector236, vector237, vector238, vector239
- .weak vector240, vector241, vector242, vector243
- .weak vector244, vector245, vector246, vector247
- .weak vector248, vector249, vector250, vector251
- .weak vector252, vector253, vector254, vector255
-
-vector0:
-vector1:
-vector2:
-vector3:
-vector4:
-vector5:
-vector6:
-vector7:
-vector8:
-vector9:
-vector10:
-vector11:
-vector12:
-vector13:
-vector14:
-vector15:
-vector16:
-vector17:
-vector18:
-vector19:
-vector20:
-vector21:
-vector22:
-vector23:
-vector24:
-vector25:
-vector26:
-vector27:
-vector28:
-vector29:
-vector30:
-vector31:
-vector32:
-vector33:
-vector34:
-vector35:
-vector36:
-vector37:
-vector38:
-vector39:
-vector40:
-vector41:
-vector42:
-vector43:
-vector44:
-vector45:
-vector46:
-vector47:
-vector48:
-vector49:
-vector50:
-vector51:
-vector52:
-vector53:
-vector54:
-vector55:
-vector56:
-vector57:
-vector58:
-vector59:
-vector60:
-vector61:
-vector62:
-vector63:
-vector64:
-vector65:
-vector66:
-vector67:
-vector68:
-vector69:
-vector70:
-vector71:
-vector72:
-vector73:
-vector74:
-vector75:
-vector76:
-vector77:
-vector78:
-vector79:
-vector80:
-vector81:
-vector82:
-vector83:
-vector84:
-vector85:
-vector86:
-vector87:
-vector88:
-vector89:
-vector90:
-vector91:
-vector92:
-vector93:
-vector94:
-vector95:
-vector96:
-vector97:
-vector98:
-vector99:
-vector100:
-vector101:
-vector102:
-vector103:
-vector104:
-vector105:
-vector106:
-vector107:
-vector108:
-vector109:
-vector110:
-vector111:
-vector112:
-vector113:
-vector114:
-vector115:
-vector116:
-vector117:
-vector118:
-vector119:
-vector120:
-vector121:
-vector122:
-vector123:
-vector124:
-vector125:
-vector126:
-vector127:
-vector128:
-vector129:
-vector130:
-vector131:
-vector132:
-vector133:
-vector134:
-vector135:
-vector136:
-vector137:
-vector138:
-vector139:
-vector140:
-vector141:
-vector142:
-vector143:
-vector144:
-vector145:
-vector146:
-vector147:
-vector148:
-vector149:
-vector150:
-vector151:
-vector152:
-vector153:
-vector154:
-vector155:
-vector156:
-vector157:
-vector158:
-vector159:
-vector160:
-vector161:
-vector162:
-vector163:
-vector164:
-vector165:
-vector166:
-vector167:
-vector168:
-vector169:
-vector170:
-vector171:
-vector172:
-vector173:
-vector174:
-vector175:
-vector176:
-vector177:
-vector178:
-vector179:
-vector180:
-vector181:
-vector182:
-vector183:
-vector184:
-vector185:
-vector186:
-vector187:
-vector188:
-vector189:
-vector190:
-vector191:
-vector192:
-vector193:
-vector194:
-vector195:
-vector196:
-vector197:
-vector198:
-vector199:
-vector200:
-vector201:
-vector202:
-vector203:
-vector204:
-vector205:
-vector206:
-vector207:
-vector208:
-vector209:
-vector210:
-vector211:
-vector212:
-vector213:
-vector214:
-vector215:
-vector216:
-vector217:
-vector218:
-vector219:
-vector220:
-vector221:
-vector222:
-vector223:
-vector224:
-vector225:
-vector226:
-vector227:
-vector228:
-vector229:
-vector230:
-vector231:
-vector232:
-vector233:
-vector234:
-vector235:
-vector236:
-vector237:
-vector238:
-vector239:
-vector240:
-vector241:
-vector242:
-vector243:
-vector244:
-vector245:
-vector246:
-vector247:
-vector248:
-vector249:
-vector250:
-vector251:
-vector252:
-vector253:
-vector254:
-vector255:
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/chcore.c b/os/ports/GCC/PPC/chcore.c deleted file mode 100644 index 4644376cf..000000000 --- a/os/ports/GCC/PPC/chcore.c +++ /dev/null @@ -1,112 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file PPC/chcore.c
- * @brief PowerPC architecture port code.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Kernel port layer initialization.
- * @details IVOR4 and IVOR10 initialization.
- */
-void port_init(void) {
-#if PPC_SUPPORTS_IVORS
- /* The CPU supports IVOR registers, the kernel requires IVOR4 and IVOR10
- and the initialization is performed here.*/
- asm volatile ("li %%r3, _IVOR4@l \t\n"
- "mtIVOR4 %%r3 \t\n"
- "li %%r3, _IVOR10@l \t\n"
- "mtIVOR10 %%r3" : : : "memory");
-#endif
-}
-
-/**
- * @brief Halts the system.
- * @details This function is invoked by the operating system when an
- * unrecoverable error is detected (for example because a programming
- * error in the application code that triggers an assertion while
- * in debug mode).
- */
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void port_dummy1(void) {
-
- asm (".global _port_switch");
- asm ("_port_switch:");
- asm ("subi %sp, %sp, 80"); /* Size of the intctx structure. */
- asm ("mflr %r0");
- asm ("stw %r0, 84(%sp)"); /* LR into the caller frame. */
- asm ("mfcr %r0");
- asm ("stw %r0, 0(%sp)"); /* CR. */
- asm ("stmw %r14, 4(%sp)"); /* GPR14...GPR31. */
-
- asm ("stw %sp, 12(%r4)"); /* Store swapped-out stack. */
- asm ("lwz %sp, 12(%r3)"); /* Load swapped-in stack. */
-
- asm ("lmw %r14, 4(%sp)"); /* GPR14...GPR31. */
- asm ("lwz %r0, 0(%sp)"); /* CR. */
- asm ("mtcr %r0");
- asm ("lwz %r0, 84(%sp)"); /* LR from the caller frame. */
- asm ("mtlr %r0");
- asm ("addi %sp, %sp, 80"); /* Size of the intctx structure. */
- asm ("blr");
-}
-
-/**
- * @brief Start a thread by invoking its work function.
- * @details If the work function returns @p chThdExit() is automatically
- * invoked.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((naked))
-#endif
-void port_dummy2(void) {
-
- asm (".global _port_thread_start");
- asm ("_port_thread_start:");
- chSysUnlock();
- asm ("mr %r3, %r31"); /* Thread parameter. */
- asm ("mtctr %r30");
- asm ("bctrl"); /* Invoke thread function. */
- asm ("bl chThdExit"); /* Thread termination on exit. */
-}
-
-/** @} */
diff --git a/os/ports/GCC/PPC/chcore.h b/os/ports/GCC/PPC/chcore.h deleted file mode 100644 index b689026e5..000000000 --- a/os/ports/GCC/PPC/chcore.h +++ /dev/null @@ -1,404 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file PPC/chcore.h
- * @brief PowerPC architecture port macros and structures.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/*===========================================================================*/
-/* Port constants (common). */
-/*===========================================================================*/
-
-/* Added to make the header stand-alone when included from asm.*/
-#ifndef FALSE
-#define FALSE 0
-#endif
-#ifndef TRUE
-#define TRUE (!FALSE)
-#endif
-
-/**
- * @name Supported core variants
- * @{
- */
-#define PPC_VARIANT_e200z0 200
-#define PPC_VARIANT_e200z3 203
-#define PPC_VARIANT_e200z4 204
-/** @} */
-
-#include "vectors.h"
-#include "ppcparams.h"
-
-/*===========================================================================*/
-/* Port macros (common). */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters (common). */
-/*===========================================================================*/
-
-/**
- * @brief Use VLE instruction set.
- * @note This parameter is usually set in the Makefile.
- */
-#if !defined(PPC_USE_VLE)
-#define PPC_USE_VLE TRUE
-#endif
-
-/**
- * @brief Enables the use of the @p WFI instruction.
- */
-#if !defined(PPC_ENABLE_WFI_IDLE)
-#define PPC_ENABLE_WFI_IDLE FALSE
-#endif
-
-/*===========================================================================*/
-/* Port derived parameters (common). */
-/*===========================================================================*/
-
-#if PPC_USE_VLE && !PPC_SUPPORTS_VLE
-#error "the selected MCU does not support VLE instructions set"
-#endif
-
-#if !PPC_USE_VLE && !PPC_SUPPORTS_BOOKE
-#error "the selected MCU does not support BookE instructions set"
-#endif
-
-/*===========================================================================*/
-/* Port exported info (common). */
-/*===========================================================================*/
-
-/**
- * @brief Unique macro for the implemented architecture.
- */
-#define CH_ARCHITECTURE_PPC
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "Power Architecture"
-
-/**
- * @brief Name of the architecture variant.
- */
-#if (PPC_VARIANT == PPC_VARIANT_e200z0) || defined(__DOXYGEN__)
-#define CH_CORE_VARIANT_NAME "e200z0"
-#elif PPC_VARIANT == PPC_VARIANT_e200z3
-#define CH_CORE_VARIANT_NAME "e200z3"
-#elif PPC_VARIANT == PPC_VARIANT_e200z4
-#define CH_CORE_VARIANT_NAME "e200z4"
-#else
-#error "unknown or unsupported PowerPC variant specified"
-#endif
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "GCC " __VERSION__
-
-/**
- * @brief Port-specific information string.
- */
-#if PPC_USE_VLE
-#define CH_PORT_INFO "VLE mode"
-#else
-#define CH_PORT_INFO "Book-E mode"
-#endif
-
-/*===========================================================================*/
-/* Port implementation part (common). */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Base type for stack and memory alignment.
- */
-typedef struct {
- uint8_t a[8];
-} stkalign_t __attribute__((aligned(8)));
-
-/**
- * @brief Generic PPC register.
- */
-typedef void *regppc_t;
-
-/**
- * @brief Mandatory part of a stack frame.
- */
-struct eabi_frame {
- regppc_t slink; /**< Stack back link. */
- regppc_t shole; /**< Stack hole for LR storage. */
-};
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note R2 and R13 are not saved because those are assumed to be immutable
- * during the system life cycle.
- */
-struct extctx {
- struct eabi_frame frame;
- /* Start of the e_stmvsrrw frame (offset 8).*/
- regppc_t pc;
- regppc_t msr;
- /* Start of the e_stmvsprw frame (offset 16).*/
- regppc_t cr;
- regppc_t lr;
- regppc_t ctr;
- regppc_t xer;
- /* Start of the e_stmvgprw frame (offset 32).*/
- regppc_t r0;
- regppc_t r3;
- regppc_t r4;
- regppc_t r5;
- regppc_t r6;
- regppc_t r7;
- regppc_t r8;
- regppc_t r9;
- regppc_t r10;
- regppc_t r11;
- regppc_t r12;
- regppc_t padding;
- };
-
- /**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- * @note R2 and R13 are not saved because those are assumed to be immutable
- * during the system life cycle.
- * @note LR is stored in the caller contex so it is not present in this
- * structure.
- */
-struct intctx {
- regppc_t cr; /* Part of it is not volatile... */
- regppc_t r14;
- regppc_t r15;
- regppc_t r16;
- regppc_t r17;
- regppc_t r18;
- regppc_t r19;
- regppc_t r20;
- regppc_t r21;
- regppc_t r22;
- regppc_t r23;
- regppc_t r24;
- regppc_t r25;
- regppc_t r26;
- regppc_t r27;
- regppc_t r28;
- regppc_t r29;
- regppc_t r30;
- regppc_t r31;
- regppc_t padding;
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details This structure usually contains just the saved stack pointer
- * defined as a pointer to a @p intctx structure.
- */
-struct context {
- struct intctx *sp;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- uint8_t *sp = (uint8_t *)workspace + wsize - sizeof(struct eabi_frame); \
- ((struct eabi_frame *)sp)->slink = 0; \
- ((struct eabi_frame *)sp)->shole = _port_thread_start; \
- tp->p_ctx.sp = (struct intctx *)(sp - sizeof(struct intctx)); \
- tp->p_ctx.sp->r31 = arg; \
- tp->p_ctx.sp->r30 = pf; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 32
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 256
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE()
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @details Implemented as global interrupt disable.
- */
-#define port_lock() asm volatile ("wrteei 0" : : : "memory")
-
-/**
- * @details Implemented as global interrupt enable.
- */
-#define port_unlock() asm volatile("wrteei 1" : : : "memory")
-
-/**
- * @details Implemented as global interrupt disable.
- */
-#define port_lock_from_isr() /*asm ("wrteei 0")*/
-
-/**
- * @details Implemented as global interrupt enable.
- */
-#define port_unlock_from_isr() /*asm ("wrteei 1")*/
-
-/**
- * @details Implemented as global interrupt disable.
- */
-#define port_disable() asm volatile ("wrteei 0" : : : "memory")
-
-/**
- * @details Same as @p port_disable() in this port, there is no difference
- * between the two states.
- */
-#define port_suspend() asm volatile ("wrteei 0" : : : "memory")
-
-/**
- * @details Implemented as global interrupt enable.
- */
-#define port_enable() asm volatile ("wrteei 1" : : : "memory")
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- register struct intctx *sp asm ("%r1"); \
- if ((stkalign_t *)(sp - 1) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-/**
- * @brief Writes to a special register.
- *
- * @param[in] spr special register number
- * @param[in] val value to be written
- */
-#define port_mtspr(spr, val) \
- asm volatile ("mtspr %0,%1" : : "n" (spr), "r" (val))
-
-/**
- * @details This port function is implemented as inlined code for performance
- * reasons.
- */
-#if PPC_ENABLE_WFI_IDLE
-#if !defined(port_wait_for_interrupt)
-#define port_wait_for_interrupt() { \
- asm volatile ("wait" : : : "memory"); \
-}
-#endif
-#else
-#define port_wait_for_interrupt()
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_init(void);
- void port_halt(void);
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/chtypes.h b/os/ports/GCC/PPC/chtypes.h deleted file mode 100644 index 37f4419f6..000000000 --- a/os/ports/GCC/PPC/chtypes.h +++ /dev/null @@ -1,93 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file PPC/chtypes.h
- * @brief PowerPC architecture port system types.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-/*
- * Derived generic types.
- */
-typedef volatile int8_t vint8_t; /**< Volatile signed 8 bits. */
-typedef volatile uint8_t vuint8_t; /**< Volatile unsigned 8 bits. */
-typedef volatile int16_t vint16_t; /**< Volatile signed 16 bits. */
-typedef volatile uint16_t vuint16_t; /**< Volatile unsigned 16 bits. */
-typedef volatile int32_t vint32_t; /**< Volatile signed 32 bits. */
-typedef volatile uint32_t vuint32_t; /**< Volatile unsigned 32 bits. */
-
-/*
- * Kernel types.
- */
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter.*/
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Event Id. */
-typedef uint32_t eventmask_t; /**< Event mask. */
-typedef uint32_t flagsmask_t; /**< Event flags. */
-typedef uint32_t systime_t; /**< System time. */
-typedef int32_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note It uses the "packed" GCC attribute.
- */
-#define PACK_STRUCT_STRUCT __attribute__((packed))
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/crt0.s b/os/ports/GCC/PPC/crt0.s deleted file mode 100644 index 07e870451..000000000 --- a/os/ports/GCC/PPC/crt0.s +++ /dev/null @@ -1,126 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file PPC/crt0.s
- * @brief Generic PowerPC startup file for ChibiOS/RT.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(__DOXYGEN__)
-
- .section .crt0, "ax"
- .align 2
- .globl _boot_address
- .type _boot_address, @function
-_boot_address:
- /*
- * Stack setup.
- */
- lis %r1, __process_stack_end__@h
- ori %r1, %r1, __process_stack_end__@l
- li %r0, 0
- stwu %r0, -8(%r1)
- /*
- * Small sections registers initialization.
- */
- lis %r2, __sdata2_start__@h
- ori %r2, %r2, __sdata2_start__@l
- lis %r13, __sdata_start__@h
- ori %r13, %r13, __sdata_start__@l
- /*
- * Early initialization.
- */
- bl __early_init
- /*
- * BSS clearing.
- */
- lis %r4, __bss_start__@h
- ori %r4, %r4, __bss_start__@l
- lis %r5, __bss_end__@h
- ori %r5, %r5, __bss_end__@l
- li %r7, 0
-.bssloop:
- cmpl cr0, %r4, %r5
- bge cr0, .bssend
- stw %r7, 0(%r4)
- addi %r4, %r4, 4
- b .bssloop
-.bssend:
- /*
- * DATA initialization.
- */
- lis %r4, __romdata_start__@h
- ori %r4, %r4, __romdata_start__@l
- lis %r5, __data_start__@h
- ori %r5, %r5, __data_start__@l
- lis %r6, __data_end__@h
- ori %r6, %r6, __data_end__@l
-.dataloop:
- cmpl cr0, %r5, %r6
- bge cr0, .dataend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .dataloop
-.dataend:
- /*
- * Late initialization.
- */
- bl __late_init
- /*
- * Main program invocation.
- */
- bl main
- b _main_exit_handler
-
- /*
- * Default main exit code, infinite loop.
- */
- .weak _main_exit_handler
- .globl _main_exit_handler
- .type _main_exit_handler, @function
-_main_exit_handler:
- b _main_exit_handler
-
- /*
- * Default early initialization code, none.
- */
- .weak __early_init
- .globl __early_init
- .type __early_init, @function
-__early_init:
- blr
-
- /*
- * Default late initialization code, none.
- */
- .weak __late_init
- .globl __late_init
- .type __late_init, @function
-__late_init:
- blr
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/ivor.s b/os/ports/GCC/PPC/ivor.s deleted file mode 100644 index 46dc66bf5..000000000 --- a/os/ports/GCC/PPC/ivor.s +++ /dev/null @@ -1,224 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file PPC/ivor.s
- * @brief Kernel ISRs.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-/*
- * Imports the PPC configuration headers.
- */
-#define _FROM_ASM_
-#include "chconf.h"
-#include "chcore.h"
-
-#if !defined(__DOXYGEN__)
- /*
- * INTC registers address.
- */
- .equ INTC_IACKR, 0xfff48010
- .equ INTC_EOIR, 0xfff48018
-
- .section .handlers, "ax"
-
-#if PPC_SUPPORTS_DECREMENTER
- /*
- * _IVOR10 handler (Book-E decrementer).
- */
- .align 4
- .globl _IVOR10
- .type _IVOR10, @function
-_IVOR10:
- /* Creation of the external stack frame (extctx structure).*/
- stwu %sp, -80(%sp) /* Size of the extctx structure.*/
-#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
- e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
- e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
-#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- stw %r0, 32(%sp) /* Saves GPR0. */
- mfSRR0 %r0
- stw %r0, 8(%sp) /* Saves PC. */
- mfSRR1 %r0
- stw %r0, 12(%sp) /* Saves MSR. */
- mfCR %r0
- stw %r0, 16(%sp) /* Saves CR. */
- mfLR %r0
- stw %r0, 20(%sp) /* Saves LR. */
- mfCTR %r0
- stw %r0, 24(%sp) /* Saves CTR. */
- mfXER %r0
- stw %r0, 28(%sp) /* Saves XER. */
- stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
- stw %r4, 40(%sp)
- stw %r5, 44(%sp)
- stw %r6, 48(%sp)
- stw %r7, 52(%sp)
- stw %r8, 56(%sp)
- stw %r9, 60(%sp)
- stw %r10, 64(%sp)
- stw %r11, 68(%sp)
- stw %r12, 72(%sp)
-#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
-
- /* Reset DIE bit in TSR register.*/
- lis %r3, 0x0800 /* DIS bit mask. */
- mtspr 336, %r3 /* TSR register. */
-
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_enter_isr
- bl dbg_check_lock_from_isr
-#endif
- bl chSysTimerHandlerI
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock_from_isr
- bl dbg_check_leave_isr
-#endif
-
- /* System tick handler invocation.*/
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchIsPreemptionRequired
- cmpli cr0, %r3, 0
- beq cr0, _ivor_exit
- bl chSchDoReschedule
- b _ivor_exit
-#endif /* PPC_SUPPORTS_DECREMENTER */
-
- /*
- * _IVOR4 handler (Book-E external interrupt).
- */
- .align 4
- .globl _IVOR4
- .type _IVOR4, @function
-_IVOR4:
- /* Creation of the external stack frame (extctx structure).*/
- stwu %sp, -80(%sp) /* Size of the extctx structure.*/
-#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
- e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
- e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
-#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- stw %r0, 32(%sp) /* Saves GPR0. */
- mfSRR0 %r0
- stw %r0, 8(%sp) /* Saves PC. */
- mfSRR1 %r0
- stw %r0, 12(%sp) /* Saves MSR. */
- mfCR %r0
- stw %r0, 16(%sp) /* Saves CR. */
- mfLR %r0
- stw %r0, 20(%sp) /* Saves LR. */
- mfCTR %r0
- stw %r0, 24(%sp) /* Saves CTR. */
- mfXER %r0
- stw %r0, 28(%sp) /* Saves XER. */
- stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
- stw %r4, 40(%sp)
- stw %r5, 44(%sp)
- stw %r6, 48(%sp)
- stw %r7, 52(%sp)
- stw %r8, 56(%sp)
- stw %r9, 60(%sp)
- stw %r10, 64(%sp)
- stw %r11, 68(%sp)
- stw %r12, 72(%sp)
-#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
-
- /* Software vector address from the INTC register.*/
- lis %r3, INTC_IACKR@h
- ori %r3, %r3, INTC_IACKR@l /* IACKR register address. */
- lwz %r3, 0(%r3) /* IACKR register value. */
- lwz %r3, 0(%r3)
- mtCTR %r3 /* Software handler address. */
-
-#if PPC_USE_IRQ_PREEMPTION
- /* Allows preemption while executing the software handler.*/
- wrteei 1
-#endif
-
- /* Exectes the software handler.*/
- bctrl
-
-#if PPC_USE_IRQ_PREEMPTION
- /* Prevents preemption again.*/
- wrteei 0
-#endif
-
- /* Informs the INTC that the interrupt has been served.*/
- mbar 0
- lis %r3, INTC_EOIR@h
- ori %r3, %r3, INTC_EOIR@l
- stw %r3, 0(%r3) /* Writing any value should do. */
-
- /* Verifies if a reschedule is required.*/
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchIsPreemptionRequired
- cmpli cr0, %r3, 0
- beq cr0, _ivor_exit
- bl chSchDoReschedule
-
- /* Context restore.*/
- .globl _ivor_exit
-_ivor_exit:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
- e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
- e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
-#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
- lwz %r4, 40(%sp)
- lwz %r5, 44(%sp)
- lwz %r6, 48(%sp)
- lwz %r7, 52(%sp)
- lwz %r8, 56(%sp)
- lwz %r9, 60(%sp)
- lwz %r10, 64(%sp)
- lwz %r11, 68(%sp)
- lwz %r12, 72(%sp)
- lwz %r0, 8(%sp)
- mtSRR0 %r0 /* Restores PC. */
- lwz %r0, 12(%sp)
- mtSRR1 %r0 /* Restores MSR. */
- lwz %r0, 16(%sp)
- mtCR %r0 /* Restores CR. */
- lwz %r0, 20(%sp)
- mtLR %r0 /* Restores LR. */
- lwz %r0, 24(%sp)
- mtCTR %r0 /* Restores CTR. */
- lwz %r0, 28(%sp)
- mtXER %r0 /* Restores XER. */
- lwz %r0, 32(%sp) /* Restores GPR0. */
-#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- addi %sp, %sp, 80 /* Back to the previous frame. */
- rfi
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/ports/GCC/PPC/port.dox b/os/ports/GCC/PPC/port.dox deleted file mode 100644 index 9ea2c0449..000000000 --- a/os/ports/GCC/PPC/port.dox +++ /dev/null @@ -1,139 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup PPC Power Architecture
- * @details Power Architecture port for the GCC compiler.
- *
- * @section PPC_INTRO Introduction
- * This port supports cores implementing a 32 bits Power Architecture.
- *
- * @section PPC_STATES Mapping of the System States in the Power Architecture port
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the
- * PowerPC port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). Interrupts are enabled.
- * - <b>Suspended</b>. Interrupts are disabled.
- * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
- * Suspended state because there are no fast interrupts in this architecture.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wait</b>.
- * - <b>S-Locked</b>. Interrupts are disabled.
- * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
- * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The PowerPC has several non
- * maskable interrupt sources that can be associated to this state.
- * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- * .
- * @section PPC_NOTES The PowerPC port notes
- * The PowerPC port is organized as follow:
- * - The @p main() function is invoked in privileged mode.
- * - Each thread has a private stack with extra storage for interrupts
- * servicing.
- * - The Book-E Decrementer Timer, mapped on IVOR10, is used for system tick.
- * - Interrupt nesting is not currently supported.
- * .
- * @ingroup gcc
- */
-
-/**
- * @defgroup PPC_CONF Configuration Options
- * @details PowerPC Configuration Options. The PowerPC port allows some
- * architecture-specific configurations settings that can be overridden by
- * redefining them in @p chconf.h. Usually there is no need to change the
- * default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
- * by an interrupt handler between the @p extctx and @p intctx
- * structures.
- * The default for this value is @p 128 bytes, this space is allocated for
- * each thread so be careful in order to not waste precious RAM space.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread hook macro.
- * - @p ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the @p <b>wait</b>
- * instruction from within the idle loop. This is defaulted to 0 because
- * it can create problems with some debuggers. Setting this option to 1
- * reduces the system power requirements.
- * .
- * @ingroup PPC
- */
-
-/**
- * @defgroup PPC_CORE Core Port Implementation
- * @brief PowerPC specific port code, structures and macros.
- *
- * @ingroup PPC
- */
-
-/**
- * @defgroup PPC_STARTUP Startup Support
- * @brief
- * @details PPC startup code support. ChibiOS/RT provides its own generic
- * startup file for the PowerPC port.
- * Of course it is not mandatory to use it but care should be taken about the
- * startup phase details.
- *
- * @section PPC_STARTUP_1 Startup Process
- * The startup process, as implemented, is the following:
- * -# The stacks pointer is initialized into the area defined in the linker
- * script.
- * -# The IVPR register is setup according to the linker script.
- * -# The R2 and R13 registers are set to pointer to the SDA areas according
- * to the EABI specification.
- * -# An early initialization routine @p hwinit0 is invoked, if the symbol is
- * not defined then an empty default routine is executed (weak symbol).
- * -# DATA and BSS segments are initialized.
- * -# A late initialization routine @p hwinit1 is invoked, if the symbol not
- * defined then an empty default routine is executed (weak symbol).<br>
- * This late initialization function is also the proper place for a
- * @a bootloader, if your application requires one.
- * -# The @p main() function is invoked with the parameters @p argc and @p argv
- * set to zero.
- * -# Should the @p main() function return a branch is performed to the weak
- * symbol @p _main_exit_handler. The default code is an endless empty loop.
- * .
- * @section PPC_STARTUP_2 Expected linker symbols
- * The startup code starts at the symbol @p _boot_address and expects the
- * following symbols to be defined in the linker script:
- * - @p __ram_end__ RAM end location +1.
- * - @p __sdata2_start__ small constants data area
- * - @p __sdata_start__ small variables data area
- * - @p __romdata_start__ address of the data segment source read only data.
- * - @p __data_start__ data segment start location.
- * - @p __data_end__ data segment end location +1.
- * - @p __bss_start__ BSS start location.
- * - @p __bss_end__ BSS end location +1.
- * - @p __ivpr_base__ IVPR register initialization address.
- * .
- * @ingroup PPC
- */
-
-/**
- * @defgroup PPC_SPECIFIC Specific Implementations
- * @details Platform-specific port code.
- *
- * @ingroup PPC
- */
diff --git a/os/ports/GCC/PPC/rules.mk b/os/ports/GCC/PPC/rules.mk deleted file mode 100644 index 4b765c5b7..000000000 --- a/os/ports/GCC/PPC/rules.mk +++ /dev/null @@ -1,182 +0,0 @@ -# PPC makefile scripts and rules.
-
-# Output directory and files
-ifeq ($(BUILDDIR),)
- BUILDDIR = build
-endif
-ifeq ($(BUILDDIR),.)
- BUILDDIR = build
-endif
-OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
- $(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp
-
-# Automatic compiler options
-OPT = $(USE_OPT)
-COPT = $(USE_COPT)
-CPPOPT = $(USE_CPPOPT)
-ifeq ($(USE_LINK_GC),yes)
- OPT += -ffunction-sections -fdata-sections
-endif
-
-# VLE option handling.
-ifeq ($(USE_VLE),yes)
- DDEFS += -DPPC_USE_VLE=1
- DADEFS += -DPPC_USE_VLE=1
- MCU += -mvle
-else
- DDEFS += -DPPC_USE_VLE=0
- DADEFS += -DPPC_USE_VLE=0
-endif
-
-# Source files groups and paths
-SRC = $(CSRC)$(CPPSRC)
-SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(SRC)))
-
-# Various directories
-OBJDIR = $(BUILDDIR)/obj
-LSTDIR = $(BUILDDIR)/lst
-
-# Object files groups
-COBJS = $(addprefix $(OBJDIR)/, $(notdir $(CSRC:.c=.o)))
-CPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(CPPSRC:.cpp=.o)))
-ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
-ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
-OBJS = $(ASMXOBJS) $(ASMOBJS) $(COBJS) $(CPPOBJS)
-
-# Paths
-IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
-LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-
-# Macros
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-
-# Libs
-LIBS = $(DLIBS) $(ULIBS)
-
-# Various settings
-MCFLAGS = -mcpu=$(MCU)
-ODFLAGS = -x --syms
-ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
-ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
-CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
-CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
-ifeq ($(USE_LINK_GC),yes)
-GCLDFLAGS = ,--gc-sections
-else
-GCLDFLAGS =
-endif
-ifneq ($(USE_LDOPT),)
-XLDFLAGS =,$(USE_LDOPT)
-else
-XLDFLAGS =
-endif
-LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch$(GCLDFLAGS)$(XLDFLAGS) $(LLIBDIR)
-
-# Generate dependency information
-CFLAGS += -MD -MP -MF .dep/$(@F).d
-CPPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-# Paths where to search for sources
-VPATH = $(SRCPATHS)
-
-#
-# Makefile rules
-#
-
-all: $(OBJS) $(OUTFILES) MAKE_ALL_RULE_HOOK
-
-MAKE_ALL_RULE_HOOK:
-
-$(OBJS): | $(BUILDDIR)
-
-$(BUILDDIR) $(OBJDIR) $(LSTDIR):
-ifneq ($(USE_VERBOSE_COMPILE),yes)
- @echo Compiler Options
- @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
- @echo
-endif
- mkdir -p $(OBJDIR)
- mkdir -p $(LSTDIR)
-
-$(CPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(COBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(ASXFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(ASXFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-%.elf: $(OBJS) $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-else
- @echo Linking $@
- @$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-endif
-
-%.hex: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(HEX) $< $@
-else
- @echo Creating $@
- @$(HEX) $< $@
-endif
-
-%.bin: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(BIN) $< $@
-else
- @echo Creating $@
- @$(BIN) $< $@
-endif
-
-%.dmp: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) $(ODFLAGS) $< > $@
-else
- @echo Creating $@
- @$(OD) $(ODFLAGS) $< > $@
- @echo Done
-endif
-
-clean:
- @echo Cleaning
- -rm -fR .dep $(BUILDDIR)
- @echo Done
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF ***
diff --git a/os/ports/GCC/SIMIA32/chcore.c b/os/ports/GCC/SIMIA32/chcore.c deleted file mode 100644 index c8f0f36f4..000000000 --- a/os/ports/GCC/SIMIA32/chcore.c +++ /dev/null @@ -1,86 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @addtogroup SIMIA32_CORE
- * @{
- */
-
-#include <stdlib.h>
-
-#include "ch.h"
-#include "hal.h"
-
-/**
- * Performs a context switch between two threads.
- * @param otp the thread to be switched out
- * @param ntp the thread to be switched in
- */
-__attribute__((used))
-static void __dummy(Thread *ntp, Thread *otp) {
- (void)ntp; (void)otp;
-
- asm volatile (
-#if defined(WIN32)
- ".globl @port_switch@8 \n\t"
- "@port_switch@8:"
-#elif defined(__APPLE__)
- ".globl _port_switch \n\t"
- "_port_switch:"
-#else
- ".globl port_switch \n\t"
- "port_switch:"
-#endif
- "push %ebp \n\t"
- "push %esi \n\t"
- "push %edi \n\t"
- "push %ebx \n\t"
- "movl %esp, 12(%edx) \n\t"
- "movl 12(%ecx), %esp \n\t"
- "pop %ebx \n\t"
- "pop %edi \n\t"
- "pop %esi \n\t"
- "pop %ebp \n\t"
- "ret");
-}
-
-/**
- * Halts the system. In this implementation it just exits the simulation.
- */
-__attribute__((fastcall))
-void port_halt(void) {
-
- exit(2);
-}
-
-/**
- * @brief Start a thread by invoking its work function.
- * @details If the work function returns @p chThdExit() is automatically
- * invoked.
- */
-__attribute__((cdecl, noreturn))
-void _port_thread_start(msg_t (*pf)(void *), void *p) {
-
- chSysUnlock();
- chThdExit(pf(p));
- while(1);
-}
-
-/** @} */
diff --git a/os/ports/GCC/SIMIA32/chcore.h b/os/ports/GCC/SIMIA32/chcore.h deleted file mode 100644 index 5161688da..000000000 --- a/os/ports/GCC/SIMIA32/chcore.h +++ /dev/null @@ -1,243 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @addtogroup SIMIA32_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/**
- * Macro defining the a simulated architecture into x86.
- */
-#define CH_ARCHITECTURE_SIMIA32
-
-/**
- * Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "Simulator"
-
-/**
- * @brief Name of the architecture variant (optional).
- */
-#define CH_CORE_VARIANT_NAME "x86 (integer only)"
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "GCC " __VERSION__
-
-/**
- * @brief Port-specific information string.
- */
-#define CH_PORT_INFO "No preemption"
-
-/**
- * 16 bytes stack alignment.
- */
-typedef struct {
- uint8_t a[16];
-} stkalign_t __attribute__((aligned(16)));
-
-/**
- * Generic x86 register.
- */
-typedef void *regx86;
-
-/**
- * Interrupt saved context.
- * This structure represents the stack frame saved during a preemption-capable
- * interrupt handler.
- */
-struct extctx {
-};
-
-/**
- * System saved context.
- * @note In this demo the floating point registers are not saved.
- */
-struct intctx {
- regx86 ebx;
- regx86 edi;
- regx86 esi;
- regx86 ebp;
- regx86 eip;
-};
-
-/**
- * Platform dependent part of the @p Thread structure.
- * This structure usually contains just the saved stack pointer defined as a
- * pointer to a @p intctx structure.
- */
-struct context {
- struct intctx volatile *esp;
-};
-
-#define APUSH(p, a) (p) -= sizeof(void *), *(void **)(p) = (void*)(a)
-
-/* Darwin requires the stack to be aligned to a 16-byte boundary at
- * the time of a call instruction (in case the called function needs
- * to save MMX registers). This aligns to 'mod' module 16, so that we'll end
- * up with the right alignment after pushing the args. */
-#define AALIGN(p, mask, mod) p = (void *)((((uintptr_t)(p) - mod) & ~mask) + mod)
-
-/**
- * Platform dependent part of the @p chThdCreateI() API.
- * This code usually setup the context switching frame represented by a
- * @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- uint8_t *esp = (uint8_t *)workspace + wsize; \
- APUSH(esp, 0); \
- uint8_t *savebp = esp; \
- AALIGN(esp, 15, 8); \
- APUSH(esp, arg); \
- APUSH(esp, pf); \
- APUSH(esp, 0); \
- esp -= sizeof(struct intctx); \
- ((struct intctx *)esp)->eip = _port_thread_start; \
- ((struct intctx *)esp)->ebx = 0; \
- ((struct intctx *)esp)->edi = 0; \
- ((struct intctx *)esp)->esi = 0; \
- ((struct intctx *)esp)->ebp = savebp; \
- tp->p_ctx.esp = (struct intctx *)esp; \
-}
-
-/**
- * Stack size for the system idle thread.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 256
-#endif
-
-/**
- * Per-thread stack overhead for interrupts servicing, it is used in the
- * calculation of the correct working area size.
- * It requires stack space because the simulated "interrupt handlers" can
- * invoke host library functions inside so it better have a lot of space.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 16384
-#endif
-
-/**
- * Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
- /**
- * Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(void *) * 4 + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * Macro used to allocate a thread working area aligned as both position and
- * size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * IRQ prologue code, inserted at the start of all IRQ handlers enabled to
- * invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * IRQ epilogue code, inserted at the end of all IRQ handlers enabled to
- * invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE()
-
-/**
- * IRQ handler function declaration.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * Simulator initialization.
- */
-#define port_init()
-
-/**
- * Does nothing in this simulator.
- */
-#define port_lock() asm volatile("nop")
-
-/**
- * Does nothing in this simulator.
- */
-#define port_unlock() asm volatile("nop")
-
-/**
- * Does nothing in this simulator.
- */
-#define port_lock_from_isr()
-
-/**
- * Does nothing in this simulator.
- */
-#define port_unlock_from_isr()
-
-/**
- * Does nothing in this simulator.
- */
-#define port_disable()
-
-/**
- * Does nothing in this simulator.
- */
-#define port_suspend()
-
-/**
- * Does nothing in this simulator.
- */
-#define port_enable()
-
-/**
- * In the simulator this does a polling pass on the simulated interrupt
- * sources.
- */
-#define port_wait_for_interrupt() ChkIntSources()
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- __attribute__((fastcall)) void port_switch(Thread *ntp, Thread *otp);
- __attribute__((fastcall)) void port_halt(void);
- __attribute__((cdecl, noreturn)) void _port_thread_start(msg_t (*pf)(void *),
- void *p);
- void ChkIntSources(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/GCC/SIMIA32/chtypes.h b/os/ports/GCC/SIMIA32/chtypes.h deleted file mode 100644 index b10eed325..000000000 --- a/os/ports/GCC/SIMIA32/chtypes.h +++ /dev/null @@ -1,70 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Event Id. */
-typedef uint32_t eventmask_t; /**< Event mask. */
-typedef uint32_t flagsmask_t; /**< Event flags. */
-typedef uint32_t systime_t; /**< System time. */
-typedef int32_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note It uses the "packed" GCC attribute.
- */
-#define PACK_STRUCT_STRUCT __attribute__((packed))
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
diff --git a/os/ports/GCC/SIMIA32/port.mk b/os/ports/GCC/SIMIA32/port.mk deleted file mode 100644 index 8f053abc4..000000000 --- a/os/ports/GCC/SIMIA32/port.mk +++ /dev/null @@ -1,6 +0,0 @@ -# List of the ChibiOS/RT SIMIA32 port files.
-PORTSRC = ${CHIBIOS}/os/ports/GCC/SIMIA32/chcore.c
-
-PORTASM =
-
-PORTINC = ${CHIBIOS}/os/ports/GCC/SIMIA32
diff --git a/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h b/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h deleted file mode 100644 index 4283ae860..000000000 --- a/os/ports/IAR/ARMCMx/LPC11xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/LPC11xx/cmparams.h
- * @brief ARM Cortex-M0 parameters for the LPC11xx.
- *
- * @defgroup IAR_ARMCMx_LPC11xx LPC11xx Specific Parameters
- * @ingroup IAR_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0 specific parameters for the
- * LPC11xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/LPC11xx/vectors.s b/os/ports/IAR/ARMCMx/LPC11xx/vectors.s deleted file mode 100644 index 633313f52..000000000 --- a/os/ports/IAR/ARMCMx/LPC11xx/vectors.s +++ /dev/null @@ -1,187 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- MODULE ?vectors
-
- AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
- PRESERVE8
-
- SECTION IRQSTACK:DATA:NOROOT(3)
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-
-__vector_table:
- DCD SFE(IRQSTACK)
- DCD __iar_program_start
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
-
-/*
- * Default interrupt handlers.
- */
- PUBWEAK NMIVector
- PUBWEAK HardFaultVector
- PUBWEAK MemManageVector
- PUBWEAK BusFaultVector
- PUBWEAK UsageFaultVector
- PUBWEAK Vector1C
- PUBWEAK Vector20
- PUBWEAK Vector24
- PUBWEAK Vector28
- PUBWEAK SVCallVector
- PUBWEAK DebugMonitorVector
- PUBWEAK Vector34
- PUBWEAK PendSVVector
- PUBWEAK SysTickVector
- PUBWEAK Vector40
- PUBWEAK Vector44
- PUBWEAK Vector48
- PUBWEAK Vector4C
- PUBWEAK Vector50
- PUBWEAK Vector54
- PUBWEAK Vector58
- PUBWEAK Vector5C
- PUBWEAK Vector60
- PUBWEAK Vector64
- PUBWEAK Vector68
- PUBWEAK Vector6C
- PUBWEAK Vector70
- PUBWEAK Vector74
- PUBWEAK Vector78
- PUBWEAK Vector7C
- PUBWEAK Vector80
- PUBWEAK Vector84
- PUBWEAK Vector88
- PUBWEAK Vector8C
- PUBWEAK Vector90
- PUBWEAK Vector94
- PUBWEAK Vector98
- PUBWEAK Vector9C
- PUBWEAK VectorA0
- PUBWEAK VectorA4
- PUBWEAK VectorA8
- PUBWEAK VectorAC
- PUBWEAK VectorB0
- PUBWEAK VectorB4
- PUBWEAK VectorB8
- PUBWEAK VectorBC
- PUBLIC _unhandled_exception
-
- SECTION .text:CODE:REORDER(1)
- THUMB
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-_unhandled_exception
- b _unhandled_exception
-
- END
diff --git a/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h b/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h deleted file mode 100644 index 5019bacda..000000000 --- a/os/ports/IAR/ARMCMx/LPC13xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/LPC13xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the LPC13xx.
- *
- * @defgroup IAR_ARMCMx_LPC13xx LPC13xx Specific Parameters
- * @ingroup IAR_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * LPC13xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 3
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/LPC13xx/vectors.s b/os/ports/IAR/ARMCMx/LPC13xx/vectors.s deleted file mode 100644 index 21ea588c3..000000000 --- a/os/ports/IAR/ARMCMx/LPC13xx/vectors.s +++ /dev/null @@ -1,265 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- MODULE ?vectors
-
- AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
- PRESERVE8
-
- SECTION IRQSTACK:DATA:NOROOT(3)
- SECTION .intvec:CODE:NOROOT(2)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-
-__vector_table:
- DCD SFE(IRQSTACK)
- DCD __iar_program_start
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
- DCD VectorEC
- DCD VectorF0
- DCD VectorF4
- DCD VectorF8
- DCD VectorFC
- DCD Vector100
- DCD Vector104
- DCD Vector108
- DCD Vector10C
- DCD Vector110
- DCD Vector114
- DCD Vector118
- DCD Vector11C
- DCD Vector120
- DCD Vector124
-
-/*
- * Default interrupt handlers.
- */
- PUBWEAK NMIVector
- PUBWEAK HardFaultVector
- PUBWEAK MemManageVector
- PUBWEAK BusFaultVector
- PUBWEAK UsageFaultVector
- PUBWEAK Vector1C
- PUBWEAK Vector20
- PUBWEAK Vector24
- PUBWEAK Vector28
- PUBWEAK SVCallVector
- PUBWEAK DebugMonitorVector
- PUBWEAK Vector34
- PUBWEAK PendSVVector
- PUBWEAK SysTickVector
- PUBWEAK Vector40
- PUBWEAK Vector44
- PUBWEAK Vector48
- PUBWEAK Vector4C
- PUBWEAK Vector50
- PUBWEAK Vector54
- PUBWEAK Vector58
- PUBWEAK Vector5C
- PUBWEAK Vector60
- PUBWEAK Vector64
- PUBWEAK Vector68
- PUBWEAK Vector6C
- PUBWEAK Vector70
- PUBWEAK Vector74
- PUBWEAK Vector78
- PUBWEAK Vector7C
- PUBWEAK Vector80
- PUBWEAK Vector84
- PUBWEAK Vector88
- PUBWEAK Vector8C
- PUBWEAK Vector90
- PUBWEAK Vector94
- PUBWEAK Vector98
- PUBWEAK Vector9C
- PUBWEAK VectorA0
- PUBWEAK VectorA4
- PUBWEAK VectorA8
- PUBWEAK VectorAC
- PUBWEAK VectorB0
- PUBWEAK VectorB4
- PUBWEAK VectorB8
- PUBWEAK VectorBC
- PUBWEAK VectorC0
- PUBWEAK VectorC4
- PUBWEAK VectorC8
- PUBWEAK VectorCC
- PUBWEAK VectorD0
- PUBWEAK VectorD4
- PUBWEAK VectorD8
- PUBWEAK VectorDC
- PUBWEAK VectorE0
- PUBWEAK VectorE4
- PUBWEAK VectorE8
- PUBWEAK VectorEC
- PUBWEAK VectorF0
- PUBWEAK VectorF4
- PUBWEAK VectorF8
- PUBWEAK VectorFC
- PUBWEAK Vector100
- PUBWEAK Vector104
- PUBWEAK Vector108
- PUBWEAK Vector10C
- PUBWEAK Vector110
- PUBWEAK Vector114
- PUBWEAK Vector118
- PUBWEAK Vector11C
- PUBWEAK Vector120
- PUBWEAK Vector124
- PUBLIC _unhandled_exception
-
- SECTION .text:CODE:REORDER(1)
- THUMB
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-VectorF4
-VectorF8
-VectorFC
-Vector100
-Vector104
-Vector108
-Vector10C
-Vector110
-Vector114
-Vector118
-Vector11C
-Vector120
-Vector124
-_unhandled_exception
- b _unhandled_exception
-
- END
diff --git a/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h deleted file mode 100644 index 4f44a6827..000000000 --- a/os/ports/IAR/ARMCMx/STM32F1xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/STM32F1xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F1xx.
- *
- * @defgroup IAR_ARMCMx_STM32F1xx STM32F1xx Specific Parameters
- * @ingroup IAR_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * STM32F1xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/STM32F1xx/vectors.s b/os/ports/IAR/ARMCMx/STM32F1xx/vectors.s deleted file mode 100644 index 1d660d55d..000000000 --- a/os/ports/IAR/ARMCMx/STM32F1xx/vectors.s +++ /dev/null @@ -1,310 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#if !defined(STM32F10X_LD) && !defined(STM32F10X_LD_VL) && \
- !defined(STM32F10X_MD) && !defined(STM32F10X_MD_VL) && \
- !defined(STM32F10X_HD) && !defined(STM32F10X_XL) && \
- !defined(STM32F10X_CL)
-#define _FROM_ASM_
-#include "board.h"
-#endif
-
- MODULE ?vectors
-
- AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
- PRESERVE8
-
- SECTION IRQSTACK:DATA:NOROOT(3)
- SECTION .intvec:CODE:NOROOT(3)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-
-__vector_table:
- DCD SFE(IRQSTACK)
- DCD __iar_program_start
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
-#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
- defined(STM32F10X_XL) || defined(STM32F10X_CL)
- DCD VectorEC
- DCD VectorF0
- DCD VectorF4
-#endif
-#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
- DCD VectorF8
- DCD VectorFC
- DCD Vector100
- DCD Vector104
- DCD Vector108
- DCD Vector10C
- DCD Vector110
- DCD Vector114
- DCD Vector118
- DCD Vector11C
- DCD Vector120
- DCD Vector124
- DCD Vector128
- DCD Vector12C
-#endif
-#if defined(STM32F10X_CL)
- DCD Vector130
- DCD Vector134
- DCD Vector138
- DCD Vector13C
- DCD Vector140
- DCD Vector144
- DCD Vector148
- DCD Vector14C
-#endif
-
-/*
- * Default interrupt handlers.
- */
- PUBWEAK NMIVector
- PUBWEAK HardFaultVector
- PUBWEAK MemManageVector
- PUBWEAK BusFaultVector
- PUBWEAK UsageFaultVector
- PUBWEAK Vector1C
- PUBWEAK Vector20
- PUBWEAK Vector24
- PUBWEAK Vector28
- PUBWEAK SVCallVector
- PUBWEAK DebugMonitorVector
- PUBWEAK Vector34
- PUBWEAK PendSVVector
- PUBWEAK SysTickVector
- PUBWEAK Vector40
- PUBWEAK Vector44
- PUBWEAK Vector48
- PUBWEAK Vector4C
- PUBWEAK Vector50
- PUBWEAK Vector54
- PUBWEAK Vector58
- PUBWEAK Vector5C
- PUBWEAK Vector60
- PUBWEAK Vector64
- PUBWEAK Vector68
- PUBWEAK Vector6C
- PUBWEAK Vector70
- PUBWEAK Vector74
- PUBWEAK Vector78
- PUBWEAK Vector7C
- PUBWEAK Vector80
- PUBWEAK Vector84
- PUBWEAK Vector88
- PUBWEAK Vector8C
- PUBWEAK Vector90
- PUBWEAK Vector94
- PUBWEAK Vector98
- PUBWEAK Vector9C
- PUBWEAK VectorA0
- PUBWEAK VectorA4
- PUBWEAK VectorA8
- PUBWEAK VectorAC
- PUBWEAK VectorB0
- PUBWEAK VectorB4
- PUBWEAK VectorB8
- PUBWEAK VectorBC
- PUBWEAK VectorC0
- PUBWEAK VectorC4
- PUBWEAK VectorC8
- PUBWEAK VectorCC
- PUBWEAK VectorD0
- PUBWEAK VectorD4
- PUBWEAK VectorD8
- PUBWEAK VectorDC
- PUBWEAK VectorE0
- PUBWEAK VectorE4
- PUBWEAK VectorE8
- PUBWEAK VectorEC
- PUBWEAK VectorF0
- PUBWEAK VectorF4
- PUBWEAK VectorF8
- PUBWEAK VectorFC
- PUBWEAK Vector100
- PUBWEAK Vector104
- PUBWEAK Vector108
- PUBWEAK Vector10C
- PUBWEAK Vector110
- PUBWEAK Vector114
- PUBWEAK Vector118
- PUBWEAK Vector11C
- PUBWEAK Vector120
- PUBWEAK Vector124
- PUBWEAK Vector128
- PUBWEAK Vector12C
- PUBWEAK Vector130
- PUBWEAK Vector134
- PUBWEAK Vector138
- PUBWEAK Vector13C
- PUBWEAK Vector140
- PUBWEAK Vector144
- PUBWEAK Vector148
- PUBWEAK Vector14C
- PUBLIC _unhandled_exception
-
- SECTION .text:CODE:REORDER(1)
- THUMB
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-VectorF4
-VectorF8
-VectorFC
-Vector100
-Vector104
-Vector108
-Vector10C
-Vector110
-Vector114
-Vector118
-Vector11C
-Vector120
-Vector124
-Vector128
-Vector12C
-Vector130
-Vector134
-Vector138
-Vector13C
-Vector140
-Vector144
-Vector148
-Vector14C
-_unhandled_exception
- b _unhandled_exception
-
- END
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h deleted file mode 100644 index 2d56050c2..000000000 --- a/os/ports/IAR/ARMCMx/STM32F4xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/STM32F4xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F4xx.
- *
- * @defgroup IAR_ARMCMx_STM32F4xx STM32F4xx Specific Parameters
- * @ingroup IAR_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * STM32F4xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU TRUE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/STM32F4xx/vectors.s b/os/ports/IAR/ARMCMx/STM32F4xx/vectors.s deleted file mode 100644 index 3021cd421..000000000 --- a/os/ports/IAR/ARMCMx/STM32F4xx/vectors.s +++ /dev/null @@ -1,337 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- MODULE ?vectors
-
- AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
- PRESERVE8
-
- SECTION IRQSTACK:DATA:NOROOT(3)
- SECTION .intvec:CODE:NOROOT(3)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-
-__vector_table:
- DCD SFE(IRQSTACK)
- DCD __iar_program_start
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
- DCD VectorEC
- DCD VectorF0
- DCD VectorF4
- DCD VectorF8
- DCD VectorFC
- DCD Vector100
- DCD Vector104
- DCD Vector108
- DCD Vector10C
- DCD Vector110
- DCD Vector114
- DCD Vector118
- DCD Vector11C
- DCD Vector120
- DCD Vector124
- DCD Vector128
- DCD Vector12C
- DCD Vector130
- DCD Vector134
- DCD Vector138
- DCD Vector13C
- DCD Vector140
- DCD Vector144
- DCD Vector148
- DCD Vector14C
- DCD Vector150
- DCD Vector154
- DCD Vector158
- DCD Vector15C
- DCD Vector160
- DCD Vector164
- DCD Vector168
- DCD Vector16C
- DCD Vector170
- DCD Vector174
- DCD Vector178
- DCD Vector17C
- DCD Vector180
- DCD Vector184
-
-/*
- * Default interrupt handlers.
- */
- PUBWEAK NMIVector
- PUBWEAK HardFaultVector
- PUBWEAK MemManageVector
- PUBWEAK BusFaultVector
- PUBWEAK UsageFaultVector
- PUBWEAK Vector1C
- PUBWEAK Vector20
- PUBWEAK Vector24
- PUBWEAK Vector28
- PUBWEAK SVCallVector
- PUBWEAK DebugMonitorVector
- PUBWEAK Vector34
- PUBWEAK PendSVVector
- PUBWEAK SysTickVector
- PUBWEAK Vector40
- PUBWEAK Vector44
- PUBWEAK Vector48
- PUBWEAK Vector4C
- PUBWEAK Vector50
- PUBWEAK Vector54
- PUBWEAK Vector58
- PUBWEAK Vector5C
- PUBWEAK Vector60
- PUBWEAK Vector64
- PUBWEAK Vector68
- PUBWEAK Vector6C
- PUBWEAK Vector70
- PUBWEAK Vector74
- PUBWEAK Vector78
- PUBWEAK Vector7C
- PUBWEAK Vector80
- PUBWEAK Vector84
- PUBWEAK Vector88
- PUBWEAK Vector8C
- PUBWEAK Vector90
- PUBWEAK Vector94
- PUBWEAK Vector98
- PUBWEAK Vector9C
- PUBWEAK VectorA0
- PUBWEAK VectorA4
- PUBWEAK VectorA8
- PUBWEAK VectorAC
- PUBWEAK VectorB0
- PUBWEAK VectorB4
- PUBWEAK VectorB8
- PUBWEAK VectorBC
- PUBWEAK VectorC0
- PUBWEAK VectorC4
- PUBWEAK VectorC8
- PUBWEAK VectorCC
- PUBWEAK VectorD0
- PUBWEAK VectorD4
- PUBWEAK VectorD8
- PUBWEAK VectorDC
- PUBWEAK VectorE0
- PUBWEAK VectorE4
- PUBWEAK VectorE8
- PUBWEAK VectorEC
- PUBWEAK VectorF0
- PUBWEAK VectorF4
- PUBWEAK VectorF8
- PUBWEAK VectorFC
- PUBWEAK Vector100
- PUBWEAK Vector104
- PUBWEAK Vector108
- PUBWEAK Vector10C
- PUBWEAK Vector110
- PUBWEAK Vector114
- PUBWEAK Vector118
- PUBWEAK Vector11C
- PUBWEAK Vector120
- PUBWEAK Vector124
- PUBWEAK Vector128
- PUBWEAK Vector12C
- PUBWEAK Vector130
- PUBWEAK Vector134
- PUBWEAK Vector138
- PUBWEAK Vector13C
- PUBWEAK Vector140
- PUBWEAK Vector144
- PUBWEAK Vector148
- PUBWEAK Vector14C
- PUBWEAK Vector150
- PUBWEAK Vector154
- PUBWEAK Vector158
- PUBWEAK Vector15C
- PUBWEAK Vector160
- PUBWEAK Vector164
- PUBWEAK Vector168
- PUBWEAK Vector16C
- PUBWEAK Vector170
- PUBWEAK Vector174
- PUBWEAK Vector178
- PUBWEAK Vector17C
- PUBWEAK Vector180
- PUBWEAK Vector184
- PUBLIC _unhandled_exception
-
- SECTION .text:CODE:REORDER(1)
- THUMB
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-VectorF4
-VectorF8
-VectorFC
-Vector100
-Vector104
-Vector108
-Vector10C
-Vector110
-Vector114
-Vector118
-Vector11C
-Vector120
-Vector124
-Vector128
-Vector12C
-Vector130
-Vector134
-Vector138
-Vector13C
-Vector140
-Vector144
-Vector148
-Vector14C
-Vector150
-Vector154
-Vector158
-Vector15C
-Vector160
-Vector164
-Vector168
-Vector16C
-Vector170
-Vector174
-Vector178
-Vector17C
-Vector180
-Vector184
-_unhandled_exception
- b _unhandled_exception
-
- END
diff --git a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h deleted file mode 100644 index 9cd591e03..000000000 --- a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/STM32L1xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32L1xx.
- *
- * @defgroup IAR_ARMCMx_STM32L1xx STM32L1xx Specific Parameters
- * @ingroup IAR_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * STM32L1xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/STM32L1xx/vectors.s b/os/ports/IAR/ARMCMx/STM32L1xx/vectors.s deleted file mode 100644 index 85f9d390f..000000000 --- a/os/ports/IAR/ARMCMx/STM32L1xx/vectors.s +++ /dev/null @@ -1,231 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#if !defined(STM32L1XX_MD)
-#define _FROM_ASM_
-#include "board.h"
-#endif
-
- MODULE ?vectors
-
- AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
- PRESERVE8
-
- SECTION IRQSTACK:DATA:NOROOT(3)
- SECTION .intvec:CODE:NOROOT(3)
-
- EXTERN __iar_program_start
- PUBLIC __vector_table
-
- DATA
-
-__vector_table:
- DCD SFE(IRQSTACK)
- DCD __iar_program_start
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
- DCD VectorEC
- DCD VectorF0
-
-/*
- * Default interrupt handlers.
- */
- PUBWEAK NMIVector
- PUBWEAK HardFaultVector
- PUBWEAK MemManageVector
- PUBWEAK BusFaultVector
- PUBWEAK UsageFaultVector
- PUBWEAK Vector1C
- PUBWEAK Vector20
- PUBWEAK Vector24
- PUBWEAK Vector28
- PUBWEAK SVCallVector
- PUBWEAK DebugMonitorVector
- PUBWEAK Vector34
- PUBWEAK PendSVVector
- PUBWEAK SysTickVector
- PUBWEAK Vector40
- PUBWEAK Vector44
- PUBWEAK Vector48
- PUBWEAK Vector4C
- PUBWEAK Vector50
- PUBWEAK Vector54
- PUBWEAK Vector58
- PUBWEAK Vector5C
- PUBWEAK Vector60
- PUBWEAK Vector64
- PUBWEAK Vector68
- PUBWEAK Vector6C
- PUBWEAK Vector70
- PUBWEAK Vector74
- PUBWEAK Vector78
- PUBWEAK Vector7C
- PUBWEAK Vector80
- PUBWEAK Vector84
- PUBWEAK Vector88
- PUBWEAK Vector8C
- PUBWEAK Vector90
- PUBWEAK Vector94
- PUBWEAK Vector98
- PUBWEAK Vector9C
- PUBWEAK VectorA0
- PUBWEAK VectorA4
- PUBWEAK VectorA8
- PUBWEAK VectorAC
- PUBWEAK VectorB0
- PUBWEAK VectorB4
- PUBWEAK VectorB8
- PUBWEAK VectorBC
- PUBWEAK VectorC0
- PUBWEAK VectorC4
- PUBWEAK VectorC8
- PUBWEAK VectorCC
- PUBWEAK VectorD0
- PUBWEAK VectorD4
- PUBWEAK VectorD8
- PUBWEAK VectorDC
- PUBWEAK VectorE0
- PUBWEAK VectorE4
- PUBWEAK VectorE8
- PUBWEAK VectorEC
- PUBWEAK VectorF0
- PUBLIC _unhandled_exception
-
- SECTION .text:CODE:REORDER(1)
- THUMB
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-_unhandled_exception
- b _unhandled_exception
-
- END
diff --git a/os/ports/IAR/ARMCMx/chcore.c b/os/ports/IAR/ARMCMx/chcore.c deleted file mode 100644 index e89084c97..000000000 --- a/os/ports/IAR/ARMCMx/chcore.c +++ /dev/null @@ -1,46 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chcore.c
- * @brief ARM Cortex-Mx port code.
- *
- * @addtogroup IAR_ARMCMx_CORE
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Halts the system.
- * @note The function is declared as a weak symbol, it is possible
- * to redefine it in your application code.
- */
-#if !defined(__DOXYGEN__)
-__weak
-#endif
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/chcore.h b/os/ports/IAR/ARMCMx/chcore.h deleted file mode 100644 index 3fd627715..000000000 --- a/os/ports/IAR/ARMCMx/chcore.h +++ /dev/null @@ -1,189 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chcore.h
- * @brief ARM Cortex-Mx port macros and structures.
- *
- * @addtogroup IAR_ARMCMx_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-/*===========================================================================*/
-/* Port constants (common). */
-/*===========================================================================*/
-
-/* Added to make the header stand-alone when included from asm.*/
-#ifndef FALSE
-#define FALSE 0
-#endif
-#ifndef TRUE
-#define TRUE (!FALSE)
-#endif
-
-#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
-#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */
-#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
-#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
-
-/* Inclusion of the Cortex-Mx implementation specific parameters.*/
-#include "cmparams.h"
-
-/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
- (CORTEX_MODEL == CORTEX_M4)
-#elif (CORTEX_MODEL == CORTEX_M1)
-#error "untested Cortex-M model"
-#else
-#error "unknown or unsupported Cortex-M model"
-#endif
-
-/**
- * @brief Total priority levels.
- */
-#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS)
-
-/**
- * @brief Minimum priority level.
- * @details This minimum priority level is calculated from the number of
- * priority bits supported by the specific Cortex-Mx implementation.
- */
-#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1)
-
-/**
- * @brief Maximum priority level.
- * @details The maximum allowed priority level is always zero.
- */
-#define CORTEX_MAXIMUM_PRIORITY 0
-
-/*===========================================================================*/
-/* Port macros (common). */
-/*===========================================================================*/
-
-/**
- * @brief Priority level verification macro.
- */
-#define CORTEX_IS_VALID_PRIORITY(n) \
- (((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
-
-/**
- * @brief Priority level verification macro.
- */
-#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
- (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
-
-/**
- * @brief Priority level to priority mask conversion macro.
- */
-#define CORTEX_PRIORITY_MASK(n) \
- ((n) << (8 - CORTEX_PRIORITY_BITS))
-
-/*===========================================================================*/
-/* Port configurable parameters (common). */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port derived parameters (common). */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port exported info (common). */
-/*===========================================================================*/
-
-/**
- * @brief Macro defining a generic ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "IAR"
-
-/*===========================================================================*/
-/* Port implementation part (common). */
-/*===========================================================================*/
-
-/* Includes the sub-architecture-specific part.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M1)
-#include "chcore_v6m.h"
-#elif (CORTEX_MODEL == CORTEX_M3) || (CORTEX_MODEL == CORTEX_M4)
-#include "chcore_v7m.h"
-#endif
-
-#if !defined(_FROM_ASM_)
-
-#include <intrinsics.h>
-#include "nvic.h"
-
-/* The following declarations are there just for Doxygen documentation, the
- real declarations are inside the sub-headers.*/
-#if defined(__DOXYGEN__)
-
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note It is implemented to match the Cortex-Mx exception context.
- */
-struct extctx {};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
-struct intctx {};
-
-#endif /* defined(__DOXYGEN__) */
-
-/**
- * @brief Excludes the default @p chSchIsPreemptionRequired()implementation.
- */
-#define PORT_OPTIMIZED_ISPREEMPTIONREQUIRED
-
-#if (CH_CFG_TIME_QUANTUM > 0) || defined(__DOXYGEN__)
-/**
- * @brief Inline-able version of this kernel function.
- */
-#define chSchIsPreemptionRequired() \
- (currp->p_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
- firstprio(&rlist.r_queue) >= currp->p_prio)
-#else /* CH_CFG_TIME_QUANTUM == 0 */
-#define chSchIsPreemptionRequired() \
- (firstprio(&rlist.r_queue) > currp->p_prio)
-#endif /* CH_CFG_TIME_QUANTUM == 0 */
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/chcore_v6m.c b/os/ports/IAR/ARMCMx/chcore_v6m.c deleted file mode 100644 index 5a3c8ca0c..000000000 --- a/os/ports/IAR/ARMCMx/chcore_v6m.c +++ /dev/null @@ -1,125 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chcore_v6m.c
- * @brief ARMv6-M architecture port code.
- *
- * @addtogroup IAR_ARMCMx_V6M_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Port interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief System Timer vector.
- * @details This interrupt is used as system tick.
- * @note The timer must be initialized in the startup code.
- */
-CH_IRQ_HANDLER(SysTickVector) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- chSysTimerHandlerI();
- chSysUnlockFromIsr();
-
- CH_IRQ_EPILOGUE();
-}
-
-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-/**
- * @brief NMI vector.
- * @details The NMI vector is used for exception mode re-entering after a
- * context switch.
- */
-void NMIVector(void) {
- register struct extctx *ctxp;
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp = (struct extctx *)__get_PSP();
- ctxp++;
- __set_PSP((unsigned long)ctxp);
- port_unlock_from_isr();
-}
-#endif /* !CORTEX_ALTERNATE_SWITCH */
-
-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-/**
- * @brief PendSV vector.
- * @details The PendSV vector is used for exception mode re-entering after a
- * context switch.
- */
-void PendSVVector(void) {
- register struct extctx *ctxp;
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp = (struct extctx *)__get_PSP();
- ctxp++;
- __set_PSP((unsigned long)ctxp);
-}
-#endif /* CORTEX_ALTERNATE_SWITCH */
-
-/*===========================================================================*/
-/* Port exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief IRQ epilogue code.
- *
- * @param[in] lr value of the @p LR register on ISR entry
- */
-void _port_irq_epilogue(regarm_t lr) {
-
- if (lr != (regarm_t)0xFFFFFFF1) {
- register struct extctx *ctxp;
-
- port_lock_from_isr();
- /* Adding an artificial exception return context, there is no need to
- populate it fully.*/
- ctxp = (struct extctx *)__get_PSP();
- ctxp--;
- __set_PSP((unsigned long)ctxp);
- ctxp->xpsr = (regarm_t)0x01000000;
-
- /* The exit sequence is different depending on if a preemption is
- required or not.*/
- if (chSchIsPreemptionRequired()) {
- /* Preemption is required we need to enforce a context switch.*/
- ctxp->pc = (regarm_t)_port_switch_from_isr;
- }
- else {
- /* Preemption not required, we just need to exit the exception
- atomically.*/
- ctxp->pc = (regarm_t)_port_exit_from_isr;
- }
-
- /* Note, returning without unlocking is intentional, this is done in
- order to keep the rest of the context switch atomic.*/
- }
-}
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/chcore_v6m.h b/os/ports/IAR/ARMCMx/chcore_v6m.h deleted file mode 100644 index d1d5caeb6..000000000 --- a/os/ports/IAR/ARMCMx/chcore_v6m.h +++ /dev/null @@ -1,379 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chcore_v6m.h
- * @brief ARMv6-M architecture port macros and structures.
- *
- * @addtogroup IAR_ARMCMx_V6M_CORE
- * @{
- */
-
-#ifndef _CHCORE_V6M_H_
-#define _CHCORE_V6M_H_
-
-/*===========================================================================*/
-/* Port constants. */
-/*===========================================================================*/
-
-/**
- * @brief PendSV priority level.
- * @note This priority is enforced to be equal to @p 0,
- * this handler always has the highest priority that cannot preempt
- * the kernel.
- */
-#define CORTEX_PRIORITY_PENDSV 0
-
-/*===========================================================================*/
-/* Port macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 16 because the idle thread does have
- * a stack frame when compiling without optimizations. You may
- * reduce this value to zero when compiling with optimizations.
- */
-#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
-#define PORT_IDLE_THREAD_STACK_SIZE 16
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * @note In this port this value is conservatively set to 32 because the
- * function @p chSchDoReschedule() can have a stack frame, especially
- * with compiler optimizations disabled. The value can be reduced
- * when compiler optimizations are enabled.
- */
-#if !defined(PORT_INT_REQUIRED_STACK)
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#if !defined(CORTEX_ENABLE_WFI_IDLE)
-#define CORTEX_ENABLE_WFI_IDLE FALSE
-#endif
-
-/**
- * @brief SYSTICK handler priority.
- * @note The default SYSTICK handler priority is calculated as the priority
- * level in the middle of the numeric priorities range.
- */
-#if !defined(CORTEX_PRIORITY_SYSTICK)
-#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
-#endif
-
-/**
- * @brief Alternate preemption method.
- * @details Activating this option will make the Kernel use the PendSV
- * handler for preemption instead of the NMI handler.
- */
-#ifndef CORTEX_ALTERNATE_SWITCH
-#define CORTEX_ALTERNATE_SWITCH FALSE
-#endif
-
-/*===========================================================================*/
-/* Port derived parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Maximum usable priority for normal ISRs.
- */
-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-#define CORTEX_MAX_KERNEL_PRIORITY 1
-#else
-#define CORTEX_MAX_KERNEL_PRIORITY 0
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Macro defining the specific ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM_v6M
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "ARMv6-M"
-
-/**
- * @brief Name of the architecture variant.
- */
-#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)
-#define CH_CORE_VARIANT_NAME "Cortex-M0"
-#elif (CORTEX_MODEL == CORTEX_M1)
-#define CH_CORE_VARIANT_NAME "Cortex-M1"
-#endif
-
-/**
- * @brief Port-specific information string.
- */
-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-#define CH_PORT_INFO "Preemption through NMI"
-#else
-#define CH_PORT_INFO "Preemption through PendSV"
-#endif
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
- /* The documentation of the following declarations is in chconf.h in order
- to not have duplicated structure names into the documentation.*/
-#if !defined(__DOXYGEN__)
-
-struct extctx {
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_thd;
- regarm_t pc;
- regarm_t xpsr;
-};
-
-struct intctx {
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t lr;
-};
-
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = (regarm_t)pf; \
- tp->p_ctx.r13->r5 = (regarm_t)arg; \
- tp->p_ctx.r13->lr = (regarm_t)_port_thread_start; \
-}
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE() regarm_t _saved_lr = (regarm_t)__get_LR()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() _port_irq_epilogue(_saved_lr)
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_FAST_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Port-related initialization code.
- */
-#define port_init() { \
- SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \
- nvicSetSystemHandlerPriority(HANDLER_PENDSV, \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV)); \
- nvicSetSystemHandlerPriority(HANDLER_SYSTICK, \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK)); \
-}
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- */
-#define port_lock() __disable_interrupt()
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- */
-#define port_unlock() __enable_interrupt()
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_lock_from_isr() port_lock()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_unlock_from_isr() port_unlock()
-
-/**
- * @brief Disables all the interrupt sources.
- */
-#define port_disable() __disable_interrupt()
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- */
-#define port_suspend() __disable_interrupt()
-
-/**
- * @brief Enables all the interrupt sources.
- */
-#define port_enable() __enable_interrupt()
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note Implemented as an inlined @p WFI instruction.
- */
-#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() asm ("wfi")
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- if ((stkalign_t *)(__get_SP() - sizeof(struct intctx)) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_halt(void);
- void _port_irq_epilogue(regarm_t lr);
- void _port_switch_from_isr(void);
- void _port_exit_from_isr(void);
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_V6M_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/chcore_v7m.c b/os/ports/IAR/ARMCMx/chcore_v7m.c deleted file mode 100644 index c9d45b1a6..000000000 --- a/os/ports/IAR/ARMCMx/chcore_v7m.c +++ /dev/null @@ -1,198 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chcore_v7m.c
- * @brief ARMv7-M architecture port code.
- *
- * @addtogroup IAR_ARMCMx_V7M_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Port interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief System Timer vector.
- * @details This interrupt is used as system tick.
- * @note The timer must be initialized in the startup code.
- */
-CH_IRQ_HANDLER(SysTickVector) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- chSysTimerHandlerI();
- chSysUnlockFromIsr();
-
- CH_IRQ_EPILOGUE();
-}
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief SVC vector.
- * @details The SVC vector is used for exception mode re-entering after a
- * context switch.
- * @note The PendSV vector is only used in advanced kernel mode.
- */
-void SVCallVector(void) {
- struct extctx *ctxp;
-
- /* Current PSP value.*/
- ctxp = (struct extctx *)__get_PSP();
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp++;
-
-#if CORTEX_USE_FPU
- /* Restoring the special register SCB_FPCCR.*/
- SCB_FPCCR = (uint32_t)ctxp->fpccr;
- SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
-#endif
- __set_PSP((unsigned long)ctxp);
- port_unlock_from_isr();
-}
-#endif /* !CORTEX_SIMPLIFIED_PRIORITY */
-
-#if CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief PendSV vector.
- * @details The PendSV vector is used for exception mode re-entering after a
- * context switch.
- * @note The PendSV vector is only used in compact kernel mode.
- */
-void PendSVVector(void) {
- struct extctx *ctxp;
-
- /* Current PSP value.*/
- ctxp = (struct extctx *)__get_PSP();
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp++;
-
-#if CORTEX_USE_FPU
- /* Restoring the special register SCB_FPCCR.*/
- SCB_FPCCR = (uint32_t)ctxp->fpccr;
- SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
-#endif
- __set_PSP((unsigned long)ctxp);
-}
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/*===========================================================================*/
-/* Port exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Port-related initialization code.
- */
-void _port_init(void) {
-
- /* Initialization of the vector table and priority related settings.*/
- SCB_VTOR = CORTEX_VTOR_INIT;
- SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(CORTEX_PRIGROUP_INIT);
-
-#if CORTEX_USE_FPU
- {
- /* Initializing the FPU context save in lazy mode.*/
- SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
-
- /* CP10 and CP11 set to full access.*/
- SCB_CPACR |= 0x00F00000;
-
- /* Enables FPU context save/restore on exception entry/exit (FPCA bit).*/
- __set_CONTROL(__get_CONTROL() | 4);
-
- /* FPSCR and FPDSCR initially zero.*/
- __set_FPSCR(0);
- SCB_FPDSCR = 0;
- }
-#endif
-
- /* Initialization of the system vectors used by the port.*/
- nvicSetSystemHandlerPriority(HANDLER_SVCALL,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));
- nvicSetSystemHandlerPriority(HANDLER_PENDSV,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV));
- nvicSetSystemHandlerPriority(HANDLER_SYSTICK,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK));
-}
-
-/**
- * @brief Exception exit redirection to _port_switch_from_isr().
- */
-void _port_irq_epilogue(void) {
-
- port_lock_from_isr();
- if ((SCB_ICSR & ICSR_RETTOBASE) != 0) {
- struct extctx *ctxp;
-
- /* Current PSP value.*/
- ctxp = (struct extctx *)__get_PSP();
-
- /* Adding an artificial exception return context, there is no need to
- populate it fully.*/
- ctxp--;
- __set_PSP((unsigned long)ctxp);
- ctxp->xpsr = (regarm_t)0x01000000;
-
- /* The exit sequence is different depending on if a preemption is
- required or not.*/
- if (chSchIsPreemptionRequired()) {
- /* Preemption is required we need to enforce a context switch.*/
- ctxp->pc = (regarm_t)_port_switch_from_isr;
-#if CORTEX_USE_FPU
- /* Triggering a lazy FPU state save.*/
- (void)__get_FPSCR();
-#endif
- }
- else {
- /* Preemption not required, we just need to exit the exception
- atomically.*/
- ctxp->pc = (regarm_t)_port_exit_from_isr;
- }
-
-#if CORTEX_USE_FPU
- {
- uint32_t fpccr;
-
- /* Saving the special register SCB_FPCCR into the reserved offset of
- the Cortex-M4 exception frame.*/
- (ctxp + 1)->fpccr = (regarm_t)(fpccr = SCB_FPCCR);
-
- /* Now the FPCCR is modified in order to not restore the FPU status
- from the artificial return context.*/
- SCB_FPCCR = fpccr | FPCCR_LSPACT;
- }
-#endif
-
- /* Note, returning without unlocking is intentional, this is done in
- order to keep the rest of the context switch atomic.*/
- return;
- }
- port_unlock_from_isr();
-}
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/chcore_v7m.h b/os/ports/IAR/ARMCMx/chcore_v7m.h deleted file mode 100644 index 112c52a35..000000000 --- a/os/ports/IAR/ARMCMx/chcore_v7m.h +++ /dev/null @@ -1,504 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chcore_v7m.h
- * @brief ARMv7-M architecture port macros and structures.
- *
- * @addtogroup IAR_ARMCMx_V7M_CORE
- * @{
- */
-
-#ifndef _CHCORE_V7M_H_
-#define _CHCORE_V7M_H_
-
-/*===========================================================================*/
-/* Port constants. */
-/*===========================================================================*/
-
-/**
- * @brief Disabled value for BASEPRI register.
- */
-#define CORTEX_BASEPRI_DISABLED 0
-
-/*===========================================================================*/
-/* Port macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 16 because the idle thread does have
- * a stack frame when compiling without optimizations. You may
- * reduce this value to zero when compiling with optimizations.
- */
-#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
-#define PORT_IDLE_THREAD_STACK_SIZE 16
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * @note In this port this value is conservatively set to 32 because the
- * function @p chSchDoReschedule() can have a stack frame, especially
- * with compiler optimizations disabled. The value can be reduced
- * when compiler optimizations are enabled.
- */
-#if !defined(PORT_INT_REQUIRED_STACK)
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#if !defined(CORTEX_ENABLE_WFI_IDLE)
-#define CORTEX_ENABLE_WFI_IDLE FALSE
-#endif
-
-/**
- * @brief SYSTICK handler priority.
- * @note The default SYSTICK handler priority is calculated as the priority
- * level in the middle of the numeric priorities range.
- */
-#if !defined(CORTEX_PRIORITY_SYSTICK)
-#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
-#endif
-
-/**
- * @brief FPU support in context switch.
- * @details Activating this option activates the FPU support in the kernel.
- */
-#if !defined(CORTEX_USE_FPU)
-#define CORTEX_USE_FPU CORTEX_HAS_FPU
-#elif CORTEX_USE_FPU && !CORTEX_HAS_FPU
-/* This setting requires an FPU presence check in case it is externally
- redefined.*/
-#error "the selected core does not have an FPU"
-#endif
-
-/**
- * @brief Simplified priority handling flag.
- * @details Activating this option makes the Kernel work in compact mode.
- */
-#if !defined(CORTEX_SIMPLIFIED_PRIORITY)
-#define CORTEX_SIMPLIFIED_PRIORITY FALSE
-#endif
-
-/**
- * @brief SVCALL handler priority.
- * @note The default SVCALL handler priority is defaulted to
- * @p CORTEX_MAXIMUM_PRIORITY+1, this reserves the
- * @p CORTEX_MAXIMUM_PRIORITY priority level as fast interrupts
- * priority level.
- */
-#if !defined(CORTEX_PRIORITY_SVCALL)
-#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SVCALL"
-#endif
-
-/**
- * @brief NVIC VTOR initialization expression.
- */
-#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
-#define CORTEX_VTOR_INIT 0x00000000
-#endif
-
-/**
- * @brief NVIC PRIGROUP initialization expression.
- * @details The default assigns all available priority bits as preemption
- * priority with no sub-priority.
- */
-#if !defined(CORTEX_PRIGROUP_INIT) || defined(__DOXYGEN__)
-#define CORTEX_PRIGROUP_INIT (7 - CORTEX_PRIORITY_BITS)
-#endif
-
-/*===========================================================================*/
-/* Port derived parameters. */
-/*===========================================================================*/
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief Maximum usable priority for normal ISRs.
- */
-#define CORTEX_MAX_KERNEL_PRIORITY (CORTEX_PRIORITY_SVCALL + 1)
-
-/**
- * @brief BASEPRI level within kernel lock.
- * @note In compact kernel mode this constant value is enforced to zero.
- */
-#define CORTEX_BASEPRI_KERNEL \
- CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
-#else
-
-#define CORTEX_MAX_KERNEL_PRIORITY 1
-#define CORTEX_BASEPRI_KERNEL 0
-#endif
-
-/**
- * @brief PendSV priority level.
- * @note This priority is enforced to be equal to @p CORTEX_BASEPRI_KERNEL,
- * this handler always have the highest priority that cannot preempt
- * the kernel.
- */
-#define CORTEX_PRIORITY_PENDSV CORTEX_BASEPRI_KERNEL
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-#if (CORTEX_MODEL == CORTEX_M3) || defined(__DOXYGEN__)
-/**
- * @brief Macro defining the specific ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM_v7M
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "ARMv7-M"
-
-/**
- * @brief Name of the architecture variant.
- */
-#define CH_CORE_VARIANT_NAME "Cortex-M3"
-
-#elif (CORTEX_MODEL == CORTEX_M4)
-#define CH_ARCHITECTURE_ARM_v7ME
-#define CH_ARCHITECTURE_NAME "ARMv7-ME"
-#if CORTEX_USE_FPU
-#define CH_CORE_VARIANT_NAME "Cortex-M4F"
-#else
-#define CH_CORE_VARIANT_NAME "Cortex-M4"
-#endif
-#endif
-
-/**
- * @brief Port-specific information string.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define CH_PORT_INFO "Advanced kernel mode"
-#else
-#define CH_PORT_INFO "Compact kernel mode"
-#endif
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
-/* The documentation of the following declarations is in chconf.h in order
- to not have duplicated structure names into the documentation.*/
-#if !defined(__DOXYGEN__)
-
-struct extctx {
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_thd;
- regarm_t pc;
- regarm_t xpsr;
-#if CORTEX_USE_FPU
- regarm_t s0;
- regarm_t s1;
- regarm_t s2;
- regarm_t s3;
- regarm_t s4;
- regarm_t s5;
- regarm_t s6;
- regarm_t s7;
- regarm_t s8;
- regarm_t s9;
- regarm_t s10;
- regarm_t s11;
- regarm_t s12;
- regarm_t s13;
- regarm_t s14;
- regarm_t s15;
- regarm_t fpscr;
- regarm_t fpccr;
-#endif /* CORTEX_USE_FPU */
-};
-
-struct intctx {
-#if CORTEX_USE_FPU
- regarm_t s16;
- regarm_t s17;
- regarm_t s18;
- regarm_t s19;
- regarm_t s20;
- regarm_t s21;
- regarm_t s22;
- regarm_t s23;
- regarm_t s24;
- regarm_t s25;
- regarm_t s26;
- regarm_t s27;
- regarm_t s28;
- regarm_t s29;
- regarm_t s30;
- regarm_t s31;
-#endif /* CORTEX_USE_FPU */
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t lr;
-};
-
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = (regarm_t)pf; \
- tp->p_ctx.r13->r5 = (regarm_t)arg; \
- tp->p_ctx.r13->lr = (regarm_t)_port_thread_start; \
-}
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() _port_irq_epilogue()
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_FAST_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Port-related initialization code.
- */
-#define port_init() _port_init()
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- * @note In this port this it raises the base priority to kernel level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_lock() __set_BASEPRI(CORTEX_BASEPRI_KERNEL)
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_lock() __disable_interrupt()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- * @note In this port this it lowers the base priority to user level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_unlock() __set_BASEPRI(CORTEX_BASEPRI_DISABLED)
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_unlock() __enable_interrupt()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_lock_from_isr() port_lock()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Same as @p port_unlock() in this port.
- */
-#define port_unlock_from_isr() port_unlock()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Of course non-maskable interrupt sources are not included.
- * @note In this port it disables all the interrupt sources by raising
- * the priority mask to level 0.
- */
-#define port_disable() __disable_interrupt()
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- * @note Interrupt sources above kernel level remains enabled.
- * @note In this port it raises/lowers the base priority to kernel level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_suspend() { \
- __set_BASEPRI(CORTEX_BASEPRI_KERNEL); \
- __enable_interrupt(); \
-}
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_suspend() __disable_interrupt()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Enables all the interrupt sources.
- * @note In this port it lowers the base priority to user level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_enable() { \
- __set_BASEPRI(CORTEX_BASEPRI_DISABLED); \
- __enable_interrupt(); \
-}
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_enable() __enable_interrupt()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note Implemented as an inlined @p WFI instruction.
- */
-#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() asm ("wfi")
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- if ((stkalign_t *)(__get_SP() - sizeof(struct intctx)) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_halt(void);
- void _port_init(void);
- void _port_irq_epilogue(void);
- void _port_switch_from_isr(void);
- void _port_exit_from_isr(void);
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_V7M_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s deleted file mode 100644 index d2149ea59..000000000 --- a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s +++ /dev/null @@ -1,111 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- MODULE ?chcoreasm_v6m
-
- AAPCS INTERWORK, VFP_COMPATIBLE
- PRESERVE8
-
-/*
- * Imports the Cortex-Mx configuration headers.
- */
-#define _FROM_ASM_
-#include "chconf.h"
-#include "chcore.h"
-
-CONTEXT_OFFSET SET 12
-SCB_ICSR SET 0xE000ED04
-
- SECTION .text:CODE:NOROOT(2)
-
- EXTERN chThdExit
- EXTERN chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- EXTERN dbg_check_unlock
- EXTERN dbg_check_lock
-#endif
-
- THUMB
-
-/*
- * Performs a context switch between two threads.
- */
- PUBLIC _port_switch
-_port_switch:
- push {r4, r5, r6, r7, lr}
- mov r4, r8
- mov r5, r9
- mov r6, r10
- mov r7, r11
- push {r4, r5, r6, r7}
- mov r3, sp
- str r3, [r1, #CONTEXT_OFFSET]
- ldr r3, [r0, #CONTEXT_OFFSET]
- mov sp, r3
- pop {r4, r5, r6, r7}
- mov r8, r4
- mov r9, r5
- mov r10, r6
- mov r11, r7
- pop {r4, r5, r6, r7, pc}
-
-/*
- * Start a thread by invoking its work function.
- * If the work function returns @p chThdExit() is automatically invoked.
- */
- PUBLIC _port_thread_start
-_port_thread_start:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
- cpsie i
- mov r0, r5
- blx r4
- bl chThdExit
-
-/*
- * Post-IRQ switch code.
- * Exception handlers return here for context switching.
- */
- PUBLIC _port_switch_from_isr
- PUBLIC _port_exit_from_isr
-_port_switch_from_isr:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-_port_exit_from_isr:
- ldr r2, =SCB_ICSR
- movs r3, #128
-#if CORTEX_ALTERNATE_SWITCH
- lsls r3, r3, #21
- str r3, [r2, #0]
- cpsie i
-#else
- lsls r3, r3, #24
- str r3, [r2, #0]
-#endif
-waithere:
- b waithere
-
- END
diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s deleted file mode 100644 index ca077431d..000000000 --- a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s +++ /dev/null @@ -1,109 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- MODULE ?chcoreasm_v7m
-
- AAPCS INTERWORK, VFP_COMPATIBLE
- PRESERVE8
-
-/*
- * Imports the Cortex-Mx configuration headers.
- */
-#define _FROM_ASM_
-#include "chconf.h"
-#include "chcore.h"
-
-CONTEXT_OFFSET SET 12
-SCB_ICSR SET 0xE000ED04
-ICSR_PENDSVSET SET 0x10000000
-
- SECTION .text:CODE:NOROOT(2)
-
- EXTERN chThdExit
- EXTERN chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- EXTERN dbg_check_unlock
- EXTERN dbg_check_lock
-#endif
-
- THUMB
-
-/*
- * Performs a context switch between two threads.
- */
- PUBLIC _port_switch
-_port_switch:
- push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
-#if CORTEX_USE_FPU
- vpush {s16-s31}
-#endif
- str sp, [r1, #CONTEXT_OFFSET]
- ldr sp, [r0, #CONTEXT_OFFSET]
-#if CORTEX_USE_FPU
- vpop {s16-s31}
-#endif
- pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}
-
-/*
- * Start a thread by invoking its work function.
- * If the work function returns @p chThdExit() is automatically invoked.
- */
- PUBLIC _port_thread_start
-_port_thread_start:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-#if CORTEX_SIMPLIFIED_PRIORITY
- cpsie i
-#else
- movs r3, #CORTEX_BASEPRI_DISABLED
- msr BASEPRI, r3
-#endif
- mov r0, r5
- blx r4
- bl chThdExit
-
-/*
- * Post-IRQ switch code.
- * Exception handlers return here for context switching.
- */
- PUBLIC _port_switch_from_isr
- PUBLIC _port_exit_from_isr
-_port_switch_from_isr:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-_port_exit_from_isr:
-#if CORTEX_SIMPLIFIED_PRIORITY
- mov r3, #LWRD SCB_ICSR
- movt r3, #HWRD SCB_ICSR
- mov r2, #ICSR_PENDSVSET
- str r2, [r3]
- cpsie i
-.L3: b .L3
-#else
- svc #0
-#endif
-
- END
diff --git a/os/ports/IAR/ARMCMx/chtypes.h b/os/ports/IAR/ARMCMx/chtypes.h deleted file mode 100644 index 9855c4e00..000000000 --- a/os/ports/IAR/ARMCMx/chtypes.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/ARMCMx/chtypes.h
- * @brief ARM Cortex-Mx port system types.
- *
- * @addtogroup IAR_ARMCMx_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Event Id. */
-typedef uint32_t eventmask_t; /**< Event mask. */
-typedef uint32_t flagsmask_t; /**< Event flags. */
-typedef uint32_t systime_t; /**< System time. */
-typedef int32_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_STRUCT
-
-/**
- * @brief Packed structure modifier (before).
- */
-#define PACK_STRUCT_BEGIN __packed
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/ARMCMx/cstartup.s b/os/ports/IAR/ARMCMx/cstartup.s deleted file mode 100644 index 3ee52d0a1..000000000 --- a/os/ports/IAR/ARMCMx/cstartup.s +++ /dev/null @@ -1,68 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- MODULE ?cstartup
-
-CONTROL_MODE_PRIVILEGED SET 0
-CONTROL_MODE_UNPRIVILEGED SET 1
-CONTROL_USE_MSP SET 0
-CONTROL_USE_PSP SET 2
-
- AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
- PRESERVE8
-
- SECTION .intvec:CODE:NOROOT(3)
-
- SECTION CSTACK:DATA:NOROOT(3)
- PUBLIC __main_thread_stack_base__
-__main_thread_stack_base__:
- PUBLIC __heap_end__
-__heap_end__:
-
- SECTION SYSHEAP:DATA:NOROOT(3)
- PUBLIC __heap_base__
-__heap_base__:
-
- PUBLIC __iar_program_start
- EXTERN __vector_table
- EXTWEAK __iar_init_core
- EXTWEAK __iar_init_vfp
- EXTERN __cmain
-
- SECTION .text:CODE:REORDER(2)
- REQUIRE __vector_table
- THUMB
-__iar_program_start:
- cpsid i
- ldr r0, =SFE(CSTACK)
- msr PSP, r0
- movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
- msr CONTROL, r0
- isb
- bl __early_init
- bl __iar_init_core
- bl __iar_init_vfp
- b __cmain
-
- PUBWEAK __early_init
-__early_init:
- bx lr
-
- END
diff --git a/os/ports/IAR/ARMCMx/port.dox b/os/ports/IAR/ARMCMx/port.dox deleted file mode 100644 index 5336c14cf..000000000 --- a/os/ports/IAR/ARMCMx/port.dox +++ /dev/null @@ -1,228 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup IAR_ARMCMx ARM Cortex-Mx
- * @details ARM Cortex-Mx port for the IAR compiler.
-
- * @section IAR_ARMCMx_INTRO Introduction
- * This port supports all the cores implementing the ARMv6-M and ARMv7-M
- * architectures.
- *
- * @section IAR_ARMCMx_MODES Kernel Modes
- * The Cortex-Mx port supports two distinct kernel modes:
- * - <b>Advanced Kernel</b> mode. In this mode the kernel only masks
- * interrupt sources with priorities below or equal to the
- * @p CORTEX_BASEPRI_KERNEL level. Higher priorities are not affected by
- * the kernel critical sections and can be used for fast interrupts.
- * This mode is not available in the ARMv6-M architecture which does not
- * support priority masking.
- * - <b>Compact Kernel</b> mode. In this mode the kernel handles IRQ priorities
- * in a simplified way, all interrupt sources are disabled when the kernel
- * enters into a critical zone and re-enabled on exit. This is simple and
- * adequate for most applications, this mode results in a more compact and
- * faster kernel.
- * .
- * The selection of the mode is performed using the port configuration option
- * @p CORTEX_SIMPLIFIED_PRIORITY. Apart from the different handling of
- * interrupts there are no other differences between the two modes. The
- * kernel API is exactly the same.
- *
- * @section IAR_ARMCMx_STATES_A System logical states in Compact Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in Compact
- * Kernel mode:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state interrupts are enabled. The processor
- * is running in thread-privileged mode.
- * - <b>Suspended</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode. In this
- * mode this state is not different from the <b>Disabled</b> state.
- * - <b>Disabled</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode. In this
- * mode this state is not different from the <b>Suspended</b> state.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wfi</b>.
- * - <b>S-Locked</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode.
- * - <b>I-Locked</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in exception-privileged mode.
- * - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
- * not globally masked but only interrupts with higher priority can preempt
- * the current handler. The processor is running in exception-privileged
- * mode.
- * - <b>Serving Fast Interrupt</b>. Not implemented in compact kernel mode.
- * - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
- * asynchronous NMI vector and several synchronous fault vectors that can
- * be considered belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
- * the maskable interrupt sources. The ARM state is whatever the processor
- * was running when @p chSysHalt() was invoked.
- *
- * @section IAR_ARMCMx_STATES_B System logical states in Advanced Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the
- * Advanced Kernel mode:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state the ARM Cortex-Mx has the BASEPRI register
- * set at @p CORTEX_BASEPRI_USER level, interrupts are not masked. The
- * processor is running in thread-privileged mode.
- * - <b>Suspended</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in thread-privileged mode.
- * - <b>Disabled</b>. Interrupt sources are globally masked. The processor
- * is running in thread-privileged mode.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wfi</b>.
- * - <b>S-Locked</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in thread-privileged mode.
- * - <b>I-Locked</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in exception-privileged mode.
- * - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
- * not globally masked but only interrupts with higher priority can preempt
- * the current handler. The processor is running in exception-privileged
- * mode.
- * - <b>Serving Fast Interrupt</b>. Fast interrupts are defined as interrupt
- * sources having higher priority level than the kernel
- * (@p CORTEX_BASEPRI_KERNEL). In this state is not possible to switch to
- * the I-Locked state because fast interrupts can preempt the kernel
- * critical zone.<br>
- * This state is not implemented in the ARMv6-M implementation because
- * priority masking is not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
- * asynchronous NMI vector and several synchronous fault vectors that can
- * be considered belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
- * the maskable interrupt sources. The ARM state is whatever the processor
- * was running when @p chSysHalt() was invoked.
- * .
- * @section IAR_ARMCMx_NOTES ARM Cortex-Mx/IAR port notes
- * The ARM Cortex-Mx port is organized as follow:
- * - The @p main() function is invoked in thread-privileged mode.
- * - Each thread has a private process stack, the system has a single main
- * stack where all the interrupts and exceptions are processed.
- * - The threads are started in thread-privileged mode.
- * - Interrupt nesting and the other advanced core/NVIC features are supported.
- * - The Cortex-Mx port is perfectly generic, support for more devices can be
- * easily added by adding a subdirectory under <tt>./os/ports/IAR/ARMCMx</tt>
- * and giving it the name of the new device, then copy the files from another
- * device into the new directory and customize them for the new device.
- * .
- * @ingroup iar
- */
-
-/**
- * @defgroup IAR_ARMCMx_CONF Configuration Options
- * @details ARM Cortex-Mx Configuration Options. The ARMCMx port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
- * by an interrupt handler between the @p extctx and @p intctx
- * structures.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
- * - @p CORTEX_PRIORITY_SYSTICK, priority of the SYSTICK handler.
- * - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
- * - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
- * @p <b>wfi</b> instruction from within the idle loop. This option is
- * defaulted to FALSE because it can create problems with some debuggers.
- * Setting this option to TRUE reduces the system power requirements.
- * .
- * @section IAR_ARMCMx_CONF_1 ARMv6-M specific options
- * The following options are specific for the ARMv6-M architecture:
- * - @p CORTEX_ALTERNATE_SWITCH, when activated makes the OS use the PendSV
- * exception instead of NMI as preemption handler.
- * .
- * @section IAR_ARMCMx_CONF_2 ARMv7-M specific options
- * The following options are specific for the ARMv6-M architecture:
- * - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
- * - @p CORTEX_SIMPLIFIED_PRIORITY, when enabled activates the Compact kernel
- * mode.
- * .
- * @ingroup IAR_ARMCMx
- */
-
-/**
- * @defgroup IAR_ARMCMx_CORE Core Port Implementation
- * @details ARM Cortex-Mx specific port code, structures and macros.
- *
- * @ingroup IAR_ARMCMx
- */
-
-/**
- * @defgroup IAR_ARMCMx_V6M_CORE ARMv6-M Specific Implementation
- * @details ARMv6-M specific port code, structures and macros.
- *
- * @ingroup IAR_ARMCMx_CORE
- */
-
-/**
- * @defgroup IAR_ARMCMx_V7M_CORE ARMv7-M Specific Implementation
- * @details ARMv7-M specific port code, structures and macros.
- *
- * @ingroup IAR_ARMCMx_CORE
- */
-
-/**
- * @defgroup IAR_ARMCMx_STARTUP Startup Support
- * @details ChibiOS/RT provides its own generic startup file for the ARM
- * Cortex-Mx port.
- * Of course it is not mandatory to use it but care should be taken about the
- * startup phase details.
- *
- * @section IAR_ARMCMx_STARTUP_1 Startup Process
- * The startup process, as implemented, is the following:
- * -# Interrupts are masked globally.
- * -# The two stacks are initialized by assigning them the sizes defined in the
- * linker script (usually named @p ch.icf).
- * -# The CPU state is switched to Privileged and the PSP stack is used.
- * -# An early initialization routine @p __early_init() is invoked, if the
- * symbol is not defined then an empty default routine is executed
- * (weak symbol).
- * -# Control is passed to the C runtime entry point @p __cmain that performs
- * the required initializations before invoking the @p main() function.
- * .
- * @ingroup IAR_ARMCMx
- */
-
-/**
- * @defgroup IAR_ARMCMx_NVIC NVIC Support
- * @details ARM Cortex-Mx NVIC support.
- *
- * @ingroup IAR_ARMCMx
- */
-
-/**
- * @defgroup IAR_ARMCMx_SPECIFIC Specific Implementations
- * @details Platform-specific port code.
- *
- * @ingroup IAR_ARMCMx
- */
diff --git a/os/ports/IAR/STM8/chcore.c b/os/ports/IAR/STM8/chcore.c deleted file mode 100644 index 020c1cfb0..000000000 --- a/os/ports/IAR/STM8/chcore.c +++ /dev/null @@ -1,55 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file cosmic/STM8/chcore.c
- * @brief STM8 (Cosmic) architecture port code.
- *
- * @addtogroup STM8_COSMIC_CORE
- * @{
- */
-
-#include "ch.h"
-
-__tiny ReadyList rlist;
-
-/**
- * @brief Thread start code.
- */
-__task void _port_thread_start(void) {
- chSysUnlock();
- asm("popw x");
-}
-
-/**
- * @brief Halts the system.
- * @details This function is invoked by the operating system when an
- * unrecoverable error is detected (for example because a programming
- * error in the application code that triggers an assertion while in
- * debug mode).
- */
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/** @} */
diff --git a/os/ports/IAR/STM8/chcore.h b/os/ports/IAR/STM8/chcore.h deleted file mode 100644 index 431b7f65d..000000000 --- a/os/ports/IAR/STM8/chcore.h +++ /dev/null @@ -1,339 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file cosmic/STM8/chcore.h
- * @brief STM8 (Cosmic) architecture port macros and structures.
- *
- * @addtogroup STM8_COSMIC_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#ifndef STM8_ENABLE_WFI_IDLE
-#define STM8_ENABLE_WFI_IDLE FALSE
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Unique macro for the implemented architecture.
- */
-#define CH_ARCHITECTURE_STM8
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "STM8"
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "IAR"
-
-/**
- * @brief Port-specific information string.
- */
-#define CH_PORT_INFO "None"
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-/**
- * @brief Base type for stack alignment.
- * @note No alignment constraints so uint8_t.
- */
-typedef uint8_t stkalign_t;
-
-/**
- * @brief Generic STM8 function pointer.
- * @note It is used to allocate the proper size for return addresses in
- * context-related structures.
- */
-typedef void (*stm8func_t)(void);
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note The structure requires one dummy field at its start because the
- * stack is handled as preincremented/postdecremented.
- */
-struct extctx {
- uint8_t _next;
- uint16_t w3;
- uint16_t w2;
- uint16_t w1;
- uint16_t w0;
- uint8_t cc;
- uint8_t a;
- uint16_t x;
- uint16_t y;
- uint8_t pce;
- uint8_t pch;
- uint8_t pcl;
-};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching..
- * @note The structure requires one dummy field at its start because the
- * stack is handled as preincremented/postdecremented.
- */
-struct intctx {
- uint8_t _next;
- uint16_t w7;
- uint16_t w6;
- uint16_t w5;
- uint16_t w4;
- stm8func_t pc; /* Function pointer sized return address. */
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details This structure usually contains just the saved stack pointer
- * defined as a pointer to a @p intctx structure.
- */
-struct context {
- struct intctx *sp;
-};
-
-/**
- * @brief Start context.
- * @details This context is the stack organization for the trampoline code
- * @p _port_thread_start().
- */
-struct stm8_startctx {
- uint8_t saved_vreg[8]; // saved virtual registers to restore
- uint8_t _next;
- stm8func_t ts; /* Trampoline address. */
- void *arg; /* Thread argument. */
- stm8func_t pc; /* Thread function address. */
- stm8func_t ret; /* chThdExit() address. */
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- struct stm8_startctx *scp; \
- scp = (struct stm8_startctx *)((uint8_t *)workspace + wsize - \
- sizeof(struct stm8_startctx)); \
- scp->ts = (stm8func_t)_port_thread_start; \
- scp->arg = (void *)arg; \
- scp->pc = (stm8func_t)pf; \
- scp->ret = (stm8func_t)chThdExit; \
- tp->p_ctx.sp = (struct intctx *)scp; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 0
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This is a safe value, you may trim it down after reading the
- * right size in the map file.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 48
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- (sizeof(struct intctx) - 1) + \
- (sizeof(struct extctx) - 1) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() { \
- dbg_check_lock(); \
- if (chSchIsPreemptionRequired()) \
- chSchDoReschedule(); \
- dbg_check_unlock(); \
-}
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) \
- _Pragma(VECTOR_ID((id)+2)) __interrupt void vector##id(void)
-
-/**
- * @brief Port-related initialization code.
- * @note None in this port.
- */
-#define port_init()
-
-/**
- * @brief Kernel-lock action.
- * @note Implemented as global interrupts disable.
- */
-#define port_lock() asm("sim")
-
-/**
- * @brief Kernel-unlock action.
- * @note Implemented as global interrupts enable.
- */
-#define port_unlock() asm("rim")
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @note This function is empty in this port.
- */
-#define port_lock_from_isr()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @note This function is empty in this port.
- */
-#define port_unlock_from_isr()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Implemented as global interrupts disable.
- * @note Of course non-maskable interrupt sources are not included.
- */
-#define port_disable() asm("sim")
-
-/**
- * @brief Disables the interrupt sources that are not supposed to preempt
- * the kernel.
- * @note Same as @p port_disable() in this port, there is no difference
- * between the two states.
- */
-#define port_suspend() asm("sim")
-
-/**
- * @brief Enables all the interrupt sources.
- * @note Implemented as global interrupt enable.
- */
-#define port_enable() asm("rim")
-
-/**
- * @brief Enters an architecture-dependent halt mode.
- * @note Implemented with the specific "wfi" instruction.
- */
-#if STM8_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() asm("wfi")
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note Implemented as a call to a low level assembler routine.
- *
- * @param ntp the thread to be switched in
- * @param otp the thread to be switched out
- */
-#define port_switch(ntp, otp) _port_switch(otp)
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _port_switch(Thread *otp);
- __task void _port_thread_start(void);
- void port_halt(void);
-#ifdef __cplusplus
-}
-#endif
-
-/*===========================================================================*/
-/* Scheduler captured code. */
-/*===========================================================================*/
-
-#define PORT_OPTIMIZED_RLIST_VAR
-#define PORT_OPTIMIZED_RLIST_EXT
-#define PORT_OPTIMIZED_READYLIST_STRUCT
-
-typedef struct {
- ThreadsQueue r_queue;
- tprio_t r_prio;
- Thread *r_current;
-#if CH_CFG_USE_REGISTRY
- Thread *r_newer;
- Thread *r_older;
-#endif
- /* End of the fields shared with the Thread structure.*/
-#if CH_CFG_TIME_QUANTUM > 0
- cnt_t r_preempt;
-#endif
-} ReadyList;
-
-extern __tiny ReadyList rlist;
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/STM8/chcore_stm8.s b/os/ports/IAR/STM8/chcore_stm8.s deleted file mode 100644 index 6dc719c5c..000000000 --- a/os/ports/IAR/STM8/chcore_stm8.s +++ /dev/null @@ -1,57 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-; Get definitions for virtual registers used by the compiler
-#include "vregs.inc"
-
- SECTION .near_func.text:code
- EXTERN rlist
-
-/*
- * Performs a context switch between two threads.
- */
- PUBLIC _port_switch
-_port_switch:
- push ?b8
- push ?b9
- push ?b10
- push ?b11
- push ?b12
- push ?b13
- push ?b14
- push ?b15
-
- ldw y,sp
- ldw (5,x),y
- ldw x, rlist + 5
- ldw x,(5,x)
- ldw sp,x
-
- pop ?b15
- pop ?b14
- pop ?b13
- pop ?b12
- pop ?b11
- pop ?b10
- pop ?b9
- pop ?b8
- ret
-
- END
diff --git a/os/ports/IAR/STM8/chtypes.h b/os/ports/IAR/STM8/chtypes.h deleted file mode 100644 index f418256e1..000000000 --- a/os/ports/IAR/STM8/chtypes.h +++ /dev/null @@ -1,80 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file IAR/STM8/chtypes.h
- * @brief STM8 (IAR) port system types.
- *
- * @addtogroup STM8_IAR_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint8_t tprio_t; /**< Thread priority. */
-typedef int16_t msg_t; /**< Inter-thread message. */
-typedef int8_t eventid_t; /**< Event Id. */
-typedef uint8_t eventmask_t; /**< Event mask. */
-typedef uint8_t flagsmask_t; /**< Event flags. */
-typedef uint16_t systime_t; /**< System time. */
-typedef int8_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note Uses the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_STRUCT
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/IAR/STM8/port.dox b/os/ports/IAR/STM8/port.dox deleted file mode 100644 index 1a95b79bf..000000000 --- a/os/ports/IAR/STM8/port.dox +++ /dev/null @@ -1,95 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup STM8_IAR STM8
- * @details STM8 port for the Cosmic C compiler.
- *
- * @section STM8_IAR_INTRO Introduction
- * This port supports all STM8 8 bits MCUs.
- *
- * @section STM8_IAR_STATES Mapping of the System States in the STM8 port
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
- * port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). Interrupts are enabled.
- * - <b>Suspended</b>. Interrupts are disabled.
- * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
- * Suspended state because there are no fast interrupts in this architecture.
- * - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle
- * loop.
- * - <b>S-Locked</b>. Interrupts are disabled.
- * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
- * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non
- * maskable interrupt sources that can be associated to this state.
- * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- * .
- * @section STM8_IAR_NOTES The STM8 port notes
- * - The STM8 does not have a dedicated interrupt stack, make sure to reserve
- * enough stack space for interrupts in each thread stack. This can be done
- * by modifying the @p INT_REQUIRED_STACK macro into
- * <b>./os/ports/IAR/STM8/chcore.h</b>.
- * - The kernel currently supports only the small memory model so the
- * kernel files should be loaded in the first 64K. Note that this is not
- * a problem because upper addresses can be used by the user code, the
- * kernel can context switch code running there.
- * - The configuration option @p CH_CFG_OPTIMIZE_SPEED is not currently supported
- * because the missing support of the @p inline "C" keyword in the
- * compiler.
- * .
- * @ingroup iar
- */
-
-/**
- * @defgroup STM8_IAR_CONF Configuration Options
- * @details STM8 Configuration Options. The STM8 port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space
- * used by the interrupt handlers.<br>
- * The default for this value is @p 48, this space is allocated for each
- * thread so be careful in order to not waste precious RAM space.
- * .
- * @ingroup STM8_IAR
- */
-
-/**
- * @defgroup STM8_IAR_CORE Core Port Implementation
- * @details STM8 specific port code, structures and macros.
- *
- * @ingroup STM8_IAR
- */
-
- /**
- * @defgroup STM8_IAR_STARTUP Startup Support
- * @details ChibiOS/RT doed not provide startup files for the STM8, there
- * are no special startup requirement so the normal toolchain-provided
- * startup files can be used.
- *
- * @ingroup STM8_IAR
- */
diff --git a/os/ports/RC/STM8/chcore.c b/os/ports/RC/STM8/chcore.c deleted file mode 100644 index 1b4c1d0a4..000000000 --- a/os/ports/RC/STM8/chcore.c +++ /dev/null @@ -1,77 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RC/STM8/chcore.c
- * @brief STM8 (Raisonance) architecture port code.
- *
- * @addtogroup STM8_RAISONANCE_CORE
- * @{
- */
-#pragma SRC("tmp.asm")
-
-#include "ch.h"
-
-page0 ReadyList rlist;
-
-/**
- * @brief Performs a context switch between two threads.
- *
- * @param otp the thread to be switched out
- */
-void _port_switch(Thread *otp) {
-
- (void)otp;
- /* Asm because unoptimal code would generated by using _getSP_().*/
-#pragma ASM
- LDW Y,SP ; old context pointer
- LDW (5,X),Y ; SP saved in otp->p_ctx.sp
- LDW X,rlist + 5 ; r_current (currp) field
- LDW X,(5,X) ; currp->p_ctx.sp
- LDW SP,X ; new context pointer
-#pragma ENDASM
-}
-
-/**
- * @brief Thread start code.
- */
-void _port_thread_start(void) {
-
- chSysUnlock();
-#pragma ASM
- POPW X
-#pragma ENDASM
-}
-
-/**
- * @brief Halts the system.
- * @details This function is invoked by the operating system when an
- * unrecoverable error is detected (for example because a programming
- * error in the application code that triggers an assertion while in
- * debug mode).
- */
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/** @} */
diff --git a/os/ports/RC/STM8/chcore.h b/os/ports/RC/STM8/chcore.h deleted file mode 100644 index 41c76a072..000000000 --- a/os/ports/RC/STM8/chcore.h +++ /dev/null @@ -1,334 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RC/STM8/chcore.h
- * @brief STM8 (Raisonance) architecture port macros and structures.
- *
- * @addtogroup STM8_RAISONANCE_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#include <intrins.h>
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#ifndef STM8_ENABLE_WFI_IDLE
-#define STM8_ENABLE_WFI_IDLE FALSE
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Unique macro for the implemented architecture.
- */
-#define CH_ARCHITECTURE_STM8
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "STM8"
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "Raisonance"
-
-/**
- * @brief Port-specific information string.
- */
-#define CH_PORT_INFO "None"
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-/**
- * @brief Base type for stack alignment.
- * @note No alignment constraints so uint8_t.
- */
-typedef uint8_t stkalign_t;
-
-/**
- * @brief Generic STM8 function pointer.
- * @note It is used to allocate the proper size for return addresses in
- * context-related structures.
- */
-typedef void (*stm8func_t)(void);
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note The structure requires one dummy field at its start because the
- * stack is handled as preincremented/postdecremented.
- */
-struct extctx {
- uint8_t _next;
- uint16_t cx;
- uint16_t bx;
- uint8_t cc;
- uint8_t a;
- uint16_t x;
- uint16_t y;
- uint8_t pce;
- uint8_t pch;
- uint8_t pcl;
-};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching..
- * @note The structure requires one dummy field at its start because the
- * stack is handled as preincremented/postdecremented.
- */
-struct intctx {
- uint8_t _next;
- stm8func_t pc; /* Function pointer sized return address. */
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details This structure usually contains just the saved stack pointer
- * defined as a pointer to a @p intctx structure.
- */
-struct context {
- struct intctx *sp;
-};
-
-/**
- * @brief Start context.
- * @details This context is the stack organization for the trampoline code
- * @p _port_thread_start().
- */
-struct stm8_startctx {
- uint8_t _next;
- stm8func_t ts; /* Trampoline address. */
- void *arg; /* Thread argument. */
- stm8func_t pc; /* Thread function address. */
- stm8func_t ret; /* chThdExit() address. */
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- struct stm8_startctx *scp; \
- scp = (struct stm8_startctx *)((uint8_t *)workspace + wsize - \
- sizeof(struct stm8_startctx)); \
- scp->ts = _port_thread_start; \
- scp->arg = arg; \
- scp->pc = (stm8func_t)pf; \
- scp->ret = (stm8func_t)chThdExit; \
- tp->p_ctx.sp = (struct intctx *)scp; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 0
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This is a safe value, you may trim it down after reading the
- * right size in the map file.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 48
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- (sizeof(struct intctx) - 1) + \
- (sizeof(struct extctx) - 1) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE() { \
-}
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() { \
- dbg_check_lock(); \
- if (chSchIsPreemptionRequired()) \
- chSchDoReschedule(); \
- dbg_check_unlock(); \
-}
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void vector##id(void) interrupt id
-
-/**
- * @brief Port-related initialization code.
- * @note None in this port.
- */
-#define port_init()
-
-/**
- * @brief Kernel-lock action.
- * @note Implemented as global interrupts disable.
- */
-#define port_lock() _sim_()
-
-/**
- * @brief Kernel-unlock action.
- * @note Implemented as global interrupts enable.
- */
-#define port_unlock() _rim_()
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @note This function is empty in this port.
- */
-#define port_lock_from_isr()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @note This function is empty in this port.
- */
-#define port_unlock_from_isr()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Implemented as global interrupts disable.
- * @note Of course non-maskable interrupt sources are not included.
- */
-#define port_disable() _sim_()
-
-/**
- * @brief Disables the interrupt sources that are not supposed to preempt
- * the kernel.
- * @note Same as @p port_disable() in this port, there is no difference
- * between the two states.
- */
-#define port_suspend() _sim_()
-
-/**
- * @brief Enables all the interrupt sources.
- * @note Implemented as global interrupt enable.
- */
-#define port_enable() _rim_()
-
-/**
- * @brief Enters an architecture-dependent halt mode.
- * @note Implemented with the specific "wfi" instruction.
- */
-#if STM8_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() _wfi_()
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note Implemented as a call to a low level assembler routine.
- *
- * @param ntp the thread to be switched in
- * @param otp the thread to be switched out
- */
-#define port_switch(ntp, otp) _port_switch(otp)
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _port_switch(Thread *otp);
- void _port_thread_start(void);
- void port_halt(void);
-#ifdef __cplusplus
-}
-#endif
-
-/*===========================================================================*/
-/* Scheduler captured code. */
-/*===========================================================================*/
-
-#define PORT_OPTIMIZED_RLIST_VAR
-#define PORT_OPTIMIZED_RLIST_EXT
-#define PORT_OPTIMIZED_READYLIST_STRUCT
-
-typedef struct {
- ThreadsQueue r_queue;
- tprio_t r_prio;
- Thread *r_current;
-#if CH_CFG_USE_REGISTRY
- Thread *r_newer;
- Thread *r_older;
-#endif
- /* End of the fields shared with the Thread structure.*/
-#if CH_CFG_TIME_QUANTUM > 0
- cnt_t r_preempt;
-#endif
-} ReadyList;
-
-page0 extern ReadyList rlist;
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/RC/STM8/chtypes.h b/os/ports/RC/STM8/chtypes.h deleted file mode 100644 index ffc972f14..000000000 --- a/os/ports/RC/STM8/chtypes.h +++ /dev/null @@ -1,97 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RC/STM8/chtypes.h
- * @brief STM8 (Raisonance) port system types.
- *
- * @addtogroup STM8_RAISONANCE_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-
-typedef unsigned char uint8t; /**< C99-style boolean. */
-typedef unsigned char uint8_t; /**< C99-style 8 bits unsigned. */
-typedef signed char int8_t; /**< C99-style 8 bits signed. */
-typedef unsigned int uint16_t; /**< C99-style 16 bits unsigned. */
-typedef signed int int16_t; /**< C99-style 16 bits signed. */
-typedef unsigned long uint32_t; /**< C99-style 32 bits unsigned. */
-typedef signed long int32_t; /**< C99-style 32 bits signed. */
-typedef uint8_t uint_fast8_t; /**< C99-style 8 bits unsigned. */
-typedef uint16_t uint_fast16_t; /**< C99-style 16 bits unsigned. */
-typedef uint32_t uint_fast32_t; /**< C99-style 32 bits unsigned. */
-
-#if !defined(false) || defined(__DOXYGEN__)
-#define false 0
-#endif
-
-#if !defined(true) || defined(__DOXYGEN__)
-#define true (!false)
-#endif
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint8_t tprio_t; /**< Thread priority. */
-typedef int16_t msg_t; /**< Inter-thread message. */
-typedef int8_t eventid_t; /**< Event Id. */
-typedef uint8_t eventmask_t; /**< Event mask. */
-typedef uint8_t flagsmask_t; /**< Event flags. */
-typedef uint16_t systime_t; /**< System time. */
-typedef int8_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE inline
-
-/**
- * @brief ROM constant modifier.
- * @note Uses the "const" keyword in this port.
- */
-#define ROMCONST code
-
-/**
- * @brief Packed structure modifier (within).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_STRUCT
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/RC/STM8/port.dox b/os/ports/RC/STM8/port.dox deleted file mode 100644 index 903cb9198..000000000 --- a/os/ports/RC/STM8/port.dox +++ /dev/null @@ -1,95 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup STM8_RAISONANCE STM8
- * @details STM8 port for the Raisonance C compiler.
- *
- * @section STM8_RAISONANCE_INTRO Introduction
- * This port supports all STM8 8 bits MCUs.
- *
- * @section STM8_RAISONANCE_STATES Mapping of the System States in the STM8 port
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
- * port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). Interrupts are enabled.
- * - <b>Suspended</b>. Interrupts are disabled.
- * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
- * Suspended state because there are no fast interrupts in this architecture.
- * - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle
- * loop.
- * - <b>S-Locked</b>. Interrupts are disabled.
- * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
- * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non
- * maskable interrupt sources that can be associated to this state.
- * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- * .
- * @section STM8_RAISONANCE_NOTES The STM8 port notes
- * - The STM8 does not have a dedicated interrupt stack, make sure to reserve
- * enough stack space for interrupts in each thread stack. This can be done
- * by modifying the @p INT_REQUIRED_STACK macro into
- * <b>./os/ports/RC/STM8/chcore.h</b>.
- * - The kernel currently supports only the small memory model so the
- * kernel files should be loaded in the first 64K. Note that this is not
- * a problem because upper addresses can be used by the user code, the
- * kernel can context switch code running there.
- * - The configuration option @p CH_CFG_OPTIMIZE_SPEED is not currently supported
- * because the missing support of the @p inline "C" keyword in the
- * compiler.
- * .
- * @ingroup raisonance
- */
-
-/**
- * @defgroup STM8_RAISONANCE_CONF Configuration Options
- * @details STM8 Configuration Options. The STM8 port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space
- * used by the interrupt handlers.<br>
- * The default for this value is @p 48, this space is allocated for each
- * thread so be careful in order to not waste precious RAM space.
- * .
- * @ingroup STM8_RAISONANCE
- */
-
-/**
- * @defgroup STM8_RAISONANCE_CORE Core Port Implementation
- * @details STM8 specific port code, structures and macros.
- *
- * @ingroup STM8_RAISONANCE
- */
-
- /**
- * @defgroup STM8_RAISONANCE_STARTUP Startup Support
- * @details ChibiOS/RT doed not provide startup files for the STM8, there
- * are no special startup requirement so the normal toolchain-provided
- * startup files can be used.
- *
- * @ingroup STM8_RAISONANCE
- */
diff --git a/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h b/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h deleted file mode 100644 index e60e06771..000000000 --- a/os/ports/RVCT/ARMCMx/LPC11xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/LPC11xx/cmparams.h
- * @brief ARM Cortex-M0 parameters for the LPC11xx.
- *
- * @defgroup RVCT_ARMCMx_LPC11xx LPC11xx Specific Parameters
- * @ingroup RVCT_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0 specific parameters for the
- * LPC11xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M0
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/LPC11xx/vectors.s b/os/ports/RVCT/ARMCMx/LPC11xx/vectors.s deleted file mode 100644 index 0c08b902c..000000000 --- a/os/ports/RVCT/ARMCMx/LPC11xx/vectors.s +++ /dev/null @@ -1,183 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- PRESERVE8
-
- AREA RESET, DATA, READONLY
-
- IMPORT __initial_msp
- IMPORT Reset_Handler
- EXPORT __Vectors
-
-__Vectors
- DCD __initial_msp
- DCD Reset_Handler
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
-
- AREA |.text|, CODE, READONLY
- THUMB
-
-/*
- * Default interrupt handlers.
- */
- EXPORT _unhandled_exception
-_unhandled_exception PROC
- EXPORT NMIVector [WEAK]
- EXPORT HardFaultVector [WEAK]
- EXPORT MemManageVector [WEAK]
- EXPORT BusFaultVector [WEAK]
- EXPORT UsageFaultVector [WEAK]
- EXPORT Vector1C [WEAK]
- EXPORT Vector20 [WEAK]
- EXPORT Vector24 [WEAK]
- EXPORT Vector28 [WEAK]
- EXPORT SVCallVector [WEAK]
- EXPORT DebugMonitorVector [WEAK]
- EXPORT Vector34 [WEAK]
- EXPORT PendSVVector [WEAK]
- EXPORT SysTickVector [WEAK]
- EXPORT Vector40 [WEAK]
- EXPORT Vector44 [WEAK]
- EXPORT Vector48 [WEAK]
- EXPORT Vector4C [WEAK]
- EXPORT Vector50 [WEAK]
- EXPORT Vector54 [WEAK]
- EXPORT Vector58 [WEAK]
- EXPORT Vector5C [WEAK]
- EXPORT Vector60 [WEAK]
- EXPORT Vector64 [WEAK]
- EXPORT Vector68 [WEAK]
- EXPORT Vector6C [WEAK]
- EXPORT Vector70 [WEAK]
- EXPORT Vector74 [WEAK]
- EXPORT Vector78 [WEAK]
- EXPORT Vector7C [WEAK]
- EXPORT Vector80 [WEAK]
- EXPORT Vector84 [WEAK]
- EXPORT Vector88 [WEAK]
- EXPORT Vector8C [WEAK]
- EXPORT Vector90 [WEAK]
- EXPORT Vector94 [WEAK]
- EXPORT Vector98 [WEAK]
- EXPORT Vector9C [WEAK]
- EXPORT VectorA0 [WEAK]
- EXPORT VectorA4 [WEAK]
- EXPORT VectorA8 [WEAK]
- EXPORT VectorAC [WEAK]
- EXPORT VectorB0 [WEAK]
- EXPORT VectorB4 [WEAK]
- EXPORT VectorB8 [WEAK]
- EXPORT VectorBC [WEAK]
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
- b _unhandled_exception
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h b/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h deleted file mode 100644 index 76cfe70e1..000000000 --- a/os/ports/RVCT/ARMCMx/LPC13xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/LPC13xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the LPC13xx.
- *
- * @defgroup RVCT_ARMCMx_LPC13xx LPC13xx Specific Parameters
- * @ingroup RVCT_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * LPC13xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 3
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/LPC13xx/vectors.s b/os/ports/RVCT/ARMCMx/LPC13xx/vectors.s deleted file mode 100644 index dd027d879..000000000 --- a/os/ports/RVCT/ARMCMx/LPC13xx/vectors.s +++ /dev/null @@ -1,261 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
- PRESERVE8
-
- AREA RESET, DATA, READONLY
-
- IMPORT __initial_msp
- IMPORT Reset_Handler
- EXPORT __Vectors
-
-__Vectors
- DCD __initial_msp
- DCD Reset_Handler
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
- DCD VectorEC
- DCD VectorF0
- DCD VectorF4
- DCD VectorF8
- DCD VectorFC
- DCD Vector100
- DCD Vector104
- DCD Vector108
- DCD Vector10C
- DCD Vector110
- DCD Vector114
- DCD Vector118
- DCD Vector11C
- DCD Vector120
- DCD Vector124
-
- AREA |.text|, CODE, READONLY
- THUMB
-
-/*
- * Default interrupt handlers.
- */
- EXPORT _unhandled_exception
-_unhandled_exception PROC
- EXPORT NMIVector [WEAK]
- EXPORT HardFaultVector [WEAK]
- EXPORT MemManageVector [WEAK]
- EXPORT BusFaultVector [WEAK]
- EXPORT UsageFaultVector [WEAK]
- EXPORT Vector1C [WEAK]
- EXPORT Vector20 [WEAK]
- EXPORT Vector24 [WEAK]
- EXPORT Vector28 [WEAK]
- EXPORT SVCallVector [WEAK]
- EXPORT DebugMonitorVector [WEAK]
- EXPORT Vector34 [WEAK]
- EXPORT PendSVVector [WEAK]
- EXPORT SysTickVector [WEAK]
- EXPORT Vector40 [WEAK]
- EXPORT Vector44 [WEAK]
- EXPORT Vector48 [WEAK]
- EXPORT Vector4C [WEAK]
- EXPORT Vector50 [WEAK]
- EXPORT Vector54 [WEAK]
- EXPORT Vector58 [WEAK]
- EXPORT Vector5C [WEAK]
- EXPORT Vector60 [WEAK]
- EXPORT Vector64 [WEAK]
- EXPORT Vector68 [WEAK]
- EXPORT Vector6C [WEAK]
- EXPORT Vector70 [WEAK]
- EXPORT Vector74 [WEAK]
- EXPORT Vector78 [WEAK]
- EXPORT Vector7C [WEAK]
- EXPORT Vector80 [WEAK]
- EXPORT Vector84 [WEAK]
- EXPORT Vector88 [WEAK]
- EXPORT Vector8C [WEAK]
- EXPORT Vector90 [WEAK]
- EXPORT Vector94 [WEAK]
- EXPORT Vector98 [WEAK]
- EXPORT Vector9C [WEAK]
- EXPORT VectorA0 [WEAK]
- EXPORT VectorA4 [WEAK]
- EXPORT VectorA8 [WEAK]
- EXPORT VectorAC [WEAK]
- EXPORT VectorB0 [WEAK]
- EXPORT VectorB4 [WEAK]
- EXPORT VectorB8 [WEAK]
- EXPORT VectorBC [WEAK]
- EXPORT VectorC0 [WEAK]
- EXPORT VectorC4 [WEAK]
- EXPORT VectorC8 [WEAK]
- EXPORT VectorCC [WEAK]
- EXPORT VectorD0 [WEAK]
- EXPORT VectorD4 [WEAK]
- EXPORT VectorD8 [WEAK]
- EXPORT VectorDC [WEAK]
- EXPORT VectorE0 [WEAK]
- EXPORT VectorE4 [WEAK]
- EXPORT VectorE8 [WEAK]
- EXPORT VectorEC [WEAK]
- EXPORT VectorF0 [WEAK]
- EXPORT VectorF4 [WEAK]
- EXPORT VectorF8 [WEAK]
- EXPORT VectorFC [WEAK]
- EXPORT Vector100 [WEAK]
- EXPORT Vector104 [WEAK]
- EXPORT Vector108 [WEAK]
- EXPORT Vector10C [WEAK]
- EXPORT Vector110 [WEAK]
- EXPORT Vector114 [WEAK]
- EXPORT Vector118 [WEAK]
- EXPORT Vector11C [WEAK]
- EXPORT Vector120 [WEAK]
- EXPORT Vector124 [WEAK]
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-VectorF4
-VectorF8
-VectorFC
-Vector100
-Vector104
-Vector108
-Vector10C
-Vector110
-Vector114
-Vector118
-Vector11C
-Vector120
-Vector124
- b _unhandled_exception
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h deleted file mode 100644 index b1057616f..000000000 --- a/os/ports/RVCT/ARMCMx/STM32F1xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/STM32F1xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F1xx.
- *
- * @defgroup RVCT_ARMCMx_STM32F1xx STM32F1xx Specific Parameters
- * @ingroup RVCT_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * STM32F1xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU FALSE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/STM32F1xx/vectors.s b/os/ports/RVCT/ARMCMx/STM32F1xx/vectors.s deleted file mode 100644 index f3a303543..000000000 --- a/os/ports/RVCT/ARMCMx/STM32F1xx/vectors.s +++ /dev/null @@ -1,306 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#if !defined(STM32F10X_LD) && !defined(STM32F10X_LD_VL) && \
- !defined(STM32F10X_MD) && !defined(STM32F10X_MD_VL) && \
- !defined(STM32F10X_HD) && !defined(STM32F10X_XL) && \
- !defined(STM32F10X_CL)
-#define _FROM_ASM_
-#include "board.h"
-#endif
-
- PRESERVE8
-
- AREA RESET, DATA, READONLY
-
- IMPORT __initial_msp
- IMPORT Reset_Handler
- EXPORT __Vectors
-
-__Vectors
- DCD __initial_msp
- DCD Reset_Handler
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
-#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
- defined(STM32F10X_XL) || defined(STM32F10X_CL)
- DCD VectorEC
- DCD VectorF0
- DCD VectorF4
-#endif
-#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
- DCD VectorF8
- DCD VectorFC
- DCD Vector100
- DCD Vector104
- DCD Vector108
- DCD Vector10C
- DCD Vector110
- DCD Vector114
- DCD Vector118
- DCD Vector11C
- DCD Vector120
- DCD Vector124
- DCD Vector128
- DCD Vector12C
-#endif
-#if defined(STM32F10X_CL)
- DCD Vector130
- DCD Vector134
- DCD Vector138
- DCD Vector13C
- DCD Vector140
- DCD Vector144
- DCD Vector148
- DCD Vector14C
-#endif
-
- AREA |.text|, CODE, READONLY
- THUMB
-
-/*
- * Default interrupt handlers.
- */
- EXPORT _unhandled_exception
-_unhandled_exception PROC
- EXPORT NMIVector [WEAK]
- EXPORT HardFaultVector [WEAK]
- EXPORT MemManageVector [WEAK]
- EXPORT BusFaultVector [WEAK]
- EXPORT UsageFaultVector [WEAK]
- EXPORT Vector1C [WEAK]
- EXPORT Vector20 [WEAK]
- EXPORT Vector24 [WEAK]
- EXPORT Vector28 [WEAK]
- EXPORT SVCallVector [WEAK]
- EXPORT DebugMonitorVector [WEAK]
- EXPORT Vector34 [WEAK]
- EXPORT PendSVVector [WEAK]
- EXPORT SysTickVector [WEAK]
- EXPORT Vector40 [WEAK]
- EXPORT Vector44 [WEAK]
- EXPORT Vector48 [WEAK]
- EXPORT Vector4C [WEAK]
- EXPORT Vector50 [WEAK]
- EXPORT Vector54 [WEAK]
- EXPORT Vector58 [WEAK]
- EXPORT Vector5C [WEAK]
- EXPORT Vector60 [WEAK]
- EXPORT Vector64 [WEAK]
- EXPORT Vector68 [WEAK]
- EXPORT Vector6C [WEAK]
- EXPORT Vector70 [WEAK]
- EXPORT Vector74 [WEAK]
- EXPORT Vector78 [WEAK]
- EXPORT Vector7C [WEAK]
- EXPORT Vector80 [WEAK]
- EXPORT Vector84 [WEAK]
- EXPORT Vector88 [WEAK]
- EXPORT Vector8C [WEAK]
- EXPORT Vector90 [WEAK]
- EXPORT Vector94 [WEAK]
- EXPORT Vector98 [WEAK]
- EXPORT Vector9C [WEAK]
- EXPORT VectorA0 [WEAK]
- EXPORT VectorA4 [WEAK]
- EXPORT VectorA8 [WEAK]
- EXPORT VectorAC [WEAK]
- EXPORT VectorB0 [WEAK]
- EXPORT VectorB4 [WEAK]
- EXPORT VectorB8 [WEAK]
- EXPORT VectorBC [WEAK]
- EXPORT VectorC0 [WEAK]
- EXPORT VectorC4 [WEAK]
- EXPORT VectorC8 [WEAK]
- EXPORT VectorCC [WEAK]
- EXPORT VectorD0 [WEAK]
- EXPORT VectorD4 [WEAK]
- EXPORT VectorD8 [WEAK]
- EXPORT VectorDC [WEAK]
- EXPORT VectorE0 [WEAK]
- EXPORT VectorE4 [WEAK]
- EXPORT VectorE8 [WEAK]
- EXPORT VectorEC [WEAK]
- EXPORT VectorF0 [WEAK]
- EXPORT VectorF4 [WEAK]
- EXPORT VectorF8 [WEAK]
- EXPORT VectorFC [WEAK]
- EXPORT Vector100 [WEAK]
- EXPORT Vector104 [WEAK]
- EXPORT Vector108 [WEAK]
- EXPORT Vector10C [WEAK]
- EXPORT Vector110 [WEAK]
- EXPORT Vector114 [WEAK]
- EXPORT Vector118 [WEAK]
- EXPORT Vector11C [WEAK]
- EXPORT Vector120 [WEAK]
- EXPORT Vector124 [WEAK]
- EXPORT Vector128 [WEAK]
- EXPORT Vector12C [WEAK]
- EXPORT Vector130 [WEAK]
- EXPORT Vector134 [WEAK]
- EXPORT Vector138 [WEAK]
- EXPORT Vector13C [WEAK]
- EXPORT Vector140 [WEAK]
- EXPORT Vector144 [WEAK]
- EXPORT Vector148 [WEAK]
- EXPORT Vector14C [WEAK]
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-VectorF4
-VectorF8
-VectorFC
-Vector100
-Vector104
-Vector108
-Vector10C
-Vector110
-Vector114
-Vector118
-Vector11C
-Vector120
-Vector124
-Vector128
-Vector12C
-Vector130
-Vector134
-Vector138
-Vector13C
-Vector140
-Vector144
-Vector148
-Vector14C
- b _unhandled_exception
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h deleted file mode 100644 index 8c040789f..000000000 --- a/os/ports/RVCT/ARMCMx/STM32F4xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/STM32F4xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32F4xx.
- *
- * @defgroup RVCT_ARMCMx_STM32F4xx STM32F4xx Specific Parameters
- * @ingroup RVCT_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * STM32F4xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M4
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU TRUE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s b/os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s deleted file mode 100644 index 6a912c5af..000000000 --- a/os/ports/RVCT/ARMCMx/STM32F4xx/vectors.s +++ /dev/null @@ -1,338 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#if !defined(STM32F4XX)
-#define _FROM_ASM_
-#include "board.h"
-#endif
-
- PRESERVE8
-
- AREA RESET, DATA, READONLY
-
- IMPORT __initial_msp
- IMPORT Reset_Handler
- EXPORT __Vectors
-
-__Vectors
- DCD __initial_msp
- DCD Reset_Handler
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
- DCD VectorEC
- DCD VectorF0
- DCD VectorF4
- DCD VectorF8
- DCD VectorFC
- DCD Vector100
- DCD Vector104
- DCD Vector108
- DCD Vector10C
- DCD Vector110
- DCD Vector114
- DCD Vector118
- DCD Vector11C
- DCD Vector120
- DCD Vector124
- DCD Vector128
- DCD Vector12C
- DCD Vector130
- DCD Vector134
- DCD Vector138
- DCD Vector13C
- DCD Vector140
- DCD Vector144
- DCD Vector148
- DCD Vector14C
- DCD Vector150
- DCD Vector154
- DCD Vector158
- DCD Vector15C
- DCD Vector160
- DCD Vector164
- DCD Vector168
- DCD Vector16C
- DCD Vector170
- DCD Vector174
- DCD Vector178
- DCD Vector17C
- DCD Vector180
- DCD Vector184
-
- AREA |.text|, CODE, READONLY
- THUMB
-
-/*
- * Default interrupt handlers.
- */
- EXPORT _unhandled_exception
-_unhandled_exception PROC
- EXPORT NMIVector [WEAK]
- EXPORT HardFaultVector [WEAK]
- EXPORT MemManageVector [WEAK]
- EXPORT BusFaultVector [WEAK]
- EXPORT UsageFaultVector [WEAK]
- EXPORT Vector1C [WEAK]
- EXPORT Vector20 [WEAK]
- EXPORT Vector24 [WEAK]
- EXPORT Vector28 [WEAK]
- EXPORT SVCallVector [WEAK]
- EXPORT DebugMonitorVector [WEAK]
- EXPORT Vector34 [WEAK]
- EXPORT PendSVVector [WEAK]
- EXPORT SysTickVector [WEAK]
- EXPORT Vector40 [WEAK]
- EXPORT Vector44 [WEAK]
- EXPORT Vector48 [WEAK]
- EXPORT Vector4C [WEAK]
- EXPORT Vector50 [WEAK]
- EXPORT Vector54 [WEAK]
- EXPORT Vector58 [WEAK]
- EXPORT Vector5C [WEAK]
- EXPORT Vector60 [WEAK]
- EXPORT Vector64 [WEAK]
- EXPORT Vector68 [WEAK]
- EXPORT Vector6C [WEAK]
- EXPORT Vector70 [WEAK]
- EXPORT Vector74 [WEAK]
- EXPORT Vector78 [WEAK]
- EXPORT Vector7C [WEAK]
- EXPORT Vector80 [WEAK]
- EXPORT Vector84 [WEAK]
- EXPORT Vector88 [WEAK]
- EXPORT Vector8C [WEAK]
- EXPORT Vector90 [WEAK]
- EXPORT Vector94 [WEAK]
- EXPORT Vector98 [WEAK]
- EXPORT Vector9C [WEAK]
- EXPORT VectorA0 [WEAK]
- EXPORT VectorA4 [WEAK]
- EXPORT VectorA8 [WEAK]
- EXPORT VectorAC [WEAK]
- EXPORT VectorB0 [WEAK]
- EXPORT VectorB4 [WEAK]
- EXPORT VectorB8 [WEAK]
- EXPORT VectorBC [WEAK]
- EXPORT VectorC0 [WEAK]
- EXPORT VectorC4 [WEAK]
- EXPORT VectorC8 [WEAK]
- EXPORT VectorCC [WEAK]
- EXPORT VectorD0 [WEAK]
- EXPORT VectorD4 [WEAK]
- EXPORT VectorD8 [WEAK]
- EXPORT VectorDC [WEAK]
- EXPORT VectorE0 [WEAK]
- EXPORT VectorE4 [WEAK]
- EXPORT VectorE8 [WEAK]
- EXPORT VectorEC [WEAK]
- EXPORT VectorF0 [WEAK]
- EXPORT VectorF4 [WEAK]
- EXPORT VectorF8 [WEAK]
- EXPORT VectorFC [WEAK]
- EXPORT Vector100 [WEAK]
- EXPORT Vector104 [WEAK]
- EXPORT Vector108 [WEAK]
- EXPORT Vector10C [WEAK]
- EXPORT Vector110 [WEAK]
- EXPORT Vector114 [WEAK]
- EXPORT Vector118 [WEAK]
- EXPORT Vector11C [WEAK]
- EXPORT Vector120 [WEAK]
- EXPORT Vector124 [WEAK]
- EXPORT Vector128 [WEAK]
- EXPORT Vector12C [WEAK]
- EXPORT Vector130 [WEAK]
- EXPORT Vector134 [WEAK]
- EXPORT Vector138 [WEAK]
- EXPORT Vector13C [WEAK]
- EXPORT Vector140 [WEAK]
- EXPORT Vector144 [WEAK]
- EXPORT Vector148 [WEAK]
- EXPORT Vector14C [WEAK]
- EXPORT Vector150 [WEAK]
- EXPORT Vector154 [WEAK]
- EXPORT Vector158 [WEAK]
- EXPORT Vector15C [WEAK]
- EXPORT Vector160 [WEAK]
- EXPORT Vector164 [WEAK]
- EXPORT Vector168 [WEAK]
- EXPORT Vector16C [WEAK]
- EXPORT Vector170 [WEAK]
- EXPORT Vector174 [WEAK]
- EXPORT Vector178 [WEAK]
- EXPORT Vector17C [WEAK]
- EXPORT Vector180 [WEAK]
- EXPORT Vector184 [WEAK]
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
-VectorF4
-VectorF8
-VectorFC
-Vector100
-Vector104
-Vector108
-Vector10C
-Vector110
-Vector114
-Vector118
-Vector11C
-Vector120
-Vector124
-Vector128
-Vector12C
-Vector130
-Vector134
-Vector138
-Vector13C
-Vector140
-Vector144
-Vector148
-Vector14C
-Vector150
-Vector154
-Vector158
-Vector15C
-Vector160
-Vector164
-Vector168
-Vector16C
-Vector170
-Vector174
-Vector178
-Vector17C
-Vector180
-Vector184
- b _unhandled_exception
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h deleted file mode 100644 index 61916a722..000000000 --- a/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h +++ /dev/null @@ -1,62 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/STM32L1xx/cmparams.h
- * @brief ARM Cortex-M3 parameters for the STM32L1xx.
- *
- * @defgroup RVCT_ARMCMx_STM32L1xx STM32L1xx Specific Parameters
- * @ingroup RVCT_ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M3 specific parameters for the
- * STM32L1xx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL CORTEX_M3
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Memory Protection unit presence.
- */
-#define CORTEX_HAS_MPU TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s b/os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s deleted file mode 100644 index da0f368c0..000000000 --- a/os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s +++ /dev/null @@ -1,227 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#if !defined(STM32L1XX_MD)
-#define _FROM_ASM_
-#include "board.h"
-#endif
-
- PRESERVE8
-
- AREA RESET, DATA, READONLY
-
- IMPORT __initial_msp
- IMPORT Reset_Handler
- EXPORT __Vectors
-
-__Vectors
- DCD __initial_msp
- DCD Reset_Handler
- DCD NMIVector
- DCD HardFaultVector
- DCD MemManageVector
- DCD BusFaultVector
- DCD UsageFaultVector
- DCD Vector1C
- DCD Vector20
- DCD Vector24
- DCD Vector28
- DCD SVCallVector
- DCD DebugMonitorVector
- DCD Vector34
- DCD PendSVVector
- DCD SysTickVector
- DCD Vector40
- DCD Vector44
- DCD Vector48
- DCD Vector4C
- DCD Vector50
- DCD Vector54
- DCD Vector58
- DCD Vector5C
- DCD Vector60
- DCD Vector64
- DCD Vector68
- DCD Vector6C
- DCD Vector70
- DCD Vector74
- DCD Vector78
- DCD Vector7C
- DCD Vector80
- DCD Vector84
- DCD Vector88
- DCD Vector8C
- DCD Vector90
- DCD Vector94
- DCD Vector98
- DCD Vector9C
- DCD VectorA0
- DCD VectorA4
- DCD VectorA8
- DCD VectorAC
- DCD VectorB0
- DCD VectorB4
- DCD VectorB8
- DCD VectorBC
- DCD VectorC0
- DCD VectorC4
- DCD VectorC8
- DCD VectorCC
- DCD VectorD0
- DCD VectorD4
- DCD VectorD8
- DCD VectorDC
- DCD VectorE0
- DCD VectorE4
- DCD VectorE8
- DCD VectorEC
- DCD VectorF0
-
- AREA |.text|, CODE, READONLY
- THUMB
-
-/*
- * Default interrupt handlers.
- */
- EXPORT _unhandled_exception
-_unhandled_exception PROC
- EXPORT NMIVector [WEAK]
- EXPORT HardFaultVector [WEAK]
- EXPORT MemManageVector [WEAK]
- EXPORT BusFaultVector [WEAK]
- EXPORT UsageFaultVector [WEAK]
- EXPORT Vector1C [WEAK]
- EXPORT Vector20 [WEAK]
- EXPORT Vector24 [WEAK]
- EXPORT Vector28 [WEAK]
- EXPORT SVCallVector [WEAK]
- EXPORT DebugMonitorVector [WEAK]
- EXPORT Vector34 [WEAK]
- EXPORT PendSVVector [WEAK]
- EXPORT SysTickVector [WEAK]
- EXPORT Vector40 [WEAK]
- EXPORT Vector44 [WEAK]
- EXPORT Vector48 [WEAK]
- EXPORT Vector4C [WEAK]
- EXPORT Vector50 [WEAK]
- EXPORT Vector54 [WEAK]
- EXPORT Vector58 [WEAK]
- EXPORT Vector5C [WEAK]
- EXPORT Vector60 [WEAK]
- EXPORT Vector64 [WEAK]
- EXPORT Vector68 [WEAK]
- EXPORT Vector6C [WEAK]
- EXPORT Vector70 [WEAK]
- EXPORT Vector74 [WEAK]
- EXPORT Vector78 [WEAK]
- EXPORT Vector7C [WEAK]
- EXPORT Vector80 [WEAK]
- EXPORT Vector84 [WEAK]
- EXPORT Vector88 [WEAK]
- EXPORT Vector8C [WEAK]
- EXPORT Vector90 [WEAK]
- EXPORT Vector94 [WEAK]
- EXPORT Vector98 [WEAK]
- EXPORT Vector9C [WEAK]
- EXPORT VectorA0 [WEAK]
- EXPORT VectorA4 [WEAK]
- EXPORT VectorA8 [WEAK]
- EXPORT VectorAC [WEAK]
- EXPORT VectorB0 [WEAK]
- EXPORT VectorB4 [WEAK]
- EXPORT VectorB8 [WEAK]
- EXPORT VectorBC [WEAK]
- EXPORT VectorC0 [WEAK]
- EXPORT VectorC4 [WEAK]
- EXPORT VectorC8 [WEAK]
- EXPORT VectorCC [WEAK]
- EXPORT VectorD0 [WEAK]
- EXPORT VectorD4 [WEAK]
- EXPORT VectorD8 [WEAK]
- EXPORT VectorDC [WEAK]
- EXPORT VectorE0 [WEAK]
- EXPORT VectorE4 [WEAK]
- EXPORT VectorE8 [WEAK]
- EXPORT VectorEC [WEAK]
- EXPORT VectorF0 [WEAK]
-
-NMIVector
-HardFaultVector
-MemManageVector
-BusFaultVector
-UsageFaultVector
-Vector1C
-Vector20
-Vector24
-Vector28
-SVCallVector
-DebugMonitorVector
-Vector34
-PendSVVector
-SysTickVector
-Vector40
-Vector44
-Vector48
-Vector4C
-Vector50
-Vector54
-Vector58
-Vector5C
-Vector60
-Vector64
-Vector68
-Vector6C
-Vector70
-Vector74
-Vector78
-Vector7C
-Vector80
-Vector84
-Vector88
-Vector8C
-Vector90
-Vector94
-Vector98
-Vector9C
-VectorA0
-VectorA4
-VectorA8
-VectorAC
-VectorB0
-VectorB4
-VectorB8
-VectorBC
-VectorC0
-VectorC4
-VectorC8
-VectorCC
-VectorD0
-VectorD4
-VectorD8
-VectorDC
-VectorE0
-VectorE4
-VectorE8
-VectorEC
-VectorF0
- b _unhandled_exception
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/chcore.c b/os/ports/RVCT/ARMCMx/chcore.c deleted file mode 100644 index cb5993577..000000000 --- a/os/ports/RVCT/ARMCMx/chcore.c +++ /dev/null @@ -1,46 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chcore.c
- * @brief ARM Cortex-Mx port code.
- *
- * @addtogroup RVCT_ARMCMx_CORE
- * @{
- */
-
-#include "ch.h"
-
-/**
- * @brief Halts the system.
- * @note The function is declared as a weak symbol, it is possible
- * to redefine it in your application code.
- */
-#if !defined(__DOXYGEN__)
-__attribute__((weak))
-#endif
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h deleted file mode 100644 index 79f7916fb..000000000 --- a/os/ports/RVCT/ARMCMx/chcore.h +++ /dev/null @@ -1,188 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chcore.h
- * @brief ARM Cortex-Mx port macros and structures.
- *
- * @addtogroup RVCT_ARMCMx_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-/*===========================================================================*/
-/* Port constants (common). */
-/*===========================================================================*/
-
-/* Added to make the header stand-alone when included from asm.*/
-#ifndef FALSE
-#define FALSE 0
-#endif
-#ifndef TRUE
-#define TRUE (!FALSE)
-#endif
-
-#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
-#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */
-#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
-#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
-
-/* Inclusion of the Cortex-Mx implementation specific parameters.*/
-#include "cmparams.h"
-
-/* Cortex model check, only M0 and M3 supported right now.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
- (CORTEX_MODEL == CORTEX_M4)
-#elif (CORTEX_MODEL == CORTEX_M1)
-#error "untested Cortex-M model"
-#else
-#error "unknown or unsupported Cortex-M model"
-#endif
-
-/**
- * @brief Total priority levels.
- */
-#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS)
-
-/**
- * @brief Minimum priority level.
- * @details This minimum priority level is calculated from the number of
- * priority bits supported by the specific Cortex-Mx implementation.
- */
-#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1)
-
-/**
- * @brief Maximum priority level.
- * @details The maximum allowed priority level is always zero.
- */
-#define CORTEX_MAXIMUM_PRIORITY 0
-
-/*===========================================================================*/
-/* Port macros (common). */
-/*===========================================================================*/
-
-/**
- * @brief Priority level verification macro.
- */
-#define CORTEX_IS_VALID_PRIORITY(n) \
- (((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
-
-/**
- * @brief Priority level verification macro.
- */
-#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
- (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
-
-/**
- * @brief Priority level to priority mask conversion macro.
- */
-#define CORTEX_PRIORITY_MASK(n) \
- ((n) << (8 - CORTEX_PRIORITY_BITS))
-
-/*===========================================================================*/
-/* Port configurable parameters (common). */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port derived parameters (common). */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port exported info (common). */
-/*===========================================================================*/
-
-/**
- * @brief Macro defining a generic ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "RVCT"
-
-/*===========================================================================*/
-/* Port implementation part (common). */
-/*===========================================================================*/
-
-/* Includes the sub-architecture-specific part.*/
-#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M1)
-#include "chcore_v6m.h"
-#elif (CORTEX_MODEL == CORTEX_M3) || (CORTEX_MODEL == CORTEX_M4)
-#include "chcore_v7m.h"
-#endif
-
-#if !defined(_FROM_ASM_)
-
-#include "nvic.h"
-
-/* The following declarations are there just for Doxygen documentation, the
- real declarations are inside the sub-headers.*/
-#if defined(__DOXYGEN__)
-
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note It is implemented to match the Cortex-Mx exception context.
- */
-struct extctx {};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
-struct intctx {};
-
-#endif /* defined(__DOXYGEN__) */
-
-/**
- * @brief Excludes the default @p chSchIsPreemptionRequired()implementation.
- */
-#define PORT_OPTIMIZED_ISPREEMPTIONREQUIRED
-
-#if (CH_CFG_TIME_QUANTUM > 0) || defined(__DOXYGEN__)
-/**
- * @brief Inline-able version of this kernel function.
- */
-#define chSchIsPreemptionRequired() \
- (currp->p_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
- firstprio(&rlist.r_queue) >= currp->p_prio)
-#else /* CH_CFG_TIME_QUANTUM == 0 */
-#define chSchIsPreemptionRequired() \
- (firstprio(&rlist.r_queue) > currp->p_prio)
-#endif /* CH_CFG_TIME_QUANTUM == 0 */
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.c b/os/ports/RVCT/ARMCMx/chcore_v6m.c deleted file mode 100644 index d8183cdd4..000000000 --- a/os/ports/RVCT/ARMCMx/chcore_v6m.c +++ /dev/null @@ -1,128 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chcore_v6m.c
- * @brief ARMv6-M architecture port code.
- *
- * @addtogroup RVCT_ARMCMx_V6M_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Port interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief System Timer vector.
- * @details This interrupt is used as system tick.
- * @note The timer must be initialized in the startup code.
- */
-CH_IRQ_HANDLER(SysTickVector) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- chSysTimerHandlerI();
- chSysUnlockFromIsr();
-
- CH_IRQ_EPILOGUE();
-}
-
-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-/**
- * @brief NMI vector.
- * @details The NMI vector is used for exception mode re-entering after a
- * context switch.
- */
-void NMIVector(void) {
- register struct extctx *ctxp;
- register uint32_t psp __asm("psp");
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp = (struct extctx *)psp;
- ctxp++;
- psp = (uint32_t)ctxp;
- port_unlock_from_isr();
-}
-#endif /* !CORTEX_ALTERNATE_SWITCH */
-
-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-/**
- * @brief PendSV vector.
- * @details The PendSV vector is used for exception mode re-entering after a
- * context switch.
- */
-void PendSVVector(void) {
- register struct extctx *ctxp;
- register uint32_t psp __asm("psp");
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp = (struct extctx *)psp;
- ctxp++;
- psp = (uint32_t)ctxp;
-}
-#endif /* CORTEX_ALTERNATE_SWITCH */
-
-/*===========================================================================*/
-/* Port exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief IRQ epilogue code.
- *
- * @param[in] lr value of the @p LR register on ISR entry
- */
-void _port_irq_epilogue(regarm_t lr) {
-
- if (lr != (regarm_t)0xFFFFFFF1) {
- register struct extctx *ctxp;
- register uint32_t psp __asm("psp");
-
- port_lock_from_isr();
- /* Adding an artificial exception return context, there is no need to
- populate it fully.*/
- ctxp = (struct extctx *)psp;
- ctxp--;
- psp = (uint32_t)ctxp;
- ctxp->xpsr = (regarm_t)0x01000000;
-
- /* The exit sequence is different depending on if a preemption is
- required or not.*/
- if (chSchIsPreemptionRequired()) {
- /* Preemption is required we need to enforce a context switch.*/
- ctxp->pc = (regarm_t)_port_switch_from_isr;
- }
- else {
- /* Preemption not required, we just need to exit the exception
- atomically.*/
- ctxp->pc = (regarm_t)_port_exit_from_isr;
- }
-
- /* Note, returning without unlocking is intentional, this is done in
- order to keep the rest of the context switch atomic.*/
- }
-}
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.h b/os/ports/RVCT/ARMCMx/chcore_v6m.h deleted file mode 100644 index 2ed119dd3..000000000 --- a/os/ports/RVCT/ARMCMx/chcore_v6m.h +++ /dev/null @@ -1,380 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chcore_v6m.h
- * @brief ARMv6-M architecture port macros and structures.
- *
- * @addtogroup RVCT_ARMCMx_V6M_CORE
- * @{
- */
-
-#ifndef _CHCORE_V6M_H_
-#define _CHCORE_V6M_H_
-
-/*===========================================================================*/
-/* Port constants. */
-/*===========================================================================*/
-
-/**
- * @brief PendSV priority level.
- * @note This priority is enforced to be equal to @p 0,
- * this handler always has the highest priority that cannot preempt
- * the kernel.
- */
-#define CORTEX_PRIORITY_PENDSV 0
-
-/*===========================================================================*/
-/* Port macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 16 because the idle thread does have
- * a stack frame when compiling without optimizations. You may
- * reduce this value to zero when compiling with optimizations.
- */
-#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
-#define PORT_IDLE_THREAD_STACK_SIZE 16
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * @note In this port this value is conservatively set to 32 because the
- * function @p chSchDoReschedule() can have a stack frame, especially
- * with compiler optimizations disabled. The value can be reduced
- * when compiler optimizations are enabled.
- */
-#if !defined(PORT_INT_REQUIRED_STACK)
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#if !defined(CORTEX_ENABLE_WFI_IDLE)
-#define CORTEX_ENABLE_WFI_IDLE FALSE
-#endif
-
-/**
- * @brief SYSTICK handler priority.
- * @note The default SYSTICK handler priority is calculated as the priority
- * level in the middle of the numeric priorities range.
- */
-#if !defined(CORTEX_PRIORITY_SYSTICK)
-#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
-#endif
-
-/**
- * @brief Alternate preemption method.
- * @details Activating this option will make the Kernel use the PendSV
- * handler for preemption instead of the NMI handler.
- */
-#ifndef CORTEX_ALTERNATE_SWITCH
-#define CORTEX_ALTERNATE_SWITCH FALSE
-#endif
-
-/*===========================================================================*/
-/* Port derived parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Maximum usable priority for normal ISRs.
- */
-#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-#define CORTEX_MAX_KERNEL_PRIORITY 1
-#else
-#define CORTEX_MAX_KERNEL_PRIORITY 0
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Macro defining the specific ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM_v6M
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "ARMv6-M"
-
-/**
- * @brief Name of the architecture variant.
- */
-#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)
-#define CH_CORE_VARIANT_NAME "Cortex-M0"
-#elif (CORTEX_MODEL == CORTEX_M1)
-#define CH_CORE_VARIANT_NAME "Cortex-M1"
-#endif
-
-/**
- * @brief Port-specific information string.
- */
-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
-#define CH_PORT_INFO "Preemption through NMI"
-#else
-#define CH_PORT_INFO "Preemption through PendSV"
-#endif
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
- /* The documentation of the following declarations is in chconf.h in order
- to not have duplicated structure names into the documentation.*/
-#if !defined(__DOXYGEN__)
-
-struct extctx {
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_thd;
- regarm_t pc;
- regarm_t xpsr;
-};
-
-struct intctx {
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t lr;
-};
-
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = (regarm_t)pf; \
- tp->p_ctx.r13->r5 = (regarm_t)arg; \
- tp->p_ctx.r13->lr = (regarm_t)_port_thread_start; \
-}
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE() regarm_t _saved_lr = (regarm_t)__return_address()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() _port_irq_epilogue(_saved_lr)
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_FAST_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Port-related initialization code.
- */
-#define port_init() { \
- SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \
- nvicSetSystemHandlerPriority(HANDLER_PENDSV, \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV)); \
- nvicSetSystemHandlerPriority(HANDLER_SYSTICK, \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK)); \
-}
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- */
-#define port_lock() __disable_irq()
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- */
-#define port_unlock() __enable_irq()
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_lock_from_isr() port_lock()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_unlock_from_isr() port_unlock()
-
-/**
- * @brief Disables all the interrupt sources.
- */
-#define port_disable() __disable_irq()
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- */
-#define port_suspend() __disable_irq()
-
-/**
- * @brief Enables all the interrupt sources.
- */
-#define port_enable() __enable_irq()
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note Implemented as an inlined @p WFI instruction.
- */
-#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() __wfi()
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- uint8_t *r13 = (uint8_t *)__current_sp(); \
- if ((stkalign_t *)(r13 - sizeof(struct intctx)) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_halt(void);
- void _port_irq_epilogue(regarm_t lr);
- void _port_switch_from_isr(void);
- void _port_exit_from_isr(void);
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_V6M_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/chcore_v7m.c b/os/ports/RVCT/ARMCMx/chcore_v7m.c deleted file mode 100644 index 9912e3cb2..000000000 --- a/os/ports/RVCT/ARMCMx/chcore_v7m.c +++ /dev/null @@ -1,205 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chcore_v7m.c
- * @brief ARMv7-M architecture port code.
- *
- * @addtogroup RVCT_ARMCMx_V7M_CORE
- * @{
- */
-
-#include "ch.h"
-
-/*===========================================================================*/
-/* Port interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief System Timer vector.
- * @details This interrupt is used as system tick.
- * @note The timer must be initialized in the startup code.
- */
-CH_IRQ_HANDLER(SysTickVector) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- chSysTimerHandlerI();
- chSysUnlockFromIsr();
-
- CH_IRQ_EPILOGUE();
-}
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief SVC vector.
- * @details The SVC vector is used for exception mode re-entering after a
- * context switch.
- * @note The PendSV vector is only used in advanced kernel mode.
- */
-void SVCallVector(void) {
- struct extctx *ctxp;
- register uint32_t psp __asm("psp");
-
- /* Current PSP value.*/
- ctxp = (struct extctx *)psp;
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp++;
-
-#if CORTEX_USE_FPU
- /* Restoring the special register SCB_FPCCR.*/
- SCB_FPCCR = (uint32_t)ctxp->fpccr;
- SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
-#endif
- psp = (uint32_t)ctxp;
- port_unlock_from_isr();
-}
-#endif /* !CORTEX_SIMPLIFIED_PRIORITY */
-
-#if CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief PendSV vector.
- * @details The PendSV vector is used for exception mode re-entering after a
- * context switch.
- * @note The PendSV vector is only used in compact kernel mode.
- */
-void PendSVVector(void) {
- struct extctx *ctxp;
- register uint32_t psp __asm("psp");
-
- /* Current PSP value.*/
- ctxp = (struct extctx *)psp;
-
- /* Discarding the current exception context and positioning the stack to
- point to the real one.*/
- ctxp++;
-
-#if CORTEX_USE_FPU
- /* Restoring the special register SCB_FPCCR.*/
- SCB_FPCCR = (uint32_t)ctxp->fpccr;
- SCB_FPCAR = SCB_FPCAR + sizeof (struct extctx);
-#endif
- psp = (uint32_t)ctxp;
-}
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/*===========================================================================*/
-/* Port exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Port-related initialization code.
- */
-void _port_init(void) {
-
- /* Initialization of the vector table and priority related settings.*/
- SCB_VTOR = CORTEX_VTOR_INIT;
- SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(CORTEX_PRIGROUP_INIT);
-
-#if CORTEX_USE_FPU
- {
- register uint32_t control __asm("control");
- register uint32_t fpscr __asm("fpscr");
-
- /* Initializing the FPU context save in lazy mode.*/
- SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
-
- /* CP10 and CP11 set to full access in the startup code.*/
-/* SCB_CPACR |= 0x00F00000;*/
-
- /* Enables FPU context save/restore on exception entry/exit (FPCA bit).*/
- control |= 4;
-
- /* FPSCR and FPDSCR initially zero.*/
- fpscr = 0;
- SCB_FPDSCR = 0;
- }
-#endif
-
- /* Initialization of the system vectors used by the port.*/
- nvicSetSystemHandlerPriority(HANDLER_SVCALL,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));
- nvicSetSystemHandlerPriority(HANDLER_PENDSV,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV));
- nvicSetSystemHandlerPriority(HANDLER_SYSTICK,
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK));
-}
-
-/**
- * @brief Exception exit redirection to _port_switch_from_isr().
- */
-void _port_irq_epilogue(void) {
-
- port_lock_from_isr();
- if ((SCB_ICSR & ICSR_RETTOBASE) != 0) {
- struct extctx *ctxp;
- register uint32_t psp __asm("psp");
-
- /* Current PSP value.*/
- ctxp = (struct extctx *)psp;
-
- /* Adding an artificial exception return context, there is no need to
- populate it fully.*/
- ctxp--;
- psp = (uint32_t)ctxp;
- ctxp->xpsr = (regarm_t)0x01000000;
-
- /* The exit sequence is different depending on if a preemption is
- required or not.*/
- if (chSchIsPreemptionRequired()) {
-#if CORTEX_USE_FPU
- /* Triggering a lazy FPU state save.*/
- register uint32_t fpscr __asm("fpscr");
- ctxp->r0 = (regarm_t)fpscr;
-#endif
- /* Preemption is required we need to enforce a context switch.*/
- ctxp->pc = (regarm_t)_port_switch_from_isr;
- }
- else {
- /* Preemption not required, we just need to exit the exception
- atomically.*/
- ctxp->pc = (regarm_t)_port_exit_from_isr;
- }
-
-#if CORTEX_USE_FPU
- {
- uint32_t fpccr;
-
- /* Saving the special register SCB_FPCCR into the reserved offset of
- the Cortex-M4 exception frame.*/
- (ctxp + 1)->fpccr = (regarm_t)(fpccr = SCB_FPCCR);
-
- /* Now the FPCCR is modified in order to not restore the FPU status
- from the artificial return context.*/
- SCB_FPCCR = fpccr | FPCCR_LSPACT;
- }
-#endif
-
- /* Note, returning without unlocking is intentional, this is done in
- order to keep the rest of the context switch atomic.*/
- return;
- }
- port_unlock_from_isr();
-}
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/chcore_v7m.h b/os/ports/RVCT/ARMCMx/chcore_v7m.h deleted file mode 100644 index 677a4dfc0..000000000 --- a/os/ports/RVCT/ARMCMx/chcore_v7m.h +++ /dev/null @@ -1,512 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chcore_v7m.h
- * @brief ARMv7-M architecture port macros and structures.
- *
- * @addtogroup RVCT_ARMCMx_V7M_CORE
- * @{
- */
-
-#ifndef _CHCORE_V7M_H_
-#define _CHCORE_V7M_H_
-
-/*===========================================================================*/
-/* Port constants. */
-/*===========================================================================*/
-
-/**
- * @brief Disabled value for BASEPRI register.
- */
-#define CORTEX_BASEPRI_DISABLED 0
-
-/*===========================================================================*/
-/* Port macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- * @note In this port it is set to 16 because the idle thread does have
- * a stack frame when compiling without optimizations. You may
- * reduce this value to zero when compiling with optimizations.
- */
-#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
-#define PORT_IDLE_THREAD_STACK_SIZE 16
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This constant is used in the calculation of the correct working
- * area size.
- * @note In this port this value is conservatively set to 32 because the
- * function @p chSchDoReschedule() can have a stack frame, especially
- * with compiler optimizations disabled. The value can be reduced
- * when compiler optimizations are enabled.
- */
-#if !defined(PORT_INT_REQUIRED_STACK)
-#define PORT_INT_REQUIRED_STACK 32
-#endif
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#if !defined(CORTEX_ENABLE_WFI_IDLE)
-#define CORTEX_ENABLE_WFI_IDLE FALSE
-#endif
-
-/**
- * @brief SYSTICK handler priority.
- * @note The default SYSTICK handler priority is calculated as the priority
- * level in the middle of the numeric priorities range.
- */
-#if !defined(CORTEX_PRIORITY_SYSTICK)
-#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
-#endif
-
-/**
- * @brief FPU support in context switch.
- * @details Activating this option activates the FPU support in the kernel.
- */
-#if !defined(CORTEX_USE_FPU)
-#define CORTEX_USE_FPU CORTEX_HAS_FPU
-#elif CORTEX_USE_FPU && !CORTEX_HAS_FPU
-/* This setting requires an FPU presence check in case it is externally
- redefined.*/
-#error "the selected core does not have an FPU"
-#endif
-
-/**
- * @brief Simplified priority handling flag.
- * @details Activating this option makes the Kernel work in compact mode.
- */
-#if !defined(CORTEX_SIMPLIFIED_PRIORITY)
-#define CORTEX_SIMPLIFIED_PRIORITY FALSE
-#endif
-
-/**
- * @brief SVCALL handler priority.
- * @note The default SVCALL handler priority is defaulted to
- * @p CORTEX_MAXIMUM_PRIORITY+1, this reserves the
- * @p CORTEX_MAXIMUM_PRIORITY priority level as fast interrupts
- * priority level.
- */
-#if !defined(CORTEX_PRIORITY_SVCALL)
-#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
-/* If it is externally redefined then better perform a validity check on it.*/
-#error "invalid priority level specified for CORTEX_PRIORITY_SVCALL"
-#endif
-
-/**
- * @brief NVIC VTOR initialization expression.
- */
-#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
-#define CORTEX_VTOR_INIT 0x00000000
-#endif
-
-/**
- * @brief NVIC PRIGROUP initialization expression.
- * @details The default assigns all available priority bits as preemption
- * priority with no sub-priority.
- */
-#if !defined(CORTEX_PRIGROUP_INIT) || defined(__DOXYGEN__)
-#define CORTEX_PRIGROUP_INIT (7 - CORTEX_PRIORITY_BITS)
-#endif
-
-/*===========================================================================*/
-/* Port derived parameters. */
-/*===========================================================================*/
-
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-/**
- * @brief Maximum usable priority for normal ISRs.
- */
-#define CORTEX_MAX_KERNEL_PRIORITY (CORTEX_PRIORITY_SVCALL + 1)
-
-/**
- * @brief BASEPRI level within kernel lock.
- * @note In compact kernel mode this constant value is enforced to zero.
- */
-#define CORTEX_BASEPRI_KERNEL \
- CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
-#else
-
-#define CORTEX_MAX_KERNEL_PRIORITY 1
-#define CORTEX_BASEPRI_KERNEL 0
-#endif
-
-/**
- * @brief PendSV priority level.
- * @note This priority is enforced to be equal to @p CORTEX_BASEPRI_KERNEL,
- * this handler always have the highest priority that cannot preempt
- * the kernel.
- */
-#define CORTEX_PRIORITY_PENDSV CORTEX_BASEPRI_KERNEL
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-#if (CORTEX_MODEL == CORTEX_M3) || defined(__DOXYGEN__)
-/**
- * @brief Macro defining the specific ARM architecture.
- */
-#define CH_ARCHITECTURE_ARM_v7M
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "ARMv7-M"
-
-/**
- * @brief Name of the architecture variant.
- */
-#define CH_CORE_VARIANT_NAME "Cortex-M3"
-
-#elif (CORTEX_MODEL == CORTEX_M4)
-#define CH_ARCHITECTURE_ARM_v7ME
-#define CH_ARCHITECTURE_NAME "ARMv7-ME"
-#if CORTEX_USE_FPU
-#define CH_CORE_VARIANT_NAME "Cortex-M4F"
-#else
-#define CH_CORE_VARIANT_NAME "Cortex-M4"
-#endif
-#endif
-
-/**
- * @brief Port-specific information string.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define CH_PORT_INFO "Advanced kernel mode"
-#else
-#define CH_PORT_INFO "Compact kernel mode"
-#endif
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-
-/**
- * @brief Generic ARM register.
- */
-typedef void *regarm_t;
-
-/**
- * @brief Stack and memory alignment enforcement.
- * @note In this architecture the stack alignment is enforced to 64 bits,
- * 32 bits alignment is supported by hardware but deprecated by ARM,
- * the implementation choice is to not offer the option.
- */
-typedef uint64_t stkalign_t;
-
-/* The documentation of the following declarations is in chconf.h in order
- to not have duplicated structure names into the documentation.*/
-#if !defined(__DOXYGEN__)
-
-struct extctx {
- regarm_t r0;
- regarm_t r1;
- regarm_t r2;
- regarm_t r3;
- regarm_t r12;
- regarm_t lr_thd;
- regarm_t pc;
- regarm_t xpsr;
-#if CORTEX_USE_FPU
- regarm_t s0;
- regarm_t s1;
- regarm_t s2;
- regarm_t s3;
- regarm_t s4;
- regarm_t s5;
- regarm_t s6;
- regarm_t s7;
- regarm_t s8;
- regarm_t s9;
- regarm_t s10;
- regarm_t s11;
- regarm_t s12;
- regarm_t s13;
- regarm_t s14;
- regarm_t s15;
- regarm_t fpscr;
- regarm_t fpccr;
-#endif /* CORTEX_USE_FPU */
-};
-
-struct intctx {
-#if CORTEX_USE_FPU
- regarm_t s16;
- regarm_t s17;
- regarm_t s18;
- regarm_t s19;
- regarm_t s20;
- regarm_t s21;
- regarm_t s22;
- regarm_t s23;
- regarm_t s24;
- regarm_t s25;
- regarm_t s26;
- regarm_t s27;
- regarm_t s28;
- regarm_t s29;
- regarm_t s30;
- regarm_t s31;
-#endif /* CORTEX_USE_FPU */
- regarm_t r4;
- regarm_t r5;
- regarm_t r6;
- regarm_t r7;
- regarm_t r8;
- regarm_t r9;
- regarm_t r10;
- regarm_t r11;
- regarm_t lr;
-};
-
-#endif /* !defined(__DOXYGEN__) */
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details In this port the structure just holds a pointer to the @p intctx
- * structure representing the stack pointer at context switch time.
- */
-struct context {
- struct intctx *r13;
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
- wsize - \
- sizeof(struct intctx)); \
- tp->p_ctx.r13->r4 = (regarm_t)pf; \
- tp->p_ctx.r13->r5 = (regarm_t)arg; \
- tp->p_ctx.r13->lr = (regarm_t)_port_thread_start; \
-}
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() _port_irq_epilogue()
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Fast IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_FAST_IRQ_HANDLER(id) void id(void)
-
-/**
- * @brief Port-related initialization code.
- */
-#define port_init() _port_init()
-
-/**
- * @brief Kernel-lock action.
- * @details Usually this function just disables interrupts but may perform
- * more actions.
- * @note In this port this it raises the base priority to kernel level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_lock() { \
- register uint32_t basepri __asm("basepri"); \
- basepri = CORTEX_BASEPRI_KERNEL; \
-}
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_lock() __disable_irq()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Kernel-unlock action.
- * @details Usually this function just enables interrupts but may perform
- * more actions.
- * @note In this port this it lowers the base priority to user level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_unlock() { \
- register uint32_t basepri __asm("basepri"); \
- basepri = CORTEX_BASEPRI_DISABLED; \
-}
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_unlock() __enable_irq()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @details This function is invoked before invoking I-class APIs from
- * interrupt handlers. The implementation is architecture dependent,
- * in its simplest form it is void.
- * @note Same as @p port_lock() in this port.
- */
-#define port_lock_from_isr() port_lock()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @details This function is invoked after invoking I-class APIs from interrupt
- * handlers. The implementation is architecture dependent, in its
- * simplest form it is void.
- * @note Same as @p port_unlock() in this port.
- */
-#define port_unlock_from_isr() port_unlock()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Of course non-maskable interrupt sources are not included.
- * @note In this port it disables all the interrupt sources by raising
- * the priority mask to level 0.
- */
-#define port_disable() __disable_irq()
-
-/**
- * @brief Disables the interrupt sources below kernel-level priority.
- * @note Interrupt sources above kernel level remains enabled.
- * @note In this port it raises/lowers the base priority to kernel level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_suspend() { \
- register uint32_t basepri __asm("basepri"); \
- basepri = CORTEX_BASEPRI_KERNEL; \
-}
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_suspend() __disable_irq()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Enables all the interrupt sources.
- * @note In this port it lowers the base priority to user level.
- */
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
-#define port_enable() { \
- register uint32_t basepri __asm("basepri"); \
- basepri = CORTEX_BASEPRI_DISABLED; \
- __enable_irq(); \
-}
-#else /* CORTEX_SIMPLIFIED_PRIORITY */
-#define port_enable() __enable_irq()
-#endif /* CORTEX_SIMPLIFIED_PRIORITY */
-
-/**
- * @brief Enters an architecture-dependent IRQ-waiting mode.
- * @details The function is meant to return when an interrupt becomes pending.
- * The simplest implementation is an empty function or macro but this
- * would not take advantage of architecture-specific power saving
- * modes.
- * @note Implemented as an inlined @p WFI instruction.
- */
-#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() __wfi()
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note The implementation of this code affects <b>directly</b> the context
- * switch performance so optimize here as much as you can.
- *
- * @param[in] ntp the thread to be switched in
- * @param[in] otp the thread to be switched out
- */
-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
-#define port_switch(ntp, otp) _port_switch(ntp, otp)
-#else
-#define port_switch(ntp, otp) { \
- uint8_t *r13 = (uint8_t *)__current_sp(); \
- if ((stkalign_t *)(r13 - sizeof(struct intctx)) < otp->p_stklimit) \
- chDbgPanic("stack overflow"); \
- _port_switch(ntp, otp); \
-}
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void port_halt(void);
- void _port_init(void);
- void _port_irq_epilogue(void);
- void _port_switch_from_isr(void);
- void _port_exit_from_isr(void);
- void _port_switch(Thread *ntp, Thread *otp);
- void _port_thread_start(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _FROM_ASM_ */
-
-#endif /* _CHCORE_V7M_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s deleted file mode 100644 index 282ac547d..000000000 --- a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s +++ /dev/null @@ -1,108 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * Imports the Cortex-Mx configuration headers.
- */
-#define _FROM_ASM_
-#include "chconf.h"
-#include "chcore.h"
-
-CONTEXT_OFFSET EQU 12
-SCB_ICSR EQU 0xE000ED04
-
- PRESERVE8
- THUMB
- AREA |.text|, CODE, READONLY
-
- IMPORT chThdExit
- IMPORT chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- IMPORT dbg_check_unlock
- IMPORT dbg_check_lock
-#endif
-
-/*
- * Performs a context switch between two threads.
- */
- EXPORT _port_switch
-_port_switch PROC
- push {r4, r5, r6, r7, lr}
- mov r4, r8
- mov r5, r9
- mov r6, r10
- mov r7, r11
- push {r4, r5, r6, r7}
- mov r3, sp
- str r3, [r1, #CONTEXT_OFFSET]
- ldr r3, [r0, #CONTEXT_OFFSET]
- mov sp, r3
- pop {r4, r5, r6, r7}
- mov r8, r4
- mov r9, r5
- mov r10, r6
- mov r11, r7
- pop {r4, r5, r6, r7, pc}
- ENDP
-
-/*
- * Start a thread by invoking its work function.
- * If the work function returns @p chThdExit() is automatically invoked.
- */
- EXPORT _port_thread_start
-_port_thread_start PROC
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
- cpsie i
- mov r0, r5
- blx r4
- bl chThdExit
- ENDP
-
-/*
- * Post-IRQ switch code.
- * Exception handlers return here for context switching.
- */
- EXPORT _port_switch_from_isr
- EXPORT _port_exit_from_isr
-_port_switch_from_isr PROC
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-_port_exit_from_isr
- ldr r2, =SCB_ICSR
- movs r3, #128
-#if CORTEX_ALTERNATE_SWITCH
- lsls r3, r3, #21
- str r3, [r2, #0]
- cpsie i
-#else
- lsls r3, r3, #24
- str r3, [r2, #0]
-#endif
-waithere b waithere
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s deleted file mode 100644 index e9404daba..000000000 --- a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s +++ /dev/null @@ -1,107 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/*
- * Imports the Cortex-Mx configuration headers.
- */
-#define _FROM_ASM_
-#include "chconf.h"
-#include "chcore.h"
-
-CONTEXT_OFFSET EQU 12
-SCB_ICSR EQU 0xE000ED04
-ICSR_PENDSVSET EQU 0x10000000
-
- PRESERVE8
- THUMB
- AREA |.text|, CODE, READONLY
-
- IMPORT chThdExit
- IMPORT chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- IMPORT dbg_check_unlock
- IMPORT dbg_check_lock
-#endif
-
-/*
- * Performs a context switch between two threads.
- */
- EXPORT _port_switch
-_port_switch PROC
- push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
-#if CORTEX_USE_FPU
- vpush {s16-s31}
-#endif
- str sp, [r1, #CONTEXT_OFFSET]
- ldr sp, [r0, #CONTEXT_OFFSET]
-#if CORTEX_USE_FPU
- vpop {s16-s31}
-#endif
- pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}
- ENDP
-
-/*
- * Start a thread by invoking its work function.
- * If the work function returns @p chThdExit() is automatically invoked.
- */
- EXPORT _port_thread_start
-_port_thread_start PROC
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-#if CORTEX_SIMPLIFIED_PRIORITY
- cpsie i
-#else
- movs r3, #CORTEX_BASEPRI_DISABLED
- msr BASEPRI, r3
-#endif
- mov r0, r5
- blx r4
- bl chThdExit
- ENDP
-
-/*
- * Post-IRQ switch code.
- * Exception handlers return here for context switching.
- */
- EXPORT _port_switch_from_isr
- EXPORT _port_exit_from_isr
-_port_switch_from_isr PROC
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_lock
-#endif
- bl chSchDoReschedule
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl dbg_check_unlock
-#endif
-_port_exit_from_isr
-#if CORTEX_SIMPLIFIED_PRIORITY
- mov r3, #SCB_ICSR :AND: 0xFFFF
- movt r3, #SCB_ICSR :SHR: 16
- mov r2, #ICSR_PENDSVSET
- str r2, [r3, #0]
- cpsie i
-waithere b waithere
-#else
- svc #0
-#endif
- ENDP
-
- END
diff --git a/os/ports/RVCT/ARMCMx/chtypes.h b/os/ports/RVCT/ARMCMx/chtypes.h deleted file mode 100644 index b3f19f674..000000000 --- a/os/ports/RVCT/ARMCMx/chtypes.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file RVCT/ARMCMx/chtypes.h
- * @brief ARM Cortex-Mx port system types.
- *
- * @addtogroup RVCT_ARMCMx_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Event Id. */
-typedef uint32_t eventmask_t; /**< Event mask. */
-typedef uint32_t flagsmask_t; /**< Event flags. */
-typedef uint32_t systime_t; /**< System time. */
-typedef int32_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE __inline
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_STRUCT
-
-/**
- * @brief Packed structure modifier (before).
- */
-#define PACK_STRUCT_BEGIN __packed
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/RVCT/ARMCMx/cstartup.s b/os/ports/RVCT/ARMCMx/cstartup.s deleted file mode 100644 index e0c6b85ee..000000000 --- a/os/ports/RVCT/ARMCMx/cstartup.s +++ /dev/null @@ -1,121 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-;/* <<< Use Configuration Wizard in Context Menu >>> */
-
-;// <h> Main Stack Configuration (IRQ Stack)
-;// <o> Main Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;// </h>
-main_stack_size EQU 0x00000400
-
-;// <h> Process Stack Configuration
-;// <o> Process Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;// </h>
-proc_stack_size EQU 0x00000400
-
-;// <h> C-runtime heap size
-;// <o> C-runtime heap size (in Bytes) <0x0-0xFFFFFFFF:8>
-;// </h>
-heap_size EQU 0x00000400
-
- AREA MSTACK, NOINIT, READWRITE, ALIGN=3
-main_stack_mem SPACE main_stack_size
- EXPORT __initial_msp
-__initial_msp
-
- AREA CSTACK, NOINIT, READWRITE, ALIGN=3
-__main_thread_stack_base__
- EXPORT __main_thread_stack_base__
-proc_stack_mem SPACE proc_stack_size
- EXPORT __initial_sp
-__initial_sp
-
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem SPACE heap_size
-__heap_limit
-
-CONTROL_MODE_PRIVILEGED EQU 0
-CONTROL_MODE_UNPRIVILEGED EQU 1
-CONTROL_USE_MSP EQU 0
-CONTROL_USE_PSP EQU 2
-
- PRESERVE8
- THUMB
-
- AREA |.text|, CODE, READONLY
-
-/*
- * Reset handler.
- */
- IMPORT __main
- EXPORT Reset_Handler
-Reset_Handler PROC
- cpsid i
- ldr r0, =__initial_sp
- msr PSP, r0
- movs r0, #CONTROL_MODE_PRIVILEGED :OR: CONTROL_USE_PSP
- msr CONTROL, r0
- isb
- bl __early_init
-
- IF {CPU} = "Cortex-M4.fp"
- LDR R0, =0xE000ED88 ; Enable CP10,CP11
- LDR R1, [R0]
- ORR R1, R1, #(0xF << 20)
- STR R1, [R0]
- ENDIF
-
- ldr r0, =__main
- bx r0
- ENDP
-
-__early_init PROC
- EXPORT __early_init [WEAK]
- bx lr
- ENDP
-
- ALIGN
-
-/*
- * User Initial Stack & Heap.
- */
- IF :DEF:__MICROLIB
-
- EXPORT __initial_sp
- EXPORT __heap_base
- EXPORT __heap_limit
-
- ELSE
-
- IMPORT __use_two_region_memory
- EXPORT __user_initial_stackheap
-__user_initial_stackheap
- ldr r0, =Heap_Mem
- ldr r1, =(proc_stack_mem + proc_stack_size)
- ldr r2, =(Heap_Mem + heap_size)
- ldr r3, =proc_stack_mem
- bx lr
-
- ALIGN
-
- ENDIF
-
- END
diff --git a/os/ports/RVCT/ARMCMx/port.dox b/os/ports/RVCT/ARMCMx/port.dox deleted file mode 100644 index 66f9ec23f..000000000 --- a/os/ports/RVCT/ARMCMx/port.dox +++ /dev/null @@ -1,233 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup RVCT_ARMCMx ARM Cortex-Mx
- * @details ARM Cortex-Mx port for the RVCT compiler.
-
- * @section RVCT_ARMCMx_INTRO Introduction
- * This port supports all the cores implementing the ARMv6-M and ARMv7-M
- * architectures.
- *
- * @section RVCT_ARMCMx_MODES Kernel Modes
- * The Cortex-Mx port supports two distinct kernel modes:
- * - <b>Advanced Kernel</b> mode. In this mode the kernel only masks
- * interrupt sources with priorities below or equal to the
- * @p CORTEX_BASEPRI_KERNEL level. Higher priorities are not affected by
- * the kernel critical sections and can be used for fast interrupts.
- * This mode is not available in the ARMv6-M architecture which does not
- * support priority masking.
- * - <b>Compact Kernel</b> mode. In this mode the kernel handles IRQ priorities
- * in a simplified way, all interrupt sources are disabled when the kernel
- * enters into a critical zone and re-enabled on exit. This is simple and
- * adequate for most applications, this mode results in a more compact and
- * faster kernel.
- * .
- * The selection of the mode is performed using the port configuration option
- * @p CORTEX_SIMPLIFIED_PRIORITY. Apart from the different handling of
- * interrupts there are no other differences between the two modes. The
- * kernel API is exactly the same.
- *
- * @section RVCT_ARMCMx_STATES_A System logical states in Compact Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in Compact
- * Kernel mode:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state interrupts are enabled. The processor
- * is running in thread-privileged mode.
- * - <b>Suspended</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode. In this
- * mode this state is not different from the <b>Disabled</b> state.
- * - <b>Disabled</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode. In this
- * mode this state is not different from the <b>Suspended</b> state.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wfi</b>.
- * - <b>S-Locked</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in thread-privileged mode.
- * - <b>I-Locked</b>. In this state the interrupt sources are globally
- * disabled. The processor is running in exception-privileged mode.
- * - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
- * not globally masked but only interrupts with higher priority can preempt
- * the current handler. The processor is running in exception-privileged
- * mode.
- * - <b>Serving Fast Interrupt</b>. Not implemented in compact kernel mode.
- * - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
- * asynchronous NMI vector and several synchronous fault vectors that can
- * be considered belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
- * the maskable interrupt sources. The ARM state is whatever the processor
- * was running when @p chSysHalt() was invoked.
- *
- * @section RVCT_ARMCMx_STATES_B System logical states in Advanced Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the
- * Advanced Kernel mode:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). In this state the ARM Cortex-Mx has the BASEPRI register
- * set at @p CORTEX_BASEPRI_USER level, interrupts are not masked. The
- * processor is running in thread-privileged mode.
- * - <b>Suspended</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in thread-privileged mode.
- * - <b>Disabled</b>. Interrupt sources are globally masked. The processor
- * is running in thread-privileged mode.
- * - <b>Sleep</b>. This state is entered with the execution of the specific
- * instruction @p <b>wfi</b>.
- * - <b>S-Locked</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in thread-privileged mode.
- * - <b>I-Locked</b>. In this state the interrupt sources are not globally
- * masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
- * masking any interrupt source with lower or equal priority. The processor
- * is running in exception-privileged mode.
- * - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
- * not globally masked but only interrupts with higher priority can preempt
- * the current handler. The processor is running in exception-privileged
- * mode.
- * - <b>Serving Fast Interrupt</b>. Fast interrupts are defined as interrupt
- * sources having higher priority level than the kernel
- * (@p CORTEX_BASEPRI_KERNEL). In this state is not possible to switch to
- * the I-Locked state because fast interrupts can preempt the kernel
- * critical zone.<br>
- * This state is not implemented in the ARMv6-M implementation because
- * priority masking is not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
- * asynchronous NMI vector and several synchronous fault vectors that can
- * be considered belonging to this category.
- * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
- * the maskable interrupt sources. The ARM state is whatever the processor
- * was running when @p chSysHalt() was invoked.
- * .
- * @section RVCT_ARMCMx_NOTES ARM Cortex-Mx/RVCT port notes
- * The ARM Cortex-Mx port is organized as follow:
- * - The @p main() function is invoked in thread-privileged mode.
- * - Each thread has a private process stack, the system has a single main
- * stack where all the interrupts and exceptions are processed.
- * - The threads are started in thread-privileged mode.
- * - Interrupt nesting and the other advanced core/NVIC features are supported.
- * - The Cortex-Mx port is perfectly generic, support for more devices can be
- * easily added by adding a subdirectory under <tt>./os/ports/RVCT/ARMCMx</tt>
- * and giving it the name of the new device, then copy the files from another
- * device into the new directory and customize them for the new device.
- * - The free uVision is not able to handle scatter files, the following
- * options are required in the project options under "Preprocesso symbols"
- * in order to use the unused RAM as heap automatically:
- * <tt>__heap_base__=Image$$RW_IRAM1$$ZI$$Limit
- * __heap_end__=Image$$RW_IRAM2$$Base</tt>
- * .
- * @ingroup rvct
- */
-
-/**
- * @defgroup RVCT_ARMCMx_CONF Configuration Options
- * @details ARM Cortex-Mx Configuration Options. The ARMCMx port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
- * by an interrupt handler between the @p extctx and @p intctx
- * structures.
- * - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
- * thread. Usually there is no need to change this value unless inserting
- * code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
- * - @p CORTEX_PRIORITY_SYSTICK, priority of the SYSTICK handler.
- * - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
- * - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
- * @p <b>wfi</b> instruction from within the idle loop. This option is
- * defaulted to FALSE because it can create problems with some debuggers.
- * Setting this option to TRUE reduces the system power requirements.
- * .
- * @section RVCT_ARMCMx_CONF_1 ARMv6-M specific options
- * The following options are specific for the ARMv6-M architecture:
- * - @p CORTEX_ALTERNATE_SWITCH, when activated makes the OS use the PendSV
- * exception instead of NMI as preemption handler.
- * .
- * @section RVCT_ARMCMx_CONF_2 ARMv7-M specific options
- * The following options are specific for the ARMv6-M architecture:
- * - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
- * - @p CORTEX_SIMPLIFIED_PRIORITY, when enabled activates the Compact kernel
- * mode.
- * .
- * @ingroup RVCT_ARMCMx
- */
-
-/**
- * @defgroup RVCT_ARMCMx_CORE Core Port Implementation
- * @details ARM Cortex-Mx specific port code, structures and macros.
- *
- * @ingroup RVCT_ARMCMx
- */
-
-/**
- * @defgroup RVCT_ARMCMx_V6M_CORE ARMv6-M Specific Implementation
- * @details ARMv6-M specific port code, structures and macros.
- *
- * @ingroup RVCT_ARMCMx_CORE
- */
-
-/**
- * @defgroup RVCT_ARMCMx_V7M_CORE ARMv7-M Specific Implementation
- * @details ARMv7-M specific port code, structures and macros.
- *
- * @ingroup RVCT_ARMCMx_CORE
- */
-
-/**
- * @defgroup RVCT_ARMCMx_STARTUP Startup Support
- * @details ChibiOS/RT provides its own generic startup file for the ARM
- * Cortex-Mx port.
- * Of course it is not mandatory to use it but care should be taken about the
- * startup phase details.
- *
- * @section RVCT_ARMCMx_STARTUP_1 Startup Process
- * The startup process, as implemented, is the following:
- * -# Interrupts are masked globally.
- * -# The two stacks are initialized by assigning them the sizes defined in
- * <tt>cstartup.s</tt> file and accessible through the configuration wizard.
- * -# The CPU state is switched to Privileged and the PSP stack is used.
- * -# An early initialization routine @p __early_init() is invoked, if the
- * symbol is not defined then an empty default routine is executed
- * (weak symbol).
- * -# Control is passed to the C runtime entry point @p __main that performs
- * the required initializations before invoking the @p main() function.
- * .
- * @ingroup RVCT_ARMCMx
- */
-
-/**
- * @defgroup RVCT_ARMCMx_NVIC NVIC Support
- * @details ARM Cortex-Mx NVIC support.
- *
- * @ingroup RVCT_ARMCMx
- */
-
-/**
- * @defgroup RVCT_ARMCMx_SPECIFIC Specific Implementations
- * @details Platform-specific port code.
- *
- * @ingroup RVCT_ARMCMx
- */
diff --git a/os/ports/common/ARMCMx/CMSIS/include/arm_common_tables.h b/os/ports/common/ARMCMx/CMSIS/include/arm_common_tables.h deleted file mode 100644 index 5fd6ff4af..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/arm_common_tables.h +++ /dev/null @@ -1,38 +0,0 @@ -/* ----------------------------------------------------------------------
-* Copyright (C) 2010 ARM Limited. All rights reserved.
-*
-* $Date: 11. November 2010
-* $Revision: V1.0.2
-*
-* Project: CMSIS DSP Library
-* Title: arm_common_tables.h
-*
-* Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
-*
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Version 1.0.2 2010/11/11
-* Documentation updated.
-*
-* Version 1.0.1 2010/10/05
-* Production release and review comments incorporated.
-*
-* Version 1.0.0 2010/09/20
-* Production release and review comments incorporated.
-* -------------------------------------------------------------------- */
-
-#ifndef _ARM_COMMON_TABLES_H
-#define _ARM_COMMON_TABLES_H
-
-#include "arm_math.h"
-
-extern const uint16_t armBitRevTable[1024];
-extern const q15_t armRecipTableQ15[64];
-extern const q31_t armRecipTableQ31[64];
-extern const q31_t realCoefAQ31[1024];
-extern const q31_t realCoefBQ31[1024];
-extern const float32_t twiddleCoef[6144];
-extern const q31_t twiddleCoefQ31[6144];
-extern const q15_t twiddleCoefQ15[6144];
-
-#endif /* ARM_COMMON_TABLES_H */
diff --git a/os/ports/common/ARMCMx/CMSIS/include/arm_math.h b/os/ports/common/ARMCMx/CMSIS/include/arm_math.h deleted file mode 100644 index 266dbfc91..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/arm_math.h +++ /dev/null @@ -1,7578 +0,0 @@ -/* ----------------------------------------------------------------------
- * Copyright (C) 2010-2011 ARM Limited. All rights reserved.
- *
- * $Date: 15. February 2012
- * $Revision: V1.1.0
- *
- * Project: CMSIS DSP Library
- * Title: arm_math.h
- *
- * Description: Public header file for CMSIS DSP Library
- *
- * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
- *
- * Version 1.1.0 2012/02/15
- * Updated with more optimizations, bug fixes and minor API changes.
- *
- * Version 1.0.10 2011/7/15
- * Big Endian support added and Merged M0 and M3/M4 Source code.
- *
- * Version 1.0.3 2010/11/29
- * Re-organized the CMSIS folders and updated documentation.
- *
- * Version 1.0.2 2010/11/11
- * Documentation updated.
- *
- * Version 1.0.1 2010/10/05
- * Production release and review comments incorporated.
- *
- * Version 1.0.0 2010/09/20
- * Production release and review comments incorporated.
- * -------------------------------------------------------------------- */
-
-/**
- \mainpage CMSIS DSP Software Library
- *
- * <b>Introduction</b>
- *
- * This user manual describes the CMSIS DSP software library,
- * a suite of common signal processing functions for use on Cortex-M processor based devices.
- *
- * The library is divided into a number of functions each covering a specific category:
- * - Basic math functions
- * - Fast math functions
- * - Complex math functions
- * - Filters
- * - Matrix functions
- * - Transforms
- * - Motor control functions
- * - Statistical functions
- * - Support functions
- * - Interpolation functions
- *
- * The library has separate functions for operating on 8-bit integers, 16-bit integers,
- * 32-bit integer and 32-bit floating-point values.
- *
- * <b>Pre-processor Macros</b>
- *
- * Each library project have differant pre-processor macros.
- *
- * - UNALIGNED_SUPPORT_DISABLE:
- *
- * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
- *
- * - ARM_MATH_BIG_ENDIAN:
- *
- * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
- *
- * - ARM_MATH_MATRIX_CHECK:
- *
- * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
- *
- * - ARM_MATH_ROUNDING:
- *
- * Define macro ARM_MATH_ROUNDING for rounding on support functions
- *
- * - ARM_MATH_CMx:
- *
- * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
- * and ARM_MATH_CM0 for building library on cortex-M0 target.
- *
- * - __FPU_PRESENT:
- *
- * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
- *
- * <b>Toolchain Support</b>
- *
- * The library has been developed and tested with MDK-ARM version 4.23.
- * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
- *
- * <b>Using the Library</b>
- *
- * The library installer contains prebuilt versions of the libraries in the <code>Lib</code> folder.
- * - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
- * - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
- * - arm_cortexM4l_math.lib (Little endian on Cortex-M4)
- * - arm_cortexM4b_math.lib (Big endian on Cortex-M4)
- * - arm_cortexM3l_math.lib (Little endian on Cortex-M3)
- * - arm_cortexM3b_math.lib (Big endian on Cortex-M3)
- * - arm_cortexM0l_math.lib (Little endian on Cortex-M0)
- * - arm_cortexM0b_math.lib (Big endian on Cortex-M3)
- *
- * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
- * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
- * public header file <code> arm_math.h</code> for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
- * Define the appropriate pre processor MACRO ARM_MATH_CM4 or ARM_MATH_CM3 or
- * ARM_MATH_CM0 depending on the target processor in the application.
- *
- * <b>Examples</b>
- *
- * The library ships with a number of examples which demonstrate how to use the library functions.
- *
- * <b>Building the Library</b>
- *
- * The library installer contains project files to re build libraries on MDK Tool chain in the <code>CMSIS\\DSP_Lib\\Source\\ARM</code> folder.
- * - arm_cortexM0b_math.uvproj
- * - arm_cortexM0l_math.uvproj
- * - arm_cortexM3b_math.uvproj
- * - arm_cortexM3l_math.uvproj
- * - arm_cortexM4b_math.uvproj
- * - arm_cortexM4l_math.uvproj
- * - arm_cortexM4bf_math.uvproj
- * - arm_cortexM4lf_math.uvproj
- *
- *
- * The project can be built by opening the appropriate project in MDK-ARM 4.23 chain and defining the optional pre processor MACROs detailed above.
- *
- * <b>Copyright Notice</b>
- *
- * Copyright (C) 2010 ARM Limited. All rights reserved.
- */
-
-
-/**
- * @defgroup groupMath Basic Math Functions
- */
-
-/**
- * @defgroup groupFastMath Fast Math Functions
- * This set of functions provides a fast approximation to sine, cosine, and square root.
- * As compared to most of the other functions in the CMSIS math library, the fast math functions
- * operate on individual values and not arrays.
- * There are separate functions for Q15, Q31, and floating-point data.
- *
- */
-
-/**
- * @defgroup groupCmplxMath Complex Math Functions
- * This set of functions operates on complex data vectors.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * In the API functions, the number of samples in a complex array refers
- * to the number of complex values; the array contains twice this number of
- * real values.
- */
-
-/**
- * @defgroup groupFilters Filtering Functions
- */
-
-/**
- * @defgroup groupMatrix Matrix Functions
- *
- * This set of functions provides basic matrix math operations.
- * The functions operate on matrix data structures. For example,
- * the type
- * definition for the floating-point matrix structure is shown
- * below:
- * <pre>
- * typedef struct
- * {
- * uint16_t numRows; // number of rows of the matrix.
- * uint16_t numCols; // number of columns of the matrix.
- * float32_t *pData; // points to the data of the matrix.
- * } arm_matrix_instance_f32;
- * </pre>
- * There are similar definitions for Q15 and Q31 data types.
- *
- * The structure specifies the size of the matrix and then points to
- * an array of data. The array is of size <code>numRows X numCols</code>
- * and the values are arranged in row order. That is, the
- * matrix element (i, j) is stored at:
- * <pre>
- * pData[i*numCols + j]
- * </pre>
- *
- * \par Init Functions
- * There is an associated initialization function for each type of matrix
- * data structure.
- * The initialization function sets the values of the internal structure fields.
- * Refer to the function <code>arm_mat_init_f32()</code>, <code>arm_mat_init_q31()</code>
- * and <code>arm_mat_init_q15()</code> for floating-point, Q31 and Q15 types, respectively.
- *
- * \par
- * Use of the initialization function is optional. However, if initialization function is used
- * then the instance structure cannot be placed into a const data section.
- * To place the instance structure in a const data
- * section, manually initialize the data structure. For example:
- * <pre>
- * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
- * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
- * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
- * </pre>
- * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
- * specifies the number of columns, and <code>pData</code> points to the
- * data array.
- *
- * \par Size Checking
- * By default all of the matrix functions perform size checking on the input and
- * output matrices. For example, the matrix addition function verifies that the
- * two input matrices and the output matrix all have the same number of rows and
- * columns. If the size check fails the functions return:
- * <pre>
- * ARM_MATH_SIZE_MISMATCH
- * </pre>
- * Otherwise the functions return
- * <pre>
- * ARM_MATH_SUCCESS
- * </pre>
- * There is some overhead associated with this matrix size checking.
- * The matrix size checking is enabled via the \#define
- * <pre>
- * ARM_MATH_MATRIX_CHECK
- * </pre>
- * within the library project settings. By default this macro is defined
- * and size checking is enabled. By changing the project settings and
- * undefining this macro size checking is eliminated and the functions
- * run a bit faster. With size checking disabled the functions always
- * return <code>ARM_MATH_SUCCESS</code>.
- */
-
-/**
- * @defgroup groupTransforms Transform Functions
- */
-
-/**
- * @defgroup groupController Controller Functions
- */
-
-/**
- * @defgroup groupStats Statistics Functions
- */
-/**
- * @defgroup groupSupport Support Functions
- */
-
-/**
- * @defgroup groupInterpolation Interpolation Functions
- * These functions perform 1- and 2-dimensional interpolation of data.
- * Linear interpolation is used for 1-dimensional data and
- * bilinear interpolation is used for 2-dimensional data.
- */
-
-/**
- * @defgroup groupExamples Examples
- */
-#ifndef _ARM_MATH_H
-#define _ARM_MATH_H
-
-/* CHIBIOS FIX BEGIN */
-#include "board.h"
-#if defined(STM32F4XX)
-#define ARM_MATH_CM4
-#define __FPU_PRESENT 1
-#elif (defined(STM32F10X_LD) || defined(STM32F10X_LD_VL) || \
- defined(STM32F10X_MD) || defined(STM32F10X_MD_VL) || \
- defined(STM32F10X_HD) || defined(STM32F10X_XL) || \
- defined(STM32F10X_CL))
-#define ARM_MATH_CM3
-#elif defined(STM32F0XX)
-#define ARM_MATH_CM0
-#endif
-/* CHIBIOS FIX END */
-
-#define __CMSIS_GENERIC /* disable NVIC and Systick functions */
-
-#if defined (ARM_MATH_CM4)
-#include "core_cm4.h"
-#elif defined (ARM_MATH_CM3)
-#include "core_cm3.h"
-#elif defined (ARM_MATH_CM0)
-#include "core_cm0.h"
-#else
-#include "ARMCM4.h"
-#warning "Define either ARM_MATH_CM4 OR ARM_MATH_CM3...By Default building on ARM_MATH_CM4....."
-#endif
-
-#undef __CMSIS_GENERIC /* enable NVIC and Systick functions */
-#include "string.h"
-#include "math.h"
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-
- /**
- * @brief Macros required for reciprocal calculation in Normalized LMS
- */
-
-#define DELTA_Q31 (0x100)
-#define DELTA_Q15 0x5
-#define INDEX_MASK 0x0000003F
-#ifndef PI
-#define PI 3.14159265358979f
-#endif
-
- /**
- * @brief Macros required for SINE and COSINE Fast math approximations
- */
-
-#define TABLE_SIZE 256
-#define TABLE_SPACING_Q31 0x800000
-#define TABLE_SPACING_Q15 0x80
-
- /**
- * @brief Macros required for SINE and COSINE Controller functions
- */
- /* 1.31(q31) Fixed value of 2/360 */
- /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING 0xB60B61
-
- /**
- * @brief Macro for Unaligned Support
- */
-#ifndef UNALIGNED_SUPPORT_DISABLE
- #define ALIGN4
-#else
- #if defined (__GNUC__)
- #define ALIGN4 __attribute__((aligned(4)))
- #else
- #define ALIGN4 __align(4)
- #endif
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
- /**
- * @brief Error status returned by some functions in the library.
- */
-
- typedef enum
- {
- ARM_MATH_SUCCESS = 0, /**< No error */
- ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
- ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
- ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation. */
- ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
- ARM_MATH_SINGULAR = -5, /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
- ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
- } arm_status;
-
- /**
- * @brief 8-bit fractional data type in 1.7 format.
- */
- typedef int8_t q7_t;
-
- /**
- * @brief 16-bit fractional data type in 1.15 format.
- */
- typedef int16_t q15_t;
-
- /**
- * @brief 32-bit fractional data type in 1.31 format.
- */
- typedef int32_t q31_t;
-
- /**
- * @brief 64-bit fractional data type in 1.63 format.
- */
- typedef int64_t q63_t;
-
- /**
- * @brief 32-bit floating-point type definition.
- */
- typedef float float32_t;
-
- /**
- * @brief 64-bit floating-point type definition.
- */
- typedef double float64_t;
-
- /**
- * @brief definition to read/write two 16 bit values.
- */
-#if defined (__GNUC__)
- #define __SIMD32(addr) (*( int32_t **) & (addr))
- #define _SIMD32_OFFSET(addr) (*( int32_t * ) (addr))
-#else
- #define __SIMD32(addr) (*(__packed int32_t **) & (addr))
- #define _SIMD32_OFFSET(addr) (*(__packed int32_t * ) (addr))
-#endif
-
- #define __SIMD64(addr) (*(int64_t **) & (addr))
-
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
- /**
- * @brief definition to pack two 16 bit values.
- */
-#define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
- (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
-#define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
- (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
-
-#endif
-
-
- /**
- * @brief definition to pack four 8 bit values.
- */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
- (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
- (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
- (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
-#else
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
- (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
- (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
- (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
-
-#endif
-
-
- /**
- * @brief Clips Q63 to Q31 values.
- */
- __STATIC_INLINE q31_t clip_q63_to_q31(
- q63_t x)
- {
- return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
- ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
- }
-
- /**
- * @brief Clips Q63 to Q15 values.
- */
- __STATIC_INLINE q15_t clip_q63_to_q15(
- q63_t x)
- {
- return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
- ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
- }
-
- /**
- * @brief Clips Q31 to Q7 values.
- */
- __STATIC_INLINE q7_t clip_q31_to_q7(
- q31_t x)
- {
- return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
- ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
- }
-
- /**
- * @brief Clips Q31 to Q15 values.
- */
- __STATIC_INLINE q15_t clip_q31_to_q15(
- q31_t x)
- {
- return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
- ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
- }
-
- /**
- * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
- */
-
- __STATIC_INLINE q63_t mult32x64(
- q63_t x,
- q31_t y)
- {
- return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
- (((q63_t) (x >> 32) * y)));
- }
-
-
-#if defined (ARM_MATH_CM0) && defined ( __CC_ARM )
-#define __CLZ __clz
-#endif
-
-#if defined (ARM_MATH_CM0) && defined ( __TASKING__ )
-/* No need to redefine __CLZ */
-#endif
-
-#if defined (ARM_MATH_CM0) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) )
-
- __STATIC_INLINE uint32_t __CLZ(q31_t data);
-
-
- __STATIC_INLINE uint32_t __CLZ(q31_t data)
- {
- uint32_t count = 0;
- uint32_t mask = 0x80000000;
-
- while((data & mask) == 0)
- {
- count += 1u;
- mask = mask >> 1u;
- }
-
- return (count);
-
- }
-
-#endif
-
- /**
- * @brief Function to Calculates 1/in(reciprocal) value of Q31 Data type.
- */
-
- __STATIC_INLINE uint32_t arm_recip_q31(
- q31_t in,
- q31_t * dst,
- q31_t * pRecipTable)
- {
-
- uint32_t out, tempVal;
- uint32_t index, i;
- uint32_t signBits;
-
- if(in > 0)
- {
- signBits = __CLZ(in) - 1;
- }
- else
- {
- signBits = __CLZ(-in) - 1;
- }
-
- /* Convert input sample to 1.31 format */
- in = in << signBits;
-
- /* calculation of index for initial approximated Val */
- index = (uint32_t) (in >> 24u);
- index = (index & INDEX_MASK);
-
- /* 1.31 with exp 1 */
- out = pRecipTable[index];
-
- /* calculation of reciprocal value */
- /* running approximation for two iterations */
- for (i = 0u; i < 2u; i++)
- {
- tempVal = (q31_t) (((q63_t) in * out) >> 31u);
- tempVal = 0x7FFFFFFF - tempVal;
- /* 1.31 with exp 1 */
- //out = (q31_t) (((q63_t) out * tempVal) >> 30u);
- out = (q31_t) clip_q63_to_q31(((q63_t) out * tempVal) >> 30u);
- }
-
- /* write output */
- *dst = out;
-
- /* return num of signbits of out = 1/in value */
- return (signBits + 1u);
-
- }
-
- /**
- * @brief Function to Calculates 1/in(reciprocal) value of Q15 Data type.
- */
- __STATIC_INLINE uint32_t arm_recip_q15(
- q15_t in,
- q15_t * dst,
- q15_t * pRecipTable)
- {
-
- uint32_t out = 0, tempVal = 0;
- uint32_t index = 0, i = 0;
- uint32_t signBits = 0;
-
- if(in > 0)
- {
- signBits = __CLZ(in) - 17;
- }
- else
- {
- signBits = __CLZ(-in) - 17;
- }
-
- /* Convert input sample to 1.15 format */
- in = in << signBits;
-
- /* calculation of index for initial approximated Val */
- index = in >> 8;
- index = (index & INDEX_MASK);
-
- /* 1.15 with exp 1 */
- out = pRecipTable[index];
-
- /* calculation of reciprocal value */
- /* running approximation for two iterations */
- for (i = 0; i < 2; i++)
- {
- tempVal = (q15_t) (((q31_t) in * out) >> 15);
- tempVal = 0x7FFF - tempVal;
- /* 1.15 with exp 1 */
- out = (q15_t) (((q31_t) out * tempVal) >> 14);
- }
-
- /* write output */
- *dst = out;
-
- /* return num of signbits of out = 1/in value */
- return (signBits + 1);
-
- }
-
-
- /*
- * @brief C custom defined intrinisic function for only M0 processors
- */
-#if defined(ARM_MATH_CM0)
-
- __STATIC_INLINE q31_t __SSAT(
- q31_t x,
- uint32_t y)
- {
- int32_t posMax, negMin;
- uint32_t i;
-
- posMax = 1;
- for (i = 0; i < (y - 1); i++)
- {
- posMax = posMax * 2;
- }
-
- if(x > 0)
- {
- posMax = (posMax - 1);
-
- if(x > posMax)
- {
- x = posMax;
- }
- }
- else
- {
- negMin = -posMax;
-
- if(x < negMin)
- {
- x = negMin;
- }
- }
- return (x);
-
-
- }
-
-#endif /* end of ARM_MATH_CM0 */
-
-
-
- /*
- * @brief C custom defined intrinsic function for M3 and M0 processors
- */
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
-
- /*
- * @brief C custom defined QADD8 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QADD8(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q7_t r, s, t, u;
-
- r = (q7_t) x;
- s = (q7_t) y;
-
- r = __SSAT((q31_t) (r + s), 8);
- s = __SSAT(((q31_t) (((x << 16) >> 24) + ((y << 16) >> 24))), 8);
- t = __SSAT(((q31_t) (((x << 8) >> 24) + ((y << 8) >> 24))), 8);
- u = __SSAT(((q31_t) ((x >> 24) + (y >> 24))), 8);
-
- sum =
- (((q31_t) u << 24) & 0xFF000000) | (((q31_t) t << 16) & 0x00FF0000) |
- (((q31_t) s << 8) & 0x0000FF00) | (r & 0x000000FF);
-
- return sum;
-
- }
-
- /*
- * @brief C custom defined QSUB8 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QSUB8(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q31_t r, s, t, u;
-
- r = (q7_t) x;
- s = (q7_t) y;
-
- r = __SSAT((r - s), 8);
- s = __SSAT(((q31_t) (((x << 16) >> 24) - ((y << 16) >> 24))), 8) << 8;
- t = __SSAT(((q31_t) (((x << 8) >> 24) - ((y << 8) >> 24))), 8) << 16;
- u = __SSAT(((q31_t) ((x >> 24) - (y >> 24))), 8) << 24;
-
- sum =
- (u & 0xFF000000) | (t & 0x00FF0000) | (s & 0x0000FF00) | (r &
- 0x000000FF);
-
- return sum;
- }
-
- /*
- * @brief C custom defined QADD16 for M3 and M0 processors
- */
-
- /*
- * @brief C custom defined QADD16 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QADD16(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q31_t r, s;
-
- r = (short) x;
- s = (short) y;
-
- r = __SSAT(r + s, 16);
- s = __SSAT(((q31_t) ((x >> 16) + (y >> 16))), 16) << 16;
-
- sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
- return sum;
-
- }
-
- /*
- * @brief C custom defined SHADD16 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SHADD16(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q31_t r, s;
-
- r = (short) x;
- s = (short) y;
-
- r = ((r >> 1) + (s >> 1));
- s = ((q31_t) ((x >> 17) + (y >> 17))) << 16;
-
- sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
- return sum;
-
- }
-
- /*
- * @brief C custom defined QSUB16 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QSUB16(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q31_t r, s;
-
- r = (short) x;
- s = (short) y;
-
- r = __SSAT(r - s, 16);
- s = __SSAT(((q31_t) ((x >> 16) - (y >> 16))), 16) << 16;
-
- sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
- return sum;
- }
-
- /*
- * @brief C custom defined SHSUB16 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SHSUB16(
- q31_t x,
- q31_t y)
- {
-
- q31_t diff;
- q31_t r, s;
-
- r = (short) x;
- s = (short) y;
-
- r = ((r >> 1) - (s >> 1));
- s = (((x >> 17) - (y >> 17)) << 16);
-
- diff = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
- return diff;
- }
-
- /*
- * @brief C custom defined QASX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QASX(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum = 0;
-
- sum =
- ((sum +
- clip_q31_to_q15((q31_t) ((short) (x >> 16) + (short) y))) << 16) +
- clip_q31_to_q15((q31_t) ((short) x - (short) (y >> 16)));
-
- return sum;
- }
-
- /*
- * @brief C custom defined SHASX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SHASX(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q31_t r, s;
-
- r = (short) x;
- s = (short) y;
-
- r = ((r >> 1) - (y >> 17));
- s = (((x >> 17) + (s >> 1)) << 16);
-
- sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
- return sum;
- }
-
-
- /*
- * @brief C custom defined QSAX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QSAX(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum = 0;
-
- sum =
- ((sum +
- clip_q31_to_q15((q31_t) ((short) (x >> 16) - (short) y))) << 16) +
- clip_q31_to_q15((q31_t) ((short) x + (short) (y >> 16)));
-
- return sum;
- }
-
- /*
- * @brief C custom defined SHSAX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SHSAX(
- q31_t x,
- q31_t y)
- {
-
- q31_t sum;
- q31_t r, s;
-
- r = (short) x;
- s = (short) y;
-
- r = ((r >> 1) + (y >> 17));
- s = (((x >> 17) - (s >> 1)) << 16);
-
- sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
- return sum;
- }
-
- /*
- * @brief C custom defined SMUSDX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMUSDX(
- q31_t x,
- q31_t y)
- {
-
- return ((q31_t) (((short) x * (short) (y >> 16)) -
- ((short) (x >> 16) * (short) y)));
- }
-
- /*
- * @brief C custom defined SMUADX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMUADX(
- q31_t x,
- q31_t y)
- {
-
- return ((q31_t) (((short) x * (short) (y >> 16)) +
- ((short) (x >> 16) * (short) y)));
- }
-
- /*
- * @brief C custom defined QADD for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QADD(
- q31_t x,
- q31_t y)
- {
- return clip_q63_to_q31((q63_t) x + y);
- }
-
- /*
- * @brief C custom defined QSUB for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __QSUB(
- q31_t x,
- q31_t y)
- {
- return clip_q63_to_q31((q63_t) x - y);
- }
-
- /*
- * @brief C custom defined SMLAD for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMLAD(
- q31_t x,
- q31_t y,
- q31_t sum)
- {
-
- return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
- ((short) x * (short) y));
- }
-
- /*
- * @brief C custom defined SMLADX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMLADX(
- q31_t x,
- q31_t y,
- q31_t sum)
- {
-
- return (sum + ((short) (x >> 16) * (short) (y)) +
- ((short) x * (short) (y >> 16)));
- }
-
- /*
- * @brief C custom defined SMLSDX for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMLSDX(
- q31_t x,
- q31_t y,
- q31_t sum)
- {
-
- return (sum - ((short) (x >> 16) * (short) (y)) +
- ((short) x * (short) (y >> 16)));
- }
-
- /*
- * @brief C custom defined SMLALD for M3 and M0 processors
- */
- __STATIC_INLINE q63_t __SMLALD(
- q31_t x,
- q31_t y,
- q63_t sum)
- {
-
- return (sum + ((short) (x >> 16) * (short) (y >> 16)) +
- ((short) x * (short) y));
- }
-
- /*
- * @brief C custom defined SMLALDX for M3 and M0 processors
- */
- __STATIC_INLINE q63_t __SMLALDX(
- q31_t x,
- q31_t y,
- q63_t sum)
- {
-
- return (sum + ((short) (x >> 16) * (short) y)) +
- ((short) x * (short) (y >> 16));
- }
-
- /*
- * @brief C custom defined SMUAD for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMUAD(
- q31_t x,
- q31_t y)
- {
-
- return (((x >> 16) * (y >> 16)) +
- (((x << 16) >> 16) * ((y << 16) >> 16)));
- }
-
- /*
- * @brief C custom defined SMUSD for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SMUSD(
- q31_t x,
- q31_t y)
- {
-
- return (-((x >> 16) * (y >> 16)) +
- (((x << 16) >> 16) * ((y << 16) >> 16)));
- }
-
-
- /*
- * @brief C custom defined SXTB16 for M3 and M0 processors
- */
- __STATIC_INLINE q31_t __SXTB16(
- q31_t x)
- {
-
- return ((((x << 24) >> 24) & 0x0000FFFF) |
- (((x << 8) >> 8) & 0xFFFF0000));
- }
-
-
-#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0) */
-
-
- /**
- * @brief Instance structure for the Q7 FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q7_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- } arm_fir_instance_q7;
-
- /**
- * @brief Instance structure for the Q15 FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- } arm_fir_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- } arm_fir_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of filter coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- } arm_fir_instance_f32;
-
-
- /**
- * @brief Processing function for the Q7 FIR filter.
- * @param[in] *S points to an instance of the Q7 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_q7(
- const arm_fir_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q7 FIR filter.
- * @param[in,out] *S points to an instance of the Q7 FIR structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed.
- * @return none
- */
- void arm_fir_init_q7(
- arm_fir_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 FIR filter.
- * @param[in] *S points to an instance of the Q15 FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_q15(
- const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q15 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_fast_q15(
- const arm_fir_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q15 FIR filter.
- * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed at a time.
- * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
- * <code>numTaps</code> is not a supported value.
- */
-
- arm_status arm_fir_init_q15(
- arm_fir_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q31 FIR filter.
- * @param[in] *S points to an instance of the Q31 FIR filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_q31(
- const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q31 FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_fast_q31(
- const arm_fir_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q31 FIR filter.
- * @param[in,out] *S points to an instance of the Q31 FIR structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed at a time.
- * @return none.
- */
- void arm_fir_init_q31(
- arm_fir_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the floating-point FIR filter.
- * @param[in] *S points to an instance of the floating-point FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_f32(
- const arm_fir_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the floating-point FIR filter.
- * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
- * @param[in] numTaps Number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of samples that are processed at a time.
- * @return none.
- */
- void arm_fir_init_f32(
- arm_fir_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 Biquad cascade filter.
- */
- typedef struct
- {
- int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q15_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- int8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
-
- } arm_biquad_casd_df1_inst_q15;
-
-
- /**
- * @brief Instance structure for the Q31 Biquad cascade filter.
- */
- typedef struct
- {
- uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q31_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
- uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. */
-
- } arm_biquad_casd_df1_inst_q31;
-
- /**
- * @brief Instance structure for the floating-point Biquad cascade filter.
- */
- typedef struct
- {
- uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< Points to the array of state coefficients. The array is of length 4*numStages. */
- float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of length 5*numStages. */
-
-
- } arm_biquad_casd_df1_inst_f32;
-
-
-
- /**
- * @brief Processing function for the Q15 Biquad cascade filter.
- * @param[in] *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cascade_df1_q15(
- const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q15 Biquad cascade filter.
- * @param[in,out] *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
- * @return none
- */
-
- void arm_biquad_cascade_df1_init_q15(
- arm_biquad_casd_df1_inst_q15 * S,
- uint8_t numStages,
- q15_t * pCoeffs,
- q15_t * pState,
- int8_t postShift);
-
-
- /**
- * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q15 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cascade_df1_fast_q15(
- const arm_biquad_casd_df1_inst_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 Biquad cascade filter
- * @param[in] *S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cascade_df1_q31(
- const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cascade_df1_fast_q31(
- const arm_biquad_casd_df1_inst_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q31 Biquad cascade filter.
- * @param[in,out] *S points to an instance of the Q31 Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] postShift Shift to be applied to the output. Varies according to the coefficients format
- * @return none
- */
-
- void arm_biquad_cascade_df1_init_q31(
- arm_biquad_casd_df1_inst_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q31_t * pState,
- int8_t postShift);
-
- /**
- * @brief Processing function for the floating-point Biquad cascade filter.
- * @param[in] *S points to an instance of the floating-point Biquad cascade structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cascade_df1_f32(
- const arm_biquad_casd_df1_inst_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the floating-point Biquad cascade filter.
- * @param[in,out] *S points to an instance of the floating-point Biquad cascade structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @return none
- */
-
- void arm_biquad_cascade_df1_init_f32(
- arm_biquad_casd_df1_inst_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
-
- /**
- * @brief Instance structure for the floating-point matrix structure.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- float32_t *pData; /**< points to the data of the matrix. */
- } arm_matrix_instance_f32;
-
- /**
- * @brief Instance structure for the Q15 matrix structure.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- q15_t *pData; /**< points to the data of the matrix. */
-
- } arm_matrix_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 matrix structure.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows of the matrix. */
- uint16_t numCols; /**< number of columns of the matrix. */
- q31_t *pData; /**< points to the data of the matrix. */
-
- } arm_matrix_instance_q31;
-
-
-
- /**
- * @brief Floating-point matrix addition.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_add_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
- /**
- * @brief Q15 matrix addition.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_add_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst);
-
- /**
- * @brief Q31 matrix addition.
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_add_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix transpose.
- * @param[in] *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_trans_f32(
- const arm_matrix_instance_f32 * pSrc,
- arm_matrix_instance_f32 * pDst);
-
-
- /**
- * @brief Q15 matrix transpose.
- * @param[in] *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_trans_q15(
- const arm_matrix_instance_q15 * pSrc,
- arm_matrix_instance_q15 * pDst);
-
- /**
- * @brief Q31 matrix transpose.
- * @param[in] *pSrc points to the input matrix
- * @param[out] *pDst points to the output matrix
- * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
- * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_trans_q31(
- const arm_matrix_instance_q31 * pSrc,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix multiplication
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_mult_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
- /**
- * @brief Q15 matrix multiplication
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_mult_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState);
-
- /**
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @param[in] *pState points to the array for storing intermediate results
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_mult_fast_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst,
- q15_t * pState);
-
- /**
- * @brief Q31 matrix multiplication
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_mult_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
- /**
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_mult_fast_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Floating-point matrix subtraction
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_sub_f32(
- const arm_matrix_instance_f32 * pSrcA,
- const arm_matrix_instance_f32 * pSrcB,
- arm_matrix_instance_f32 * pDst);
-
- /**
- * @brief Q15 matrix subtraction
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_sub_q15(
- const arm_matrix_instance_q15 * pSrcA,
- const arm_matrix_instance_q15 * pSrcB,
- arm_matrix_instance_q15 * pDst);
-
- /**
- * @brief Q31 matrix subtraction
- * @param[in] *pSrcA points to the first input matrix structure
- * @param[in] *pSrcB points to the second input matrix structure
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_sub_q31(
- const arm_matrix_instance_q31 * pSrcA,
- const arm_matrix_instance_q31 * pSrcB,
- arm_matrix_instance_q31 * pDst);
-
- /**
- * @brief Floating-point matrix scaling.
- * @param[in] *pSrc points to the input matrix
- * @param[in] scale scale factor
- * @param[out] *pDst points to the output matrix
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_scale_f32(
- const arm_matrix_instance_f32 * pSrc,
- float32_t scale,
- arm_matrix_instance_f32 * pDst);
-
- /**
- * @brief Q15 matrix scaling.
- * @param[in] *pSrc points to input matrix
- * @param[in] scaleFract fractional portion of the scale factor
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to output matrix
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_scale_q15(
- const arm_matrix_instance_q15 * pSrc,
- q15_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q15 * pDst);
-
- /**
- * @brief Q31 matrix scaling.
- * @param[in] *pSrc points to input matrix
- * @param[in] scaleFract fractional portion of the scale factor
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to output matrix structure
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-
- arm_status arm_mat_scale_q31(
- const arm_matrix_instance_q31 * pSrc,
- q31_t scaleFract,
- int32_t shift,
- arm_matrix_instance_q31 * pDst);
-
-
- /**
- * @brief Q31 matrix initialization.
- * @param[in,out] *S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] *pData points to the matrix data array.
- * @return none
- */
-
- void arm_mat_init_q31(
- arm_matrix_instance_q31 * S,
- uint16_t nRows,
- uint16_t nColumns,
- q31_t * pData);
-
- /**
- * @brief Q15 matrix initialization.
- * @param[in,out] *S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] *pData points to the matrix data array.
- * @return none
- */
-
- void arm_mat_init_q15(
- arm_matrix_instance_q15 * S,
- uint16_t nRows,
- uint16_t nColumns,
- q15_t * pData);
-
- /**
- * @brief Floating-point matrix initialization.
- * @param[in,out] *S points to an instance of the floating-point matrix structure.
- * @param[in] nRows number of rows in the matrix.
- * @param[in] nColumns number of columns in the matrix.
- * @param[in] *pData points to the matrix data array.
- * @return none
- */
-
- void arm_mat_init_f32(
- arm_matrix_instance_f32 * S,
- uint16_t nRows,
- uint16_t nColumns,
- float32_t * pData);
-
-
-
- /**
- * @brief Instance structure for the Q15 PID Control.
- */
- typedef struct
- {
- q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
-#ifdef ARM_MATH_CM0
- q15_t A1;
- q15_t A2;
-#else
- q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
-#endif
- q15_t state[3]; /**< The state array of length 3. */
- q15_t Kp; /**< The proportional gain. */
- q15_t Ki; /**< The integral gain. */
- q15_t Kd; /**< The derivative gain. */
- } arm_pid_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 PID Control.
- */
- typedef struct
- {
- q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
- q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
- q31_t A2; /**< The derived gain, A2 = Kd . */
- q31_t state[3]; /**< The state array of length 3. */
- q31_t Kp; /**< The proportional gain. */
- q31_t Ki; /**< The integral gain. */
- q31_t Kd; /**< The derivative gain. */
-
- } arm_pid_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point PID Control.
- */
- typedef struct
- {
- float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */
- float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */
- float32_t A2; /**< The derived gain, A2 = Kd . */
- float32_t state[3]; /**< The state array of length 3. */
- float32_t Kp; /**< The proportional gain. */
- float32_t Ki; /**< The integral gain. */
- float32_t Kd; /**< The derivative gain. */
- } arm_pid_instance_f32;
-
-
-
- /**
- * @brief Initialization function for the floating-point PID Control.
- * @param[in,out] *S points to an instance of the PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- */
- void arm_pid_init_f32(
- arm_pid_instance_f32 * S,
- int32_t resetStateFlag);
-
- /**
- * @brief Reset function for the floating-point PID Control.
- * @param[in,out] *S is an instance of the floating-point PID Control structure
- * @return none
- */
- void arm_pid_reset_f32(
- arm_pid_instance_f32 * S);
-
-
- /**
- * @brief Initialization function for the Q31 PID Control.
- * @param[in,out] *S points to an instance of the Q15 PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- */
- void arm_pid_init_q31(
- arm_pid_instance_q31 * S,
- int32_t resetStateFlag);
-
-
- /**
- * @brief Reset function for the Q31 PID Control.
- * @param[in,out] *S points to an instance of the Q31 PID Control structure
- * @return none
- */
-
- void arm_pid_reset_q31(
- arm_pid_instance_q31 * S);
-
- /**
- * @brief Initialization function for the Q15 PID Control.
- * @param[in,out] *S points to an instance of the Q15 PID structure.
- * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
- * @return none.
- */
- void arm_pid_init_q15(
- arm_pid_instance_q15 * S,
- int32_t resetStateFlag);
-
- /**
- * @brief Reset function for the Q15 PID Control.
- * @param[in,out] *S points to an instance of the q15 PID Control structure
- * @return none
- */
- void arm_pid_reset_q15(
- arm_pid_instance_q15 * S);
-
-
- /**
- * @brief Instance structure for the floating-point Linear Interpolate function.
- */
- typedef struct
- {
- uint32_t nValues; /**< nValues */
- float32_t x1; /**< x1 */
- float32_t xSpacing; /**< xSpacing */
- float32_t *pYData; /**< pointer to the table of Y values */
- } arm_linear_interp_instance_f32;
-
- /**
- * @brief Instance structure for the floating-point bilinear interpolation function.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- float32_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_f32;
-
- /**
- * @brief Instance structure for the Q31 bilinear interpolation function.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q31_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_q31;
-
- /**
- * @brief Instance structure for the Q15 bilinear interpolation function.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q15_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_q15;
-
- /**
- * @brief Instance structure for the Q15 bilinear interpolation function.
- */
-
- typedef struct
- {
- uint16_t numRows; /**< number of rows in the data table. */
- uint16_t numCols; /**< number of columns in the data table. */
- q7_t *pData; /**< points to the data table. */
- } arm_bilinear_interp_instance_q7;
-
-
- /**
- * @brief Q7 vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q15 vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q31 vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_mult_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Floating-point vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_mult_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q15 CFFT/CIFFT function.
- */
-
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q15_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix4_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 CFFT/CIFFT function.
- */
-
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q31_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix4_instance_q31;
-
-
- /**
- * @brief Instance structure for the floating-point CFFT/CIFFT function.
- */
-
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- float32_t *pTwiddle; /**< points to the twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- float32_t onebyfftLen; /**< value of 1/fftLen. */
- } arm_cfft_radix4_instance_f32;
-
-
- /**
- * @brief Instance structure for the Q15 CFFT/CIFFT function.
- */
-
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix2_instance_q15;
-
- /**
- * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
- */
-
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- q31_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- } arm_cfft_radix2_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point CFFT/CIFFT function.
- */
-
- typedef struct
- {
- uint16_t fftLen; /**< length of the FFT. */
- uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
- uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
- float32_t *pTwiddle; /**< points to the Twiddle factor table. */
- uint16_t *pBitRevTable; /**< points to the bit reversal table. */
- uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- uint16_t bitRevFactor; /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
- float32_t onebyfftLen; /**< value of 1/fftLen. */
- } arm_cfft_radix2_instance_f32;
-
-
- /**
- * @brief Processing function for the Q15 CFFT/CIFFT.
- * @param[in] *S points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- */
-
- void arm_cfft_radix4_q15(
- const arm_cfft_radix4_instance_q15 * S,
- q15_t * pSrc);
-
- /**
- * @brief Processing function for the Q15 CFFT/CIFFT.
- * @param[in] *S points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- */
-
- void arm_cfft_radix2_q15(
- const arm_cfft_radix2_instance_q15 * S,
- q15_t * pSrc);
-
- /**
- * @brief Initialization function for the Q15 CFFT/CIFFT.
- * @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in] fftLen length of the FFT.
- * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
- */
-
- arm_status arm_cfft_radix4_init_q15(
- arm_cfft_radix4_instance_q15 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Initialization function for the Q15 CFFT/CIFFT.
- * @param[in,out] *S points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in] fftLen length of the FFT.
- * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
- */
-
- arm_status arm_cfft_radix2_init_q15(
- arm_cfft_radix2_instance_q15 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Processing function for the Q31 CFFT/CIFFT.
- * @param[in] *S points to an instance of the Q31 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- */
-
- void arm_cfft_radix4_q31(
- const arm_cfft_radix4_instance_q31 * S,
- q31_t * pSrc);
-
- /**
- * @brief Initialization function for the Q31 CFFT/CIFFT.
- * @param[in,out] *S points to an instance of the Q31 CFFT/CIFFT structure.
- * @param[in] fftLen length of the FFT.
- * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
- */
-
- arm_status arm_cfft_radix4_init_q31(
- arm_cfft_radix4_instance_q31 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Processing function for the Radix-2 Q31 CFFT/CIFFT.
- * @param[in] *S points to an instance of the Radix-2 Q31 CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- */
-
- void arm_cfft_radix2_q31(
- const arm_cfft_radix2_instance_q31 * S,
- q31_t * pSrc);
-
- /**
- * @brief Initialization function for the Radix-2 Q31 CFFT/CIFFT.
- * @param[in,out] *S points to an instance of the Radix-2 Q31 CFFT/CIFFT structure.
- * @param[in] fftLen length of the FFT.
- * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
- */
-
- arm_status arm_cfft_radix2_init_q31(
- arm_cfft_radix2_instance_q31 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-
-
- /**
- * @brief Processing function for the floating-point CFFT/CIFFT.
- * @param[in] *S points to an instance of the floating-point CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- */
-
- void arm_cfft_radix2_f32(
- const arm_cfft_radix2_instance_f32 * S,
- float32_t * pSrc);
-
- /**
- * @brief Initialization function for the floating-point CFFT/CIFFT.
- * @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure.
- * @param[in] fftLen length of the FFT.
- * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
- */
-
- arm_status arm_cfft_radix2_init_f32(
- arm_cfft_radix2_instance_f32 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
- /**
- * @brief Processing function for the floating-point CFFT/CIFFT.
- * @param[in] *S points to an instance of the floating-point CFFT/CIFFT structure.
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
- * @return none.
- */
-
- void arm_cfft_radix4_f32(
- const arm_cfft_radix4_instance_f32 * S,
- float32_t * pSrc);
-
- /**
- * @brief Initialization function for the floating-point CFFT/CIFFT.
- * @param[in,out] *S points to an instance of the floating-point CFFT/CIFFT structure.
- * @param[in] fftLen length of the FFT.
- * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLen</code> is not a supported value.
- */
-
- arm_status arm_cfft_radix4_init_f32(
- arm_cfft_radix4_instance_f32 * S,
- uint16_t fftLen,
- uint8_t ifftFlag,
- uint8_t bitReverseFlag);
-
-
-
- /*----------------------------------------------------------------------
- * Internal functions prototypes FFT function
- ----------------------------------------------------------------------*/
-
- /**
- * @brief Core function for the floating-point CFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to the twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix4_butterfly_f32(
- float32_t * pSrc,
- uint16_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier);
-
- /**
- * @brief Core function for the floating-point CIFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @param[in] onebyfftLen value of 1/fftLen.
- * @return none.
- */
-
- void arm_radix4_butterfly_inverse_f32(
- float32_t * pSrc,
- uint16_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier,
- float32_t onebyfftLen);
-
- /**
- * @brief In-place bit reversal function.
- * @param[in, out] *pSrc points to the in-place buffer of floating-point data type.
- * @param[in] fftSize length of the FFT.
- * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
- * @param[in] *pBitRevTab points to the bit reversal table.
- * @return none.
- */
-
- void arm_bitreversal_f32(
- float32_t * pSrc,
- uint16_t fftSize,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
-
- /**
- * @brief Core function for the Q31 CFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix4_butterfly_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint32_t twidCoefModifier);
-
- /**
- * @brief Core function for the f32 FFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of f32 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix2_butterfly_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier);
-
- /**
- * @brief Core function for the Radix-2 Q31 CFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix2_butterfly_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint16_t twidCoefModifier);
-
- /**
- * @brief Core function for the Radix-2 Q15 CFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix2_butterfly_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint16_t twidCoefModifier);
-
- /**
- * @brief Core function for the Radix-2 Q15 CFFT Inverse butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix2_butterfly_inverse_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- q15_t * pCoef,
- uint16_t twidCoefModifier);
-
- /**
- * @brief Core function for the Radix-2 Q31 CFFT Inverse butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix2_butterfly_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint16_t twidCoefModifier);
-
- /**
- * @brief Core function for the f32 IFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of f32 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to Twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @param[in] onebyfftLen 1/fftLenfth
- * @return none.
- */
-
- void arm_radix2_butterfly_inverse_f32(
- float32_t * pSrc,
- uint32_t fftLen,
- float32_t * pCoef,
- uint16_t twidCoefModifier,
- float32_t onebyfftLen);
-
- /**
- * @brief Core function for the Q31 CIFFT butterfly process.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix4_butterfly_inverse_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- q31_t * pCoef,
- uint32_t twidCoefModifier);
-
- /**
- * @brief In-place bit reversal function.
- * @param[in, out] *pSrc points to the in-place buffer of Q31 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
- * @param[in] *pBitRevTab points to bit reversal table.
- * @return none.
- */
-
- void arm_bitreversal_q31(
- q31_t * pSrc,
- uint32_t fftLen,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
-
- /**
- * @brief Core function for the Q15 CFFT butterfly process.
- * @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef16 points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix4_butterfly_q15(
- q15_t * pSrc16,
- uint32_t fftLen,
- q15_t * pCoef16,
- uint32_t twidCoefModifier);
-
-
- /**
- * @brief Core function for the Q15 CIFFT butterfly process.
- * @param[in, out] *pSrc16 points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] *pCoef16 points to twiddle coefficient buffer.
- * @param[in] twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
- * @return none.
- */
-
- void arm_radix4_butterfly_inverse_q15(
- q15_t * pSrc16,
- uint32_t fftLen,
- q15_t * pCoef16,
- uint32_t twidCoefModifier);
-
- /**
- * @brief In-place bit reversal function.
- * @param[in, out] *pSrc points to the in-place buffer of Q15 data type.
- * @param[in] fftLen length of the FFT.
- * @param[in] bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
- * @param[in] *pBitRevTab points to bit reversal table.
- * @return none.
- */
-
- void arm_bitreversal_q15(
- q15_t * pSrc,
- uint32_t fftLen,
- uint16_t bitRevFactor,
- uint16_t * pBitRevTab);
-
-
- /**
- * @brief Instance structure for the Q15 RFFT/RIFFT function.
- */
-
- typedef struct
- {
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint32_t fftLenBy2; /**< length of the complex FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
- } arm_rfft_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 RFFT/RIFFT function.
- */
-
- typedef struct
- {
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint32_t fftLenBy2; /**< length of the complex FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
- } arm_rfft_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point RFFT/RIFFT function.
- */
-
- typedef struct
- {
- uint32_t fftLenReal; /**< length of the real FFT. */
- uint16_t fftLenBy2; /**< length of the complex FFT. */
- uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
- uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
- uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
- float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. */
- float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. */
- arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
- } arm_rfft_instance_f32;
-
- /**
- * @brief Processing function for the Q15 RFFT/RIFFT.
- * @param[in] *S points to an instance of the Q15 RFFT/RIFFT structure.
- * @param[in] *pSrc points to the input buffer.
- * @param[out] *pDst points to the output buffer.
- * @return none.
- */
-
- void arm_rfft_q15(
- const arm_rfft_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst);
-
- /**
- * @brief Initialization function for the Q15 RFFT/RIFFT.
- * @param[in, out] *S points to an instance of the Q15 RFFT/RIFFT structure.
- * @param[in] *S_CFFT points to an instance of the Q15 CFFT/CIFFT structure.
- * @param[in] fftLenReal length of the FFT.
- * @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
- */
-
- arm_status arm_rfft_init_q15(
- arm_rfft_instance_q15 * S,
- arm_cfft_radix4_instance_q15 * S_CFFT,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
-
- /**
- * @brief Processing function for the Q31 RFFT/RIFFT.
- * @param[in] *S points to an instance of the Q31 RFFT/RIFFT structure.
- * @param[in] *pSrc points to the input buffer.
- * @param[out] *pDst points to the output buffer.
- * @return none.
- */
-
- void arm_rfft_q31(
- const arm_rfft_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst);
-
- /**
- * @brief Initialization function for the Q31 RFFT/RIFFT.
- * @param[in, out] *S points to an instance of the Q31 RFFT/RIFFT structure.
- * @param[in, out] *S_CFFT points to an instance of the Q31 CFFT/CIFFT structure.
- * @param[in] fftLenReal length of the FFT.
- * @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
- */
-
- arm_status arm_rfft_init_q31(
- arm_rfft_instance_q31 * S,
- arm_cfft_radix4_instance_q31 * S_CFFT,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
-
- /**
- * @brief Initialization function for the floating-point RFFT/RIFFT.
- * @param[in,out] *S points to an instance of the floating-point RFFT/RIFFT structure.
- * @param[in,out] *S_CFFT points to an instance of the floating-point CFFT/CIFFT structure.
- * @param[in] fftLenReal length of the FFT.
- * @param[in] ifftFlagR flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
- * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported value.
- */
-
- arm_status arm_rfft_init_f32(
- arm_rfft_instance_f32 * S,
- arm_cfft_radix4_instance_f32 * S_CFFT,
- uint32_t fftLenReal,
- uint32_t ifftFlagR,
- uint32_t bitReverseFlag);
-
- /**
- * @brief Processing function for the floating-point RFFT/RIFFT.
- * @param[in] *S points to an instance of the floating-point RFFT/RIFFT structure.
- * @param[in] *pSrc points to the input buffer.
- * @param[out] *pDst points to the output buffer.
- * @return none.
- */
-
- void arm_rfft_f32(
- const arm_rfft_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst);
-
- /**
- * @brief Instance structure for the floating-point DCT4/IDCT4 function.
- */
-
- typedef struct
- {
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- float32_t normalize; /**< normalizing factor. */
- float32_t *pTwiddle; /**< points to the twiddle factor table. */
- float32_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
- } arm_dct4_instance_f32;
-
- /**
- * @brief Initialization function for the floating-point DCT4/IDCT4.
- * @param[in,out] *S points to an instance of floating-point DCT4/IDCT4 structure.
- * @param[in] *S_RFFT points to an instance of floating-point RFFT/RIFFT structure.
- * @param[in] *S_CFFT points to an instance of floating-point CFFT/CIFFT structure.
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
- */
-
- arm_status arm_dct4_init_f32(
- arm_dct4_instance_f32 * S,
- arm_rfft_instance_f32 * S_RFFT,
- arm_cfft_radix4_instance_f32 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- float32_t normalize);
-
- /**
- * @brief Processing function for the floating-point DCT4/IDCT4.
- * @param[in] *S points to an instance of the floating-point DCT4/IDCT4 structure.
- * @param[in] *pState points to state buffer.
- * @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- */
-
- void arm_dct4_f32(
- const arm_dct4_instance_f32 * S,
- float32_t * pState,
- float32_t * pInlineBuffer);
-
- /**
- * @brief Instance structure for the Q31 DCT4/IDCT4 function.
- */
-
- typedef struct
- {
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- q31_t normalize; /**< normalizing factor. */
- q31_t *pTwiddle; /**< points to the twiddle factor table. */
- q31_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
- } arm_dct4_instance_q31;
-
- /**
- * @brief Initialization function for the Q31 DCT4/IDCT4.
- * @param[in,out] *S points to an instance of Q31 DCT4/IDCT4 structure.
- * @param[in] *S_RFFT points to an instance of Q31 RFFT/RIFFT structure
- * @param[in] *S_CFFT points to an instance of Q31 CFFT/CIFFT structure
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- */
-
- arm_status arm_dct4_init_q31(
- arm_dct4_instance_q31 * S,
- arm_rfft_instance_q31 * S_RFFT,
- arm_cfft_radix4_instance_q31 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- q31_t normalize);
-
- /**
- * @brief Processing function for the Q31 DCT4/IDCT4.
- * @param[in] *S points to an instance of the Q31 DCT4 structure.
- * @param[in] *pState points to state buffer.
- * @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- */
-
- void arm_dct4_q31(
- const arm_dct4_instance_q31 * S,
- q31_t * pState,
- q31_t * pInlineBuffer);
-
- /**
- * @brief Instance structure for the Q15 DCT4/IDCT4 function.
- */
-
- typedef struct
- {
- uint16_t N; /**< length of the DCT4. */
- uint16_t Nby2; /**< half of the length of the DCT4. */
- q15_t normalize; /**< normalizing factor. */
- q15_t *pTwiddle; /**< points to the twiddle factor table. */
- q15_t *pCosFactor; /**< points to the cosFactor table. */
- arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */
- arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
- } arm_dct4_instance_q15;
-
- /**
- * @brief Initialization function for the Q15 DCT4/IDCT4.
- * @param[in,out] *S points to an instance of Q15 DCT4/IDCT4 structure.
- * @param[in] *S_RFFT points to an instance of Q15 RFFT/RIFFT structure.
- * @param[in] *S_CFFT points to an instance of Q15 CFFT/CIFFT structure.
- * @param[in] N length of the DCT4.
- * @param[in] Nby2 half of the length of the DCT4.
- * @param[in] normalize normalizing factor.
- * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
- */
-
- arm_status arm_dct4_init_q15(
- arm_dct4_instance_q15 * S,
- arm_rfft_instance_q15 * S_RFFT,
- arm_cfft_radix4_instance_q15 * S_CFFT,
- uint16_t N,
- uint16_t Nby2,
- q15_t normalize);
-
- /**
- * @brief Processing function for the Q15 DCT4/IDCT4.
- * @param[in] *S points to an instance of the Q15 DCT4 structure.
- * @param[in] *pState points to state buffer.
- * @param[in,out] *pInlineBuffer points to the in-place input and output buffer.
- * @return none.
- */
-
- void arm_dct4_q15(
- const arm_dct4_instance_q15 * S,
- q15_t * pState,
- q15_t * pInlineBuffer);
-
- /**
- * @brief Floating-point vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_add_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q7 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_add_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q15 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_add_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q31 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_add_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Floating-point vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_sub_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q7 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_sub_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q15 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_sub_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q31 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_sub_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Multiplies a floating-point vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scale scale factor to be applied
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_scale_f32(
- float32_t * pSrc,
- float32_t scale,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Multiplies a Q7 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_scale_q7(
- q7_t * pSrc,
- q7_t scaleFract,
- int8_t shift,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Multiplies a Q15 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_scale_q15(
- q15_t * pSrc,
- q15_t scaleFract,
- int8_t shift,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Multiplies a Q31 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_scale_q31(
- q31_t * pSrc,
- q31_t scaleFract,
- int8_t shift,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q7 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_abs_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Floating-point vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_abs_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q15 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_abs_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Q31 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
- void arm_abs_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Dot product of floating-point vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- */
-
- void arm_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t blockSize,
- float32_t * result);
-
- /**
- * @brief Dot product of Q7 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- */
-
- void arm_dot_prod_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- uint32_t blockSize,
- q31_t * result);
-
- /**
- * @brief Dot product of Q15 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- */
-
- void arm_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t blockSize,
- q63_t * result);
-
- /**
- * @brief Dot product of Q31 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- */
-
- void arm_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t blockSize,
- q63_t * result);
-
- /**
- * @brief Shifts the elements of a Q7 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_shift_q7(
- q7_t * pSrc,
- int8_t shiftBits,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Shifts the elements of a Q15 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_shift_q15(
- q15_t * pSrc,
- int8_t shiftBits,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Shifts the elements of a Q31 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_shift_q31(
- q31_t * pSrc,
- int8_t shiftBits,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Adds a constant offset to a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_offset_f32(
- float32_t * pSrc,
- float32_t offset,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Adds a constant offset to a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_offset_q7(
- q7_t * pSrc,
- q7_t offset,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Adds a constant offset to a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_offset_q15(
- q15_t * pSrc,
- q15_t offset,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Adds a constant offset to a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_offset_q31(
- q31_t * pSrc,
- q31_t offset,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Negates the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_negate_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Negates the elements of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_negate_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Negates the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_negate_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Negates the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
- void arm_negate_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
- /**
- * @brief Copies the elements of a floating-point vector.
- * @param[in] *pSrc input pointer
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_copy_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Copies the elements of a Q7 vector.
- * @param[in] *pSrc input pointer
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_copy_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Copies the elements of a Q15 vector.
- * @param[in] *pSrc input pointer
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_copy_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Copies the elements of a Q31 vector.
- * @param[in] *pSrc input pointer
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_copy_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
- /**
- * @brief Fills a constant value into a floating-point vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_fill_f32(
- float32_t value,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Fills a constant value into a Q7 vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_fill_q7(
- q7_t value,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Fills a constant value into a Q15 vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_fill_q15(
- q15_t value,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Fills a constant value into a Q31 vector.
- * @param[in] value input value to be filled
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_fill_q31(
- q31_t value,
- q31_t * pDst,
- uint32_t blockSize);
-
-/**
- * @brief Convolution of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- */
-
- void arm_conv_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst);
-
-
- /**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return none.
- */
-
-
- void arm_conv_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-/**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written. Length srcALen+srcBLen-1.
- * @return none.
- */
-
- void arm_conv_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
- /**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @return none.
- */
-
- void arm_conv_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
- /**
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @param[in] *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return none.
- */
-
- void arm_conv_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-
- /**
- * @brief Convolution of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @return none.
- */
-
- void arm_conv_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
- /**
- * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @return none.
- */
-
- void arm_conv_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
-
- /**
- * @brief Convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return none.
- */
-
- void arm_conv_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-
- /**
- * @brief Convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length srcALen+srcBLen-1.
- * @return none.
- */
-
- void arm_conv_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst);
-
-
- /**
- * @brief Partial convolution of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
- /**
- * @brief Partial convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-/**
- * @brief Partial convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
- /**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Partial convolution of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
- /**
- * @brief Partial convolution of Q7 sequences
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
-/**
- * @brief Partial convolution of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data
- * @param[in] firstIndex is the first output sample to start with.
- * @param[in] numPoints is the number of output points to be computed.
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
- */
-
- arm_status arm_conv_partial_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- uint32_t firstIndex,
- uint32_t numPoints);
-
-
-
- /**
- * @brief Instance structure for the Q15 FIR decimator.
- */
-
- typedef struct
- {
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- } arm_fir_decimate_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR decimator.
- */
-
- typedef struct
- {
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-
- } arm_fir_decimate_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR decimator.
- */
-
- typedef struct
- {
- uint8_t M; /**< decimation factor. */
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-
- } arm_fir_decimate_instance_f32;
-
-
-
- /**
- * @brief Processing function for the floating-point FIR decimator.
- * @param[in] *S points to an instance of the floating-point FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- */
-
- void arm_fir_decimate_f32(
- const arm_fir_decimate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point FIR decimator.
- * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
-
- arm_status arm_fir_decimate_init_f32(
- arm_fir_decimate_instance_f32 * S,
- uint16_t numTaps,
- uint8_t M,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q15 FIR decimator.
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- */
-
- void arm_fir_decimate_q15(
- const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- */
-
- void arm_fir_decimate_fast_q15(
- const arm_fir_decimate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
-
- /**
- * @brief Initialization function for the Q15 FIR decimator.
- * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
-
- arm_status arm_fir_decimate_init_q15(
- arm_fir_decimate_instance_q15 * S,
- uint16_t numTaps,
- uint8_t M,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q31 FIR decimator.
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- */
-
- void arm_fir_decimate_q31(
- const arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of input samples to process per call.
- * @return none
- */
-
- void arm_fir_decimate_fast_q31(
- arm_fir_decimate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 FIR decimator.
- * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.
- * @param[in] numTaps number of coefficients in the filter.
- * @param[in] M decimation factor.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * <code>blockSize</code> is not a multiple of <code>M</code>.
- */
-
- arm_status arm_fir_decimate_init_q31(
- arm_fir_decimate_instance_q31 * S,
- uint16_t numTaps,
- uint8_t M,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
-
- /**
- * @brief Instance structure for the Q15 FIR interpolator.
- */
-
- typedef struct
- {
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- q15_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
- } arm_fir_interpolate_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR interpolator.
- */
-
- typedef struct
- {
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- q31_t *pState; /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
- } arm_fir_interpolate_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR interpolator.
- */
-
- typedef struct
- {
- uint8_t L; /**< upsample factor. */
- uint16_t phaseLength; /**< length of each polyphase filter component. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length L*phaseLength. */
- float32_t *pState; /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
- } arm_fir_interpolate_instance_f32;
-
-
- /**
- * @brief Processing function for the Q15 FIR interpolator.
- * @param[in] *S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_interpolate_q15(
- const arm_fir_interpolate_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 FIR interpolator.
- * @param[in,out] *S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- */
-
- arm_status arm_fir_interpolate_init_q15(
- arm_fir_interpolate_instance_q15 * S,
- uint8_t L,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q31 FIR interpolator.
- * @param[in] *S points to an instance of the Q15 FIR interpolator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_interpolate_q31(
- const arm_fir_interpolate_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q31 FIR interpolator.
- * @param[in,out] *S points to an instance of the Q31 FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- */
-
- arm_status arm_fir_interpolate_init_q31(
- arm_fir_interpolate_instance_q31 * S,
- uint8_t L,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the floating-point FIR interpolator.
- * @param[in] *S points to an instance of the floating-point FIR interpolator structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_interpolate_f32(
- const arm_fir_interpolate_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the floating-point FIR interpolator.
- * @param[in,out] *S points to an instance of the floating-point FIR interpolator structure.
- * @param[in] L upsample factor.
- * @param[in] numTaps number of filter coefficients in the filter.
- * @param[in] *pCoeffs points to the filter coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] blockSize number of input samples to process per call.
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
- * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
- */
-
- arm_status arm_fir_interpolate_init_f32(
- arm_fir_interpolate_instance_f32 * S,
- uint8_t L,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Instance structure for the high precision Q31 Biquad cascade filter.
- */
-
- typedef struct
- {
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- q63_t *pState; /**< points to the array of state coefficients. The array is of length 4*numStages. */
- q31_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- uint8_t postShift; /**< additional shift, in bits, applied to each output sample. */
-
- } arm_biquad_cas_df1_32x64_ins_q31;
-
-
- /**
- * @param[in] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cas_df1_32x64_q31(
- const arm_biquad_cas_df1_32x64_ins_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @param[in,out] *S points to an instance of the high precision Q31 Biquad cascade filter structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] postShift shift to be applied to the output. Varies according to the coefficients format
- * @return none
- */
-
- void arm_biquad_cas_df1_32x64_init_q31(
- arm_biquad_cas_df1_32x64_ins_q31 * S,
- uint8_t numStages,
- q31_t * pCoeffs,
- q63_t * pState,
- uint8_t postShift);
-
-
-
- /**
- * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
- */
-
- typedef struct
- {
- uint8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 2*numStages. */
- float32_t *pState; /**< points to the array of state coefficients. The array is of length 2*numStages. */
- float32_t *pCoeffs; /**< points to the array of coefficients. The array is of length 5*numStages. */
- } arm_biquad_cascade_df2T_instance_f32;
-
-
- /**
- * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in] *S points to an instance of the filter data structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_biquad_cascade_df2T_f32(
- const arm_biquad_cascade_df2T_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the floating-point transposed direct form II Biquad cascade filter.
- * @param[in,out] *S points to an instance of the filter data structure.
- * @param[in] numStages number of 2nd order stages in the filter.
- * @param[in] *pCoeffs points to the filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @return none
- */
-
- void arm_biquad_cascade_df2T_init_f32(
- arm_biquad_cascade_df2T_instance_f32 * S,
- uint8_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
-
-
- /**
- * @brief Instance structure for the Q15 FIR lattice filter.
- */
-
- typedef struct
- {
- uint16_t numStages; /**< number of filter stages. */
- q15_t *pState; /**< points to the state variable array. The array is of length numStages. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
- } arm_fir_lattice_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 FIR lattice filter.
- */
-
- typedef struct
- {
- uint16_t numStages; /**< number of filter stages. */
- q31_t *pState; /**< points to the state variable array. The array is of length numStages. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
- } arm_fir_lattice_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point FIR lattice filter.
- */
-
- typedef struct
- {
- uint16_t numStages; /**< number of filter stages. */
- float32_t *pState; /**< points to the state variable array. The array is of length numStages. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numStages. */
- } arm_fir_lattice_instance_f32;
-
- /**
- * @brief Initialization function for the Q15 FIR lattice filter.
- * @param[in] *S points to an instance of the Q15 FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] *pState points to the state buffer. The array is of length numStages.
- * @return none.
- */
-
- void arm_fir_lattice_init_q15(
- arm_fir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pCoeffs,
- q15_t * pState);
-
-
- /**
- * @brief Processing function for the Q15 FIR lattice filter.
- * @param[in] *S points to an instance of the Q15 FIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
- void arm_fir_lattice_q15(
- const arm_fir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q31 FIR lattice filter.
- * @param[in] *S points to an instance of the Q31 FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] *pState points to the state buffer. The array is of length numStages.
- * @return none.
- */
-
- void arm_fir_lattice_init_q31(
- arm_fir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pCoeffs,
- q31_t * pState);
-
-
- /**
- * @brief Processing function for the Q31 FIR lattice filter.
- * @param[in] *S points to an instance of the Q31 FIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_fir_lattice_q31(
- const arm_fir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
- * @param[in] *pState points to the state buffer. The array is of length numStages.
- * @return none.
- */
-
- void arm_fir_lattice_init_f32(
- arm_fir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pCoeffs,
- float32_t * pState);
-
- /**
- * @brief Processing function for the floating-point FIR lattice filter.
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_fir_lattice_f32(
- const arm_fir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Instance structure for the Q15 IIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of stages in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
- q15_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- q15_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
- } arm_iir_lattice_instance_q15;
-
- /**
- * @brief Instance structure for the Q31 IIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of stages in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
- q31_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- q31_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
- } arm_iir_lattice_instance_q31;
-
- /**
- * @brief Instance structure for the floating-point IIR lattice filter.
- */
- typedef struct
- {
- uint16_t numStages; /**< number of stages in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numStages+blockSize. */
- float32_t *pkCoeffs; /**< points to the reflection coefficient array. The array is of length numStages. */
- float32_t *pvCoeffs; /**< points to the ladder coefficient array. The array is of length numStages+1. */
- } arm_iir_lattice_instance_f32;
-
- /**
- * @brief Processing function for the floating-point IIR lattice filter.
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_iir_lattice_f32(
- const arm_iir_lattice_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the floating-point IIR lattice filter.
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
- * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
- * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize-1.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_iir_lattice_init_f32(
- arm_iir_lattice_instance_f32 * S,
- uint16_t numStages,
- float32_t * pkCoeffs,
- float32_t * pvCoeffs,
- float32_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q31 IIR lattice filter.
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_iir_lattice_q31(
- const arm_iir_lattice_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q31 IIR lattice filter.
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
- * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
- * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_iir_lattice_init_q31(
- arm_iir_lattice_instance_q31 * S,
- uint16_t numStages,
- q31_t * pkCoeffs,
- q31_t * pvCoeffs,
- q31_t * pState,
- uint32_t blockSize);
-
-
- /**
- * @brief Processing function for the Q15 IIR lattice filter.
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_iir_lattice_q15(
- const arm_iir_lattice_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] *S points to an instance of the fixed-point Q15 IIR lattice structure.
- * @param[in] numStages number of stages in the filter.
- * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
- * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
- * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- */
-
- void arm_iir_lattice_init_q15(
- arm_iir_lattice_instance_q15 * S,
- uint16_t numStages,
- q15_t * pkCoeffs,
- q15_t * pvCoeffs,
- q15_t * pState,
- uint32_t blockSize);
-
- /**
- * @brief Instance structure for the floating-point LMS filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- float32_t mu; /**< step size that controls filter coefficient updates. */
- } arm_lms_instance_f32;
-
- /**
- * @brief Processing function for floating-point LMS filter.
- * @param[in] *S points to an instance of the floating-point LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_f32(
- const arm_lms_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for floating-point LMS filter.
- * @param[in] *S points to an instance of the floating-point LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to the coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_init_f32(
- arm_lms_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize);
-
- /**
- * @brief Instance structure for the Q15 LMS filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q15_t mu; /**< step size that controls filter coefficient updates. */
- uint32_t postShift; /**< bit shift applied to coefficients. */
- } arm_lms_instance_q15;
-
-
- /**
- * @brief Initialization function for the Q15 LMS filter.
- * @param[in] *S points to an instance of the Q15 LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to the coefficient buffer.
- * @param[in] *pState points to the state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- */
-
- void arm_lms_init_q15(
- arm_lms_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint32_t postShift);
-
- /**
- * @brief Processing function for Q15 LMS filter.
- * @param[in] *S points to an instance of the Q15 LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_q15(
- const arm_lms_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q31 LMS filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q31_t mu; /**< step size that controls filter coefficient updates. */
- uint32_t postShift; /**< bit shift applied to coefficients. */
-
- } arm_lms_instance_q31;
-
- /**
- * @brief Processing function for Q31 LMS filter.
- * @param[in] *S points to an instance of the Q15 LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_q31(
- const arm_lms_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for Q31 LMS filter.
- * @param[in] *S points to an instance of the Q31 LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- */
-
- void arm_lms_init_q31(
- arm_lms_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint32_t postShift);
-
- /**
- * @brief Instance structure for the floating-point normalized LMS filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- float32_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- float32_t mu; /**< step size that control filter coefficient updates. */
- float32_t energy; /**< saves previous frame energy. */
- float32_t x0; /**< saves previous input sample. */
- } arm_lms_norm_instance_f32;
-
- /**
- * @brief Processing function for floating-point normalized LMS filter.
- * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_norm_f32(
- arm_lms_norm_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pRef,
- float32_t * pOut,
- float32_t * pErr,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for floating-point normalized LMS filter.
- * @param[in] *S points to an instance of the floating-point LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_norm_init_f32(
- arm_lms_norm_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- float32_t mu,
- uint32_t blockSize);
-
-
- /**
- * @brief Instance structure for the Q31 normalized LMS filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- q31_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q31_t mu; /**< step size that controls filter coefficient updates. */
- uint8_t postShift; /**< bit shift applied to coefficients. */
- q31_t *recipTable; /**< points to the reciprocal initial value table. */
- q31_t energy; /**< saves previous frame energy. */
- q31_t x0; /**< saves previous input sample. */
- } arm_lms_norm_instance_q31;
-
- /**
- * @brief Processing function for Q31 normalized LMS filter.
- * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_norm_q31(
- arm_lms_norm_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pRef,
- q31_t * pOut,
- q31_t * pErr,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for Q31 normalized LMS filter.
- * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- */
-
- void arm_lms_norm_init_q31(
- arm_lms_norm_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- q31_t mu,
- uint32_t blockSize,
- uint8_t postShift);
-
- /**
- * @brief Instance structure for the Q15 normalized LMS filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< Number of coefficients in the filter. */
- q15_t *pState; /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
- q15_t mu; /**< step size that controls filter coefficient updates. */
- uint8_t postShift; /**< bit shift applied to coefficients. */
- q15_t *recipTable; /**< Points to the reciprocal initial value table. */
- q15_t energy; /**< saves previous frame energy. */
- q15_t x0; /**< saves previous input sample. */
- } arm_lms_norm_instance_q15;
-
- /**
- * @brief Processing function for Q15 normalized LMS filter.
- * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[in] *pRef points to the block of reference data.
- * @param[out] *pOut points to the block of output data.
- * @param[out] *pErr points to the block of error data.
- * @param[in] blockSize number of samples to process.
- * @return none.
- */
-
- void arm_lms_norm_q15(
- arm_lms_norm_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pRef,
- q15_t * pOut,
- q15_t * pErr,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for Q15 normalized LMS filter.
- * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
- * @param[in] numTaps number of filter coefficients.
- * @param[in] *pCoeffs points to coefficient buffer.
- * @param[in] *pState points to state buffer.
- * @param[in] mu step size that controls filter coefficient updates.
- * @param[in] blockSize number of samples to process.
- * @param[in] postShift bit shift applied to coefficients.
- * @return none.
- */
-
- void arm_lms_norm_init_q15(
- arm_lms_norm_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- q15_t mu,
- uint32_t blockSize,
- uint8_t postShift);
-
- /**
- * @brief Correlation of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- */
-
- void arm_correlate_f32(
- float32_t * pSrcA,
- uint32_t srcALen,
- float32_t * pSrcB,
- uint32_t srcBLen,
- float32_t * pDst);
-
-
- /**
- * @brief Correlation of Q15 sequences
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @return none.
- */
- void arm_correlate_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch);
-
-
- /**
- * @brief Correlation of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- */
-
- void arm_correlate_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
- /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- */
-
- void arm_correlate_fast_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst);
-
-
-
- /**
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @return none.
- */
-
- void arm_correlate_fast_opt_q15(
- q15_t * pSrcA,
- uint32_t srcALen,
- q15_t * pSrcB,
- uint32_t srcBLen,
- q15_t * pDst,
- q15_t * pScratch);
-
- /**
- * @brief Correlation of Q31 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- */
-
- void arm_correlate_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
- /**
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- */
-
- void arm_correlate_fast_q31(
- q31_t * pSrcA,
- uint32_t srcALen,
- q31_t * pSrcB,
- uint32_t srcBLen,
- q31_t * pDst);
-
-
-
- /**
- * @brief Correlation of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @param[in] *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- * @param[in] *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
- * @return none.
- */
-
- void arm_correlate_opt_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst,
- q15_t * pScratch1,
- q15_t * pScratch2);
-
-
- /**
- * @brief Correlation of Q7 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the block of output data Length 2 * max(srcALen, srcBLen) - 1.
- * @return none.
- */
-
- void arm_correlate_q7(
- q7_t * pSrcA,
- uint32_t srcALen,
- q7_t * pSrcB,
- uint32_t srcBLen,
- q7_t * pDst);
-
-
- /**
- * @brief Instance structure for the floating-point sparse FIR filter.
- */
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- float32_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_f32;
-
- /**
- * @brief Instance structure for the Q31 sparse FIR filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q31_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_q31;
-
- /**
- * @brief Instance structure for the Q15 sparse FIR filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q15_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_q15;
-
- /**
- * @brief Instance structure for the Q7 sparse FIR filter.
- */
-
- typedef struct
- {
- uint16_t numTaps; /**< number of coefficients in the filter. */
- uint16_t stateIndex; /**< state buffer index. Points to the oldest sample in the state buffer. */
- q7_t *pState; /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
- q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
- uint16_t maxDelay; /**< maximum offset specified by the pTapDelay array. */
- int32_t *pTapDelay; /**< points to the array of delay values. The array is of length numTaps. */
- } arm_fir_sparse_instance_q7;
-
- /**
- * @brief Processing function for the floating-point sparse FIR filter.
- * @param[in] *S points to an instance of the floating-point sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_sparse_f32(
- arm_fir_sparse_instance_f32 * S,
- float32_t * pSrc,
- float32_t * pDst,
- float32_t * pScratchIn,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the floating-point sparse FIR filter.
- * @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- */
-
- void arm_fir_sparse_init_f32(
- arm_fir_sparse_instance_f32 * S,
- uint16_t numTaps,
- float32_t * pCoeffs,
- float32_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q31 sparse FIR filter.
- * @param[in] *S points to an instance of the Q31 sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_sparse_q31(
- arm_fir_sparse_instance_q31 * S,
- q31_t * pSrc,
- q31_t * pDst,
- q31_t * pScratchIn,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q31 sparse FIR filter.
- * @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- */
-
- void arm_fir_sparse_init_q31(
- arm_fir_sparse_instance_q31 * S,
- uint16_t numTaps,
- q31_t * pCoeffs,
- q31_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q15 sparse FIR filter.
- * @param[in] *S points to an instance of the Q15 sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] *pScratchOut points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_sparse_q15(
- arm_fir_sparse_instance_q15 * S,
- q15_t * pSrc,
- q15_t * pDst,
- q15_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize);
-
-
- /**
- * @brief Initialization function for the Q15 sparse FIR filter.
- * @param[in,out] *S points to an instance of the Q15 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- */
-
- void arm_fir_sparse_init_q15(
- arm_fir_sparse_instance_q15 * S,
- uint16_t numTaps,
- q15_t * pCoeffs,
- q15_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
- /**
- * @brief Processing function for the Q7 sparse FIR filter.
- * @param[in] *S points to an instance of the Q7 sparse FIR structure.
- * @param[in] *pSrc points to the block of input data.
- * @param[out] *pDst points to the block of output data
- * @param[in] *pScratchIn points to a temporary buffer of size blockSize.
- * @param[in] *pScratchOut points to a temporary buffer of size blockSize.
- * @param[in] blockSize number of input samples to process per call.
- * @return none.
- */
-
- void arm_fir_sparse_q7(
- arm_fir_sparse_instance_q7 * S,
- q7_t * pSrc,
- q7_t * pDst,
- q7_t * pScratchIn,
- q31_t * pScratchOut,
- uint32_t blockSize);
-
- /**
- * @brief Initialization function for the Q7 sparse FIR filter.
- * @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
- * @param[in] numTaps number of nonzero coefficients in the filter.
- * @param[in] *pCoeffs points to the array of filter coefficients.
- * @param[in] *pState points to the state buffer.
- * @param[in] *pTapDelay points to the array of offset times.
- * @param[in] maxDelay maximum offset time supported.
- * @param[in] blockSize number of samples that will be processed per block.
- * @return none
- */
-
- void arm_fir_sparse_init_q7(
- arm_fir_sparse_instance_q7 * S,
- uint16_t numTaps,
- q7_t * pCoeffs,
- q7_t * pState,
- int32_t * pTapDelay,
- uint16_t maxDelay,
- uint32_t blockSize);
-
-
- /*
- * @brief Floating-point sin_cos function.
- * @param[in] theta input value in degrees
- * @param[out] *pSinVal points to the processed sine output.
- * @param[out] *pCosVal points to the processed cos output.
- * @return none.
- */
-
- void arm_sin_cos_f32(
- float32_t theta,
- float32_t * pSinVal,
- float32_t * pCcosVal);
-
- /*
- * @brief Q31 sin_cos function.
- * @param[in] theta scaled input value in degrees
- * @param[out] *pSinVal points to the processed sine output.
- * @param[out] *pCosVal points to the processed cosine output.
- * @return none.
- */
-
- void arm_sin_cos_q31(
- q31_t theta,
- q31_t * pSinVal,
- q31_t * pCosVal);
-
-
- /**
- * @brief Floating-point complex conjugate.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- */
-
- void arm_cmplx_conj_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q31 complex conjugate.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- */
-
- void arm_cmplx_conj_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q15 complex conjugate.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- */
-
- void arm_cmplx_conj_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
-
-
-
- /**
- * @brief Floating-point complex magnitude squared
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- */
-
- void arm_cmplx_mag_squared_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q31 complex magnitude squared
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- */
-
- void arm_cmplx_mag_squared_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q15 complex magnitude squared
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- */
-
- void arm_cmplx_mag_squared_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup PID PID Motor Control
- *
- * A Proportional Integral Derivative (PID) controller is a generic feedback control
- * loop mechanism widely used in industrial control systems.
- * A PID controller is the most commonly used type of feedback controller.
- *
- * This set of functions implements (PID) controllers
- * for Q15, Q31, and floating-point data types. The functions operate on a single sample
- * of data and each call to the function returns a single processed value.
- * <code>S</code> points to an instance of the PID control data structure. <code>in</code>
- * is the input sample value. The functions return the output value.
- *
- * \par Algorithm:
- * <pre>
- * y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
- * A0 = Kp + Ki + Kd
- * A1 = (-Kp ) - (2 * Kd )
- * A2 = Kd </pre>
- *
- * \par
- * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
- *
- * \par
- * \image html PID.gif "Proportional Integral Derivative Controller"
- *
- * \par
- * The PID controller calculates an "error" value as the difference between
- * the measured output and the reference input.
- * The controller attempts to minimize the error by adjusting the process control inputs.
- * The proportional value determines the reaction to the current error,
- * the integral value determines the reaction based on the sum of recent errors,
- * and the derivative value determines the reaction based on the rate at which the error has been changing.
- *
- * \par Instance Structure
- * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
- * A separate instance structure must be defined for each PID Controller.
- * There are separate instance structure declarations for each of the 3 supported data types.
- *
- * \par Reset Functions
- * There is also an associated reset function for each data type which clears the state array.
- *
- * \par Initialization Functions
- * There is also an associated initialization function for each data type.
- * The initialization function performs the following operations:
- * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
- * - Zeros out the values in the state buffer.
- *
- * \par
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
- *
- * \par Fixed-Point Behavior
- * Care must be taken when using the fixed-point versions of the PID Controller functions.
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup PID
- * @{
- */
-
- /**
- * @brief Process function for the floating-point PID Control.
- * @param[in,out] *S is an instance of the floating-point PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- */
-
-
- __STATIC_INLINE float32_t arm_pid_f32(
- arm_pid_instance_f32 * S,
- float32_t in)
- {
- float32_t out;
-
- /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */
- out = (S->A0 * in) +
- (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
-
- /* Update state */
- S->state[1] = S->state[0];
- S->state[0] = in;
- S->state[2] = out;
-
- /* return to application */
- return (out);
-
- }
-
- /**
- * @brief Process function for the Q31 PID Control.
- * @param[in,out] *S points to an instance of the Q31 PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 64-bit accumulator.
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
- * Thus, if the accumulator result overflows it wraps around rather than clip.
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- */
-
- __STATIC_INLINE q31_t arm_pid_q31(
- arm_pid_instance_q31 * S,
- q31_t in)
- {
- q63_t acc;
- q31_t out;
-
- /* acc = A0 * x[n] */
- acc = (q63_t) S->A0 * in;
-
- /* acc += A1 * x[n-1] */
- acc += (q63_t) S->A1 * S->state[0];
-
- /* acc += A2 * x[n-2] */
- acc += (q63_t) S->A2 * S->state[1];
-
- /* convert output to 1.31 format to add y[n-1] */
- out = (q31_t) (acc >> 31u);
-
- /* out += y[n-1] */
- out += S->state[2];
-
- /* Update state */
- S->state[1] = S->state[0];
- S->state[0] = in;
- S->state[2] = out;
-
- /* return to application */
- return (out);
-
- }
-
- /**
- * @brief Process function for the Q15 PID Control.
- * @param[in,out] *S points to an instance of the Q15 PID Control structure
- * @param[in] in input sample to process
- * @return out processed output sample.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using a 64-bit internal accumulator.
- * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.
- */
-
- __STATIC_INLINE q15_t arm_pid_q15(
- arm_pid_instance_q15 * S,
- q15_t in)
- {
- q63_t acc;
- q15_t out;
-
- /* Implementation of PID controller */
-
-#ifdef ARM_MATH_CM0
-
- /* acc = A0 * x[n] */
- acc = ((q31_t) S->A0) * in;
-
-#else
-
- /* acc = A0 * x[n] */
- acc = (q31_t) __SMUAD(S->A0, in);
-
-#endif
-
-#ifdef ARM_MATH_CM0
-
- /* acc += A1 * x[n-1] + A2 * x[n-2] */
- acc += (q31_t) S->A1 * S->state[0];
- acc += (q31_t) S->A2 * S->state[1];
-
-#else
-
- /* acc += A1 * x[n-1] + A2 * x[n-2] */
- acc = __SMLALD(S->A1, (q31_t) __SIMD32(S->state), acc);
-
-#endif
-
- /* acc += y[n-1] */
- acc += (q31_t) S->state[2] << 15;
-
- /* saturate the output */
- out = (q15_t) (__SSAT((acc >> 15), 16));
-
- /* Update state */
- S->state[1] = S->state[0];
- S->state[0] = in;
- S->state[2] = out;
-
- /* return to application */
- return (out);
-
- }
-
- /**
- * @} end of PID group
- */
-
-
- /**
- * @brief Floating-point matrix inverse.
- * @param[in] *src points to the instance of the input floating-point matrix structure.
- * @param[out] *dst points to the instance of the output floating-point matrix structure.
- * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
- * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
- */
-
- arm_status arm_mat_inverse_f32(
- const arm_matrix_instance_f32 * src,
- arm_matrix_instance_f32 * dst);
-
-
-
- /**
- * @ingroup groupController
- */
-
-
- /**
- * @defgroup clarke Vector Clarke Transform
- * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
- * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
- * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
- * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
- * \image html clarke.gif Stator current space vector and its components in (a,b).
- * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
- * can be calculated using only <code>Ia</code> and <code>Ib</code>.
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html clarkeFormula.gif
- * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
- * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Clarke transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup clarke
- * @{
- */
-
- /**
- *
- * @brief Floating-point Clarke transform
- * @param[in] Ia input three-phase coordinate <code>a</code>
- * @param[in] Ib input three-phase coordinate <code>b</code>
- * @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
- * @return none.
- */
-
- __STATIC_INLINE void arm_clarke_f32(
- float32_t Ia,
- float32_t Ib,
- float32_t * pIalpha,
- float32_t * pIbeta)
- {
- /* Calculate pIalpha using the equation, pIalpha = Ia */
- *pIalpha = Ia;
-
- /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
- *pIbeta =
- ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
-
- }
-
- /**
- * @brief Clarke transform for Q31 version
- * @param[in] Ia input three-phase coordinate <code>a</code>
- * @param[in] Ib input three-phase coordinate <code>b</code>
- * @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition, hence there is no risk of overflow.
- */
-
- __STATIC_INLINE void arm_clarke_q31(
- q31_t Ia,
- q31_t Ib,
- q31_t * pIalpha,
- q31_t * pIbeta)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
-
- /* Calculating pIalpha from Ia by equation pIalpha = Ia */
- *pIalpha = Ia;
-
- /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
- product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
-
- /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
- product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
-
- /* pIbeta is calculated by adding the intermediate products */
- *pIbeta = __QADD(product1, product2);
- }
-
- /**
- * @} end of clarke group
- */
-
- /**
- * @brief Converts the elements of the Q7 vector to Q31 vector.
- * @param[in] *pSrc input pointer
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_q7_to_q31(
- q7_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup inv_clarke Vector Inverse Clarke Transform
- * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html clarkeInvFormula.gif
- * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
- * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Clarke transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup inv_clarke
- * @{
- */
-
- /**
- * @brief Floating-point Inverse Clarke transform
- * @param[in] Ialpha input two-phase orthogonal vector axis alpha
- * @param[in] Ibeta input two-phase orthogonal vector axis beta
- * @param[out] *pIa points to output three-phase coordinate <code>a</code>
- * @param[out] *pIb points to output three-phase coordinate <code>b</code>
- * @return none.
- */
-
-
- __STATIC_INLINE void arm_inv_clarke_f32(
- float32_t Ialpha,
- float32_t Ibeta,
- float32_t * pIa,
- float32_t * pIb)
- {
- /* Calculating pIa from Ialpha by equation pIa = Ialpha */
- *pIa = Ialpha;
-
- /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
- *pIb = -0.5 * Ialpha + (float32_t) 0.8660254039 *Ibeta;
-
- }
-
- /**
- * @brief Inverse Clarke transform for Q31 version
- * @param[in] Ialpha input two-phase orthogonal vector axis alpha
- * @param[in] Ibeta input two-phase orthogonal vector axis beta
- * @param[out] *pIa points to output three-phase coordinate <code>a</code>
- * @param[out] *pIb points to output three-phase coordinate <code>b</code>
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the subtraction, hence there is no risk of overflow.
- */
-
- __STATIC_INLINE void arm_inv_clarke_q31(
- q31_t Ialpha,
- q31_t Ibeta,
- q31_t * pIa,
- q31_t * pIb)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
-
- /* Calculating pIa from Ialpha by equation pIa = Ialpha */
- *pIa = Ialpha;
-
- /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
- product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
-
- /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
- product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
-
- /* pIb is calculated by subtracting the products */
- *pIb = __QSUB(product2, product1);
-
- }
-
- /**
- * @} end of inv_clarke group
- */
-
- /**
- * @brief Converts the elements of the Q7 vector to Q15 vector.
- * @param[in] *pSrc input pointer
- * @param[out] *pDst output pointer
- * @param[in] blockSize number of samples to process
- * @return none.
- */
- void arm_q7_to_q15(
- q7_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup park Vector Park Transform
- *
- * Forward Park transform converts the input two-coordinate vector to flux and torque components.
- * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
- * from the stationary to the moving reference frame and control the spatial relationship between
- * the stator vector current and rotor flux vector.
- * If we consider the d axis aligned with the rotor flux, the diagram below shows the
- * current vector and the relationship from the two reference frames:
- * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html parkFormula.gif
- * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
- * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
- * cosine and sine values of theta (rotor flux position).
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Park transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup park
- * @{
- */
-
- /**
- * @brief Floating-point Park transform
- * @param[in] Ialpha input two-phase vector coordinate alpha
- * @param[in] Ibeta input two-phase vector coordinate beta
- * @param[out] *pId points to output rotor reference frame d
- * @param[out] *pIq points to output rotor reference frame q
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- * @return none.
- *
- * The function implements the forward Park transform.
- *
- */
-
- __STATIC_INLINE void arm_park_f32(
- float32_t Ialpha,
- float32_t Ibeta,
- float32_t * pId,
- float32_t * pIq,
- float32_t sinVal,
- float32_t cosVal)
- {
- /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
- *pId = Ialpha * cosVal + Ibeta * sinVal;
-
- /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
- *pIq = -Ialpha * sinVal + Ibeta * cosVal;
-
- }
-
- /**
- * @brief Park transform for Q31 version
- * @param[in] Ialpha input two-phase vector coordinate alpha
- * @param[in] Ibeta input two-phase vector coordinate beta
- * @param[out] *pId points to output rotor reference frame d
- * @param[out] *pIq points to output rotor reference frame q
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition and subtraction, hence there is no risk of overflow.
- */
-
-
- __STATIC_INLINE void arm_park_q31(
- q31_t Ialpha,
- q31_t Ibeta,
- q31_t * pId,
- q31_t * pIq,
- q31_t sinVal,
- q31_t cosVal)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
- q31_t product3, product4; /* Temporary variables used to store intermediate results */
-
- /* Intermediate product is calculated by (Ialpha * cosVal) */
- product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
-
- /* Intermediate product is calculated by (Ibeta * sinVal) */
- product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
-
-
- /* Intermediate product is calculated by (Ialpha * sinVal) */
- product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
-
- /* Intermediate product is calculated by (Ibeta * cosVal) */
- product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
-
- /* Calculate pId by adding the two intermediate products 1 and 2 */
- *pId = __QADD(product1, product2);
-
- /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
- *pIq = __QSUB(product4, product3);
- }
-
- /**
- * @} end of park group
- */
-
- /**
- * @brief Converts the elements of the Q7 vector to floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q7_to_float(
- q7_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @ingroup groupController
- */
-
- /**
- * @defgroup inv_park Vector Inverse Park transform
- * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
- *
- * The function operates on a single sample of data and each call to the function returns the processed output.
- * The library provides separate functions for Q31 and floating-point data types.
- * \par Algorithm
- * \image html parkInvFormula.gif
- * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
- * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
- * cosine and sine values of theta (rotor flux position).
- * \par Fixed-Point Behavior
- * Care must be taken when using the Q31 version of the Park transform.
- * In particular, the overflow and saturation behavior of the accumulator used must be considered.
- * Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
- * @addtogroup inv_park
- * @{
- */
-
- /**
- * @brief Floating-point Inverse Park transform
- * @param[in] Id input coordinate of rotor reference frame d
- * @param[in] Iq input coordinate of rotor reference frame q
- * @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- * @return none.
- */
-
- __STATIC_INLINE void arm_inv_park_f32(
- float32_t Id,
- float32_t Iq,
- float32_t * pIalpha,
- float32_t * pIbeta,
- float32_t sinVal,
- float32_t cosVal)
- {
- /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
- *pIalpha = Id * cosVal - Iq * sinVal;
-
- /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
- *pIbeta = Id * sinVal + Iq * cosVal;
-
- }
-
-
- /**
- * @brief Inverse Park transform for Q31 version
- * @param[in] Id input coordinate of rotor reference frame d
- * @param[in] Iq input coordinate of rotor reference frame q
- * @param[out] *pIalpha points to output two-phase orthogonal vector axis alpha
- * @param[out] *pIbeta points to output two-phase orthogonal vector axis beta
- * @param[in] sinVal sine value of rotation angle theta
- * @param[in] cosVal cosine value of rotation angle theta
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function is implemented using an internal 32-bit accumulator.
- * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
- * There is saturation on the addition, hence there is no risk of overflow.
- */
-
-
- __STATIC_INLINE void arm_inv_park_q31(
- q31_t Id,
- q31_t Iq,
- q31_t * pIalpha,
- q31_t * pIbeta,
- q31_t sinVal,
- q31_t cosVal)
- {
- q31_t product1, product2; /* Temporary variables used to store intermediate results */
- q31_t product3, product4; /* Temporary variables used to store intermediate results */
-
- /* Intermediate product is calculated by (Id * cosVal) */
- product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
-
- /* Intermediate product is calculated by (Iq * sinVal) */
- product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
-
-
- /* Intermediate product is calculated by (Id * sinVal) */
- product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
-
- /* Intermediate product is calculated by (Iq * cosVal) */
- product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
-
- /* Calculate pIalpha by using the two intermediate products 1 and 2 */
- *pIalpha = __QSUB(product1, product2);
-
- /* Calculate pIbeta by using the two intermediate products 3 and 4 */
- *pIbeta = __QADD(product4, product3);
-
- }
-
- /**
- * @} end of Inverse park group
- */
-
-
- /**
- * @brief Converts the elements of the Q31 vector to floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q31_to_float(
- q31_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
- /**
- * @ingroup groupInterpolation
- */
-
- /**
- * @defgroup LinearInterpolate Linear Interpolation
- *
- * Linear interpolation is a method of curve fitting using linear polynomials.
- * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
- *
- * \par
- * \image html LinearInterp.gif "Linear interpolation"
- *
- * \par
- * A Linear Interpolate function calculates an output value(y), for the input(x)
- * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
- *
- * \par Algorithm:
- * <pre>
- * y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
- * where x0, x1 are nearest values of input x
- * y0, y1 are nearest values to output y
- * </pre>
- *
- * \par
- * This set of functions implements Linear interpolation process
- * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single
- * sample of data and each call to the function returns a single processed value.
- * <code>S</code> points to an instance of the Linear Interpolate function data structure.
- * <code>x</code> is the input sample value. The functions returns the output value.
- *
- * \par
- * if x is outside of the table boundary, Linear interpolation returns first value of the table
- * if x is below input range and returns last value of table if x is above range.
- */
-
- /**
- * @addtogroup LinearInterpolate
- * @{
- */
-
- /**
- * @brief Process function for the floating-point Linear Interpolation Function.
- * @param[in,out] *S is an instance of the floating-point Linear Interpolation structure
- * @param[in] x input sample to process
- * @return y processed output sample.
- *
- */
-
- __STATIC_INLINE float32_t arm_linear_interp_f32(
- arm_linear_interp_instance_f32 * S,
- float32_t x)
- {
-
- float32_t y;
- float32_t x0, x1; /* Nearest input values */
- float32_t y0, y1; /* Nearest output values */
- float32_t xSpacing = S->xSpacing; /* spacing between input values */
- int32_t i; /* Index variable */
- float32_t *pYData = S->pYData; /* pointer to output table */
-
- /* Calculation of index */
- i = (x - S->x1) / xSpacing;
-
- if(i < 0)
- {
- /* Iniatilize output for below specified range as least output value of table */
- y = pYData[0];
- }
- /* CHIBIOS FIX BEGIN */
- else if(i >= (int32_t)S->nValues)
- /* CHIBIOS FIX END */
- {
- /* Iniatilize output for above specified range as last output value of table */
- y = pYData[S->nValues - 1];
- }
- else
- {
- /* Calculation of nearest input values */
- x0 = S->x1 + i * xSpacing;
- x1 = S->x1 + (i + 1) * xSpacing;
-
- /* Read of nearest output values */
- y0 = pYData[i];
- y1 = pYData[i + 1];
-
- /* Calculation of output */
- y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
-
- }
-
- /* returns output value */
- return (y);
- }
-
- /**
- *
- * @brief Process function for the Q31 Linear Interpolation Function.
- * @param[in] *pYData pointer to Q31 Linear Interpolation table
- * @param[in] x input sample to process
- * @param[in] nValues number of table values
- * @return y processed output sample.
- *
- * \par
- * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
- * This function can support maximum of table size 2^12.
- *
- */
-
-
- __STATIC_INLINE q31_t arm_linear_interp_q31(
- q31_t * pYData,
- q31_t x,
- uint32_t nValues)
- {
- q31_t y; /* output */
- q31_t y0, y1; /* Nearest output values */
- q31_t fract; /* fractional part */
- int32_t index; /* Index to read nearest output values */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- index = ((x & 0xFFF00000) >> 20);
- /* CHIBIOS FIX BEGIN */
- if(index >= ((int32_t)nValues - 1))
- /* CHIBIOS FIX END */
- {
- return (pYData[nValues - 1]);
- }
- else if(index < 0)
- {
- return (pYData[0]);
- }
- else
- {
-
- /* 20 bits for the fractional part */
- /* shift left by 11 to keep fract in 1.31 format */
- fract = (x & 0x000FFFFF) << 11;
-
- /* Read two nearest output values from the index in 1.31(q31) format */
- y0 = pYData[index];
- y1 = pYData[index + 1u];
-
- /* Calculation of y0 * (1-fract) and y is in 2.30 format */
- y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
-
- /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
- y += ((q31_t) (((q63_t) y1 * fract) >> 32));
-
- /* Convert y to 1.31 format */
- return (y << 1u);
-
- }
-
- }
-
- /**
- *
- * @brief Process function for the Q15 Linear Interpolation Function.
- * @param[in] *pYData pointer to Q15 Linear Interpolation table
- * @param[in] x input sample to process
- * @param[in] nValues number of table values
- * @return y processed output sample.
- *
- * \par
- * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
- * This function can support maximum of table size 2^12.
- *
- */
-
-
- __STATIC_INLINE q15_t arm_linear_interp_q15(
- q15_t * pYData,
- q31_t x,
- uint32_t nValues)
- {
- q63_t y; /* output */
- q15_t y0, y1; /* Nearest output values */
- q31_t fract; /* fractional part */
- int32_t index; /* Index to read nearest output values */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- index = ((x & 0xFFF00000) >> 20u);
-
- /* CHIBIOS FIX BEGIN */
- if(index >= ((int32_t)nValues - 1))
- /* CHIBIOS FIX END */
- {
- return (pYData[nValues - 1]);
- }
- else if(index < 0)
- {
- return (pYData[0]);
- }
- else
- {
- /* 20 bits for the fractional part */
- /* fract is in 12.20 format */
- fract = (x & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- y0 = pYData[index];
- y1 = pYData[index + 1u];
-
- /* Calculation of y0 * (1-fract) and y is in 13.35 format */
- y = ((q63_t) y0 * (0xFFFFF - fract));
-
- /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
- y += ((q63_t) y1 * (fract));
-
- /* convert y to 1.15 format */
- return (y >> 20);
- }
-
-
- }
-
- /**
- *
- * @brief Process function for the Q7 Linear Interpolation Function.
- * @param[in] *pYData pointer to Q7 Linear Interpolation table
- * @param[in] x input sample to process
- * @param[in] nValues number of table values
- * @return y processed output sample.
- *
- * \par
- * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
- * This function can support maximum of table size 2^12.
- */
-
-
- __STATIC_INLINE q7_t arm_linear_interp_q7(
- q7_t * pYData,
- q31_t x,
- uint32_t nValues)
- {
- q31_t y; /* output */
- q7_t y0, y1; /* Nearest output values */
- q31_t fract; /* fractional part */
- int32_t index; /* Index to read nearest output values */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- index = ((x & 0xFFF00000) >> 20u);
-
- /* CHIBIOS FIX BEGIN */
- if(index >= ((int32_t)nValues - 1))
- /* CHIBIOS FIX END */
- {
- return (pYData[nValues - 1]);
- }
- else if(index < 0)
- {
- return (pYData[0]);
- }
- else
- {
-
- /* 20 bits for the fractional part */
- /* fract is in 12.20 format */
- fract = (x & 0x000FFFFF);
-
- /* Read two nearest output values from the index and are in 1.7(q7) format */
- y0 = pYData[index];
- y1 = pYData[index + 1u];
-
- /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
- y = ((y0 * (0xFFFFF - fract)));
-
- /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
- y += (y1 * fract);
-
- /* convert y to 1.7(q7) format */
- return (y >> 20u);
-
- }
-
- }
- /**
- * @} end of LinearInterpolate group
- */
-
- /**
- * @brief Fast approximation to the trigonometric sine function for floating-point data.
- * @param[in] x input value in radians.
- * @return sin(x).
- */
-
- float32_t arm_sin_f32(
- float32_t x);
-
- /**
- * @brief Fast approximation to the trigonometric sine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return sin(x).
- */
-
- q31_t arm_sin_q31(
- q31_t x);
-
- /**
- * @brief Fast approximation to the trigonometric sine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return sin(x).
- */
-
- q15_t arm_sin_q15(
- q15_t x);
-
- /**
- * @brief Fast approximation to the trigonometric cosine function for floating-point data.
- * @param[in] x input value in radians.
- * @return cos(x).
- */
-
- float32_t arm_cos_f32(
- float32_t x);
-
- /**
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return cos(x).
- */
-
- q31_t arm_cos_q31(
- q31_t x);
-
- /**
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.
- * @param[in] x Scaled input value in radians.
- * @return cos(x).
- */
-
- q15_t arm_cos_q15(
- q15_t x);
-
-
- /**
- * @ingroup groupFastMath
- */
-
-
- /**
- * @defgroup SQRT Square Root
- *
- * Computes the square root of a number.
- * There are separate functions for Q15, Q31, and floating-point data types.
- * The square root function is computed using the Newton-Raphson algorithm.
- * This is an iterative algorithm of the form:
- * <pre>
- * x1 = x0 - f(x0)/f'(x0)
- * </pre>
- * where <code>x1</code> is the current estimate,
- * <code>x0</code> is the previous estimate and
- * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
- * For the square root function, the algorithm reduces to:
- * <pre>
- * x0 = in/2 [initial guess]
- * x1 = 1/2 * ( x0 + in / x0) [each iteration]
- * </pre>
- */
-
-
- /**
- * @addtogroup SQRT
- * @{
- */
-
- /**
- * @brief Floating-point square root function.
- * @param[in] in input value.
- * @param[out] *pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
-
- __STATIC_INLINE arm_status arm_sqrt_f32(
- float32_t in,
- float32_t * pOut)
- {
- if(in > 0)
- {
-
-// #if __FPU_USED
- #if (__FPU_USED == 1) && defined ( __CC_ARM )
- *pOut = __sqrtf(in);
- #elif (__FPU_USED == 1) && defined ( __TMS_740 )
- *pOut = __builtin_sqrtf(in);
- #else
- *pOut = sqrtf(in);
- #endif
-
- return (ARM_MATH_SUCCESS);
- }
- else
- {
- *pOut = 0.0f;
- return (ARM_MATH_ARGUMENT_ERROR);
- }
-
- }
-
-
- /**
- * @brief Q31 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
- * @param[out] *pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- arm_status arm_sqrt_q31(
- q31_t in,
- q31_t * pOut);
-
- /**
- * @brief Q15 square root function.
- * @param[in] in input value. The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
- * @param[out] *pOut square root of input value.
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
- * <code>in</code> is negative value and returns zero output for negative values.
- */
- arm_status arm_sqrt_q15(
- q15_t in,
- q15_t * pOut);
-
- /**
- * @} end of SQRT group
- */
-
-
-
-
-
-
- /**
- * @brief floating-point Circular write function.
- */
-
- __STATIC_INLINE void arm_circularWrite_f32(
- int32_t * circBuffer,
- int32_t L,
- uint16_t * writeOffset,
- int32_t bufferInc,
- const int32_t * src,
- int32_t srcInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t wOffset;
-
- /* Copy the value of Index pointer that points
- * to the current location where the input samples to be copied */
- wOffset = *writeOffset;
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while(i > 0u)
- {
- /* copy the input sample to the circular buffer */
- circBuffer[wOffset] = *src;
-
- /* Update the input pointer */
- src += srcInc;
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- wOffset += bufferInc;
- if(wOffset >= L)
- wOffset -= L;
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *writeOffset = wOffset;
- }
-
-
-
- /**
- * @brief floating-point Circular Read function.
- */
- __STATIC_INLINE void arm_circularRead_f32(
- int32_t * circBuffer,
- int32_t L,
- int32_t * readOffset,
- int32_t bufferInc,
- int32_t * dst,
- int32_t * dst_base,
- int32_t dst_length,
- int32_t dstInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t rOffset, dst_end;
-
- /* Copy the value of Index pointer that points
- * to the current location from where the input samples to be read */
- rOffset = *readOffset;
- dst_end = (int32_t) (dst_base + dst_length);
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while(i > 0u)
- {
- /* copy the sample from the circular buffer to the destination buffer */
- *dst = circBuffer[rOffset];
-
- /* Update the input pointer */
- dst += dstInc;
-
- if(dst == (int32_t *) dst_end)
- {
- dst = dst_base;
- }
-
- /* Circularly update rOffset. Watch out for positive and negative value */
- rOffset += bufferInc;
-
- if(rOffset >= L)
- {
- rOffset -= L;
- }
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *readOffset = rOffset;
- }
-
- /**
- * @brief Q15 Circular write function.
- */
-
- __STATIC_INLINE void arm_circularWrite_q15(
- q15_t * circBuffer,
- int32_t L,
- uint16_t * writeOffset,
- int32_t bufferInc,
- const q15_t * src,
- int32_t srcInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t wOffset;
-
- /* Copy the value of Index pointer that points
- * to the current location where the input samples to be copied */
- wOffset = *writeOffset;
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while(i > 0u)
- {
- /* copy the input sample to the circular buffer */
- circBuffer[wOffset] = *src;
-
- /* Update the input pointer */
- src += srcInc;
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- wOffset += bufferInc;
- if(wOffset >= L)
- wOffset -= L;
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *writeOffset = wOffset;
- }
-
-
-
- /**
- * @brief Q15 Circular Read function.
- */
- __STATIC_INLINE void arm_circularRead_q15(
- q15_t * circBuffer,
- int32_t L,
- int32_t * readOffset,
- int32_t bufferInc,
- q15_t * dst,
- q15_t * dst_base,
- int32_t dst_length,
- int32_t dstInc,
- uint32_t blockSize)
- {
- uint32_t i = 0;
- int32_t rOffset, dst_end;
-
- /* Copy the value of Index pointer that points
- * to the current location from where the input samples to be read */
- rOffset = *readOffset;
-
- dst_end = (int32_t) (dst_base + dst_length);
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while(i > 0u)
- {
- /* copy the sample from the circular buffer to the destination buffer */
- *dst = circBuffer[rOffset];
-
- /* Update the input pointer */
- dst += dstInc;
-
- if(dst == (q15_t *) dst_end)
- {
- dst = dst_base;
- }
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- rOffset += bufferInc;
-
- if(rOffset >= L)
- {
- rOffset -= L;
- }
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *readOffset = rOffset;
- }
-
-
- /**
- * @brief Q7 Circular write function.
- */
-
- __STATIC_INLINE void arm_circularWrite_q7(
- q7_t * circBuffer,
- int32_t L,
- uint16_t * writeOffset,
- int32_t bufferInc,
- const q7_t * src,
- int32_t srcInc,
- uint32_t blockSize)
- {
- uint32_t i = 0u;
- int32_t wOffset;
-
- /* Copy the value of Index pointer that points
- * to the current location where the input samples to be copied */
- wOffset = *writeOffset;
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while(i > 0u)
- {
- /* copy the input sample to the circular buffer */
- circBuffer[wOffset] = *src;
-
- /* Update the input pointer */
- src += srcInc;
-
- /* Circularly update wOffset. Watch out for positive and negative value */
- wOffset += bufferInc;
- if(wOffset >= L)
- wOffset -= L;
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *writeOffset = wOffset;
- }
-
-
-
- /**
- * @brief Q7 Circular Read function.
- */
- __STATIC_INLINE void arm_circularRead_q7(
- q7_t * circBuffer,
- int32_t L,
- int32_t * readOffset,
- int32_t bufferInc,
- q7_t * dst,
- q7_t * dst_base,
- int32_t dst_length,
- int32_t dstInc,
- uint32_t blockSize)
- {
- uint32_t i = 0;
- int32_t rOffset, dst_end;
-
- /* Copy the value of Index pointer that points
- * to the current location from where the input samples to be read */
- rOffset = *readOffset;
-
- dst_end = (int32_t) (dst_base + dst_length);
-
- /* Loop over the blockSize */
- i = blockSize;
-
- while(i > 0u)
- {
- /* copy the sample from the circular buffer to the destination buffer */
- *dst = circBuffer[rOffset];
-
- /* Update the input pointer */
- dst += dstInc;
-
- if(dst == (q7_t *) dst_end)
- {
- dst = dst_base;
- }
-
- /* Circularly update rOffset. Watch out for positive and negative value */
- rOffset += bufferInc;
-
- if(rOffset >= L)
- {
- rOffset -= L;
- }
-
- /* Decrement the loop counter */
- i--;
- }
-
- /* Update the index pointer */
- *readOffset = rOffset;
- }
-
-
- /**
- * @brief Sum of the squares of the elements of a Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_power_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
-
- /**
- * @brief Sum of the squares of the elements of a floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_power_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
- /**
- * @brief Sum of the squares of the elements of a Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_power_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
-
- /**
- * @brief Sum of the squares of the elements of a Q7 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_power_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
- /**
- * @brief Mean value of a Q7 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_mean_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult);
-
- /**
- * @brief Mean value of a Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
- void arm_mean_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
- /**
- * @brief Mean value of a Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
- void arm_mean_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
- /**
- * @brief Mean value of a floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
- void arm_mean_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
- /**
- * @brief Variance of the elements of a floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_var_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
- /**
- * @brief Variance of the elements of a Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_var_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q63_t * pResult);
-
- /**
- * @brief Variance of the elements of a Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_var_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
- /**
- * @brief Root Mean Square of the elements of a floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_rms_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
- /**
- * @brief Root Mean Square of the elements of a Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_rms_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
- /**
- * @brief Root Mean Square of the elements of a Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_rms_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
- /**
- * @brief Standard deviation of the elements of a floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_std_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult);
-
- /**
- * @brief Standard deviation of the elements of a Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_std_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult);
-
- /**
- * @brief Standard deviation of the elements of a Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output value.
- * @return none.
- */
-
- void arm_std_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult);
-
- /**
- * @brief Floating-point complex magnitude
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- */
-
- void arm_cmplx_mag_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q31 complex magnitude
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- */
-
- void arm_cmplx_mag_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q15 complex magnitude
- * @param[in] *pSrc points to the complex input vector
- * @param[out] *pDst points to the real output vector
- * @param[in] numSamples number of complex samples in the input vector
- * @return none.
- */
-
- void arm_cmplx_mag_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q15 complex dot product
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] numSamples number of complex samples in each vector
- * @param[out] *realResult real part of the result returned here
- * @param[out] *imagResult imaginary part of the result returned here
- * @return none.
- */
-
- void arm_cmplx_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t numSamples,
- q31_t * realResult,
- q31_t * imagResult);
-
- /**
- * @brief Q31 complex dot product
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] numSamples number of complex samples in each vector
- * @param[out] *realResult real part of the result returned here
- * @param[out] *imagResult imaginary part of the result returned here
- * @return none.
- */
-
- void arm_cmplx_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t numSamples,
- q63_t * realResult,
- q63_t * imagResult);
-
- /**
- * @brief Floating-point complex dot product
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] numSamples number of complex samples in each vector
- * @param[out] *realResult real part of the result returned here
- * @param[out] *imagResult imaginary part of the result returned here
- * @return none.
- */
-
- void arm_cmplx_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t numSamples,
- float32_t * realResult,
- float32_t * imagResult);
-
- /**
- * @brief Q15 complex-by-real multiplication
- * @param[in] *pSrcCmplx points to the complex input vector
- * @param[in] *pSrcReal points to the real input vector
- * @param[out] *pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- * @return none.
- */
-
- void arm_cmplx_mult_real_q15(
- q15_t * pSrcCmplx,
- q15_t * pSrcReal,
- q15_t * pCmplxDst,
- uint32_t numSamples);
-
- /**
- * @brief Q31 complex-by-real multiplication
- * @param[in] *pSrcCmplx points to the complex input vector
- * @param[in] *pSrcReal points to the real input vector
- * @param[out] *pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- * @return none.
- */
-
- void arm_cmplx_mult_real_q31(
- q31_t * pSrcCmplx,
- q31_t * pSrcReal,
- q31_t * pCmplxDst,
- uint32_t numSamples);
-
- /**
- * @brief Floating-point complex-by-real multiplication
- * @param[in] *pSrcCmplx points to the complex input vector
- * @param[in] *pSrcReal points to the real input vector
- * @param[out] *pCmplxDst points to the complex output vector
- * @param[in] numSamples number of samples in each vector
- * @return none.
- */
-
- void arm_cmplx_mult_real_f32(
- float32_t * pSrcCmplx,
- float32_t * pSrcReal,
- float32_t * pCmplxDst,
- uint32_t numSamples);
-
- /**
- * @brief Minimum value of a Q7 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *result is output pointer
- * @param[in] index is the array index of the minimum value in the input buffer.
- * @return none.
- */
-
- void arm_min_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * result,
- uint32_t * index);
-
- /**
- * @brief Minimum value of a Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output pointer
- * @param[in] *pIndex is the array index of the minimum value in the input buffer.
- * @return none.
- */
-
- void arm_min_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex);
-
- /**
- * @brief Minimum value of a Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output pointer
- * @param[out] *pIndex is the array index of the minimum value in the input buffer.
- * @return none.
- */
- void arm_min_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex);
-
- /**
- * @brief Minimum value of a floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[in] blockSize is the number of samples to process
- * @param[out] *pResult is output pointer
- * @param[out] *pIndex is the array index of the minimum value in the input buffer.
- * @return none.
- */
-
- void arm_min_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a Q7 vector.
- * @param[in] *pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
- */
-
- void arm_max_q7(
- q7_t * pSrc,
- uint32_t blockSize,
- q7_t * pResult,
- uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a Q15 vector.
- * @param[in] *pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
- */
-
- void arm_max_q15(
- q15_t * pSrc,
- uint32_t blockSize,
- q15_t * pResult,
- uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a Q31 vector.
- * @param[in] *pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
- */
-
- void arm_max_q31(
- q31_t * pSrc,
- uint32_t blockSize,
- q31_t * pResult,
- uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a floating-point vector.
- * @param[in] *pSrc points to the input buffer
- * @param[in] blockSize length of the input vector
- * @param[out] *pResult maximum value returned here
- * @param[out] *pIndex index of maximum value returned here
- * @return none.
- */
-
- void arm_max_f32(
- float32_t * pSrc,
- uint32_t blockSize,
- float32_t * pResult,
- uint32_t * pIndex);
-
- /**
- * @brief Q15 complex-by-complex multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- */
-
- void arm_cmplx_mult_cmplx_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Q31 complex-by-complex multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- */
-
- void arm_cmplx_mult_cmplx_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Floating-point complex-by-complex multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] numSamples number of complex samples in each vector
- * @return none.
- */
-
- void arm_cmplx_mult_cmplx_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t numSamples);
-
- /**
- * @brief Converts the elements of the floating-point vector to Q31 vector.
- * @param[in] *pSrc points to the floating-point input vector
- * @param[out] *pDst points to the Q31 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- */
- void arm_float_to_q31(
- float32_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Converts the elements of the floating-point vector to Q15 vector.
- * @param[in] *pSrc points to the floating-point input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none
- */
- void arm_float_to_q15(
- float32_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Converts the elements of the floating-point vector to Q7 vector.
- * @param[in] *pSrc points to the floating-point input vector
- * @param[out] *pDst points to the Q7 output vector
- * @param[in] blockSize length of the input vector
- * @return none
- */
- void arm_float_to_q7(
- float32_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q31 vector to Q15 vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q31_to_q15(
- q31_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Converts the elements of the Q31 vector to Q7 vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q31_to_q7(
- q31_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
- /**
- * @brief Converts the elements of the Q15 vector to floating-point vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q15_to_float(
- q15_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q15 vector to Q31 vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q15_to_q31(
- q15_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @brief Converts the elements of the Q15 vector to Q7 vector.
- * @param[in] *pSrc is input pointer
- * @param[out] *pDst is output pointer
- * @param[in] blockSize is the number of samples to process
- * @return none.
- */
- void arm_q15_to_q7(
- q15_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize);
-
-
- /**
- * @ingroup groupInterpolation
- */
-
- /**
- * @defgroup BilinearInterpolate Bilinear Interpolation
- *
- * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
- * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
- * determines values between the grid points.
- * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
- * Bilinear interpolation is often used in image processing to rescale images.
- * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
- *
- * <b>Algorithm</b>
- * \par
- * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
- * For floating-point, the instance structure is defined as:
- * <pre>
- * typedef struct
- * {
- * uint16_t numRows;
- * uint16_t numCols;
- * float32_t *pData;
- * } arm_bilinear_interp_instance_f32;
- * </pre>
- *
- * \par
- * where <code>numRows</code> specifies the number of rows in the table;
- * <code>numCols</code> specifies the number of columns in the table;
- * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
- * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
- * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
- *
- * \par
- * Let <code>(x, y)</code> specify the desired interpolation point. Then define:
- * <pre>
- * XF = floor(x)
- * YF = floor(y)
- * </pre>
- * \par
- * The interpolated output point is computed as:
- * <pre>
- * f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
- * + f(XF+1, YF) * (x-XF)*(1-(y-YF))
- * + f(XF, YF+1) * (1-(x-XF))*(y-YF)
- * + f(XF+1, YF+1) * (x-XF)*(y-YF)
- * </pre>
- * Note that the coordinates (x, y) contain integer and fractional components.
- * The integer components specify which portion of the table to use while the
- * fractional components control the interpolation processor.
- *
- * \par
- * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
- */
-
- /**
- * @addtogroup BilinearInterpolate
- * @{
- */
-
- /**
- *
- * @brief Floating-point bilinear interpolation.
- * @param[in,out] *S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate.
- * @param[in] Y interpolation coordinate.
- * @return out interpolated value.
- */
-
-
- __STATIC_INLINE float32_t arm_bilinear_interp_f32(
- const arm_bilinear_interp_instance_f32 * S,
- float32_t X,
- float32_t Y)
- {
- float32_t out;
- float32_t f00, f01, f10, f11;
- float32_t *pData = S->pData;
- int32_t xIndex, yIndex, index;
- float32_t xdiff, ydiff;
- float32_t b1, b2, b3, b4;
-
- xIndex = (int32_t) X;
- yIndex = (int32_t) Y;
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0
- || yIndex > (S->numCols - 1))
- {
- return (0);
- }
-
- /* Calculation of index for two nearest points in X-direction */
- index = (xIndex - 1) + (yIndex - 1) * S->numCols;
-
-
- /* Read two nearest points in X-direction */
- f00 = pData[index];
- f01 = pData[index + 1];
-
- /* Calculation of index for two nearest points in Y-direction */
- index = (xIndex - 1) + (yIndex) * S->numCols;
-
-
- /* Read two nearest points in Y-direction */
- f10 = pData[index];
- f11 = pData[index + 1];
-
- /* Calculation of intermediate values */
- b1 = f00;
- b2 = f01 - f00;
- b3 = f10 - f00;
- b4 = f00 - f01 - f10 + f11;
-
- /* Calculation of fractional part in X */
- xdiff = X - xIndex;
-
- /* Calculation of fractional part in Y */
- ydiff = Y - yIndex;
-
- /* Calculation of bi-linear interpolated output */
- out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
-
- /* return to application */
- return (out);
-
- }
-
- /**
- *
- * @brief Q31 bilinear interpolation.
- * @param[in,out] *S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate in 12.20 format.
- * @param[in] Y interpolation coordinate in 12.20 format.
- * @return out interpolated value.
- */
-
- __STATIC_INLINE q31_t arm_bilinear_interp_q31(
- arm_bilinear_interp_instance_q31 * S,
- q31_t X,
- q31_t Y)
- {
- q31_t out; /* Temporary output */
- q31_t acc = 0; /* output */
- q31_t xfract, yfract; /* X, Y fractional parts */
- q31_t x1, x2, y1, y2; /* Nearest output values */
- int32_t rI, cI; /* Row and column indices */
- q31_t *pYData = S->pData; /* pointer to output table values */
- uint32_t nCols = S->numCols; /* num of rows */
-
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- rI = ((X & 0xFFF00000) >> 20u);
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- cI = ((Y & 0xFFF00000) >> 20u);
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
- {
- return (0);
- }
-
- /* 20 bits for the fractional part */
- /* shift left xfract by 11 to keep 1.31 format */
- xfract = (X & 0x000FFFFF) << 11u;
-
- /* Read two nearest output values from the index */
- x1 = pYData[(rI) + nCols * (cI)];
- x2 = pYData[(rI) + nCols * (cI) + 1u];
-
- /* 20 bits for the fractional part */
- /* shift left yfract by 11 to keep 1.31 format */
- yfract = (Y & 0x000FFFFF) << 11u;
-
- /* Read two nearest output values from the index */
- y1 = pYData[(rI) + nCols * (cI + 1)];
- y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
-
- /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
- out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
- acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
-
- /* x2 * (xfract) * (1-yfract) in 3.29(q29) and adding to acc */
- out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
- acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
-
- /* y1 * (1 - xfract) * (yfract) in 3.29(q29) and adding to acc */
- out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
- acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
- /* y2 * (xfract) * (yfract) in 3.29(q29) and adding to acc */
- out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
- acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
- /* Convert acc to 1.31(q31) format */
- return (acc << 2u);
-
- }
-
- /**
- * @brief Q15 bilinear interpolation.
- * @param[in,out] *S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate in 12.20 format.
- * @param[in] Y interpolation coordinate in 12.20 format.
- * @return out interpolated value.
- */
-
- __STATIC_INLINE q15_t arm_bilinear_interp_q15(
- arm_bilinear_interp_instance_q15 * S,
- q31_t X,
- q31_t Y)
- {
- q63_t acc = 0; /* output */
- q31_t out; /* Temporary output */
- q15_t x1, x2, y1, y2; /* Nearest output values */
- q31_t xfract, yfract; /* X, Y fractional parts */
- int32_t rI, cI; /* Row and column indices */
- q15_t *pYData = S->pData; /* pointer to output table values */
- uint32_t nCols = S->numCols; /* num of rows */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- rI = ((X & 0xFFF00000) >> 20);
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- cI = ((Y & 0xFFF00000) >> 20);
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
- {
- return (0);
- }
-
- /* 20 bits for the fractional part */
- /* xfract should be in 12.20 format */
- xfract = (X & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- x1 = pYData[(rI) + nCols * (cI)];
- x2 = pYData[(rI) + nCols * (cI) + 1u];
-
-
- /* 20 bits for the fractional part */
- /* yfract should be in 12.20 format */
- yfract = (Y & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- y1 = pYData[(rI) + nCols * (cI + 1)];
- y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
-
- /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
-
- /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
- /* convert 13.35 to 13.31 by right shifting and out is in 1.31 */
- out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
- acc = ((q63_t) out * (0xFFFFF - yfract));
-
- /* x2 * (xfract) * (1-yfract) in 1.51 and adding to acc */
- out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
- acc += ((q63_t) out * (xfract));
-
- /* y1 * (1 - xfract) * (yfract) in 1.51 and adding to acc */
- out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
- acc += ((q63_t) out * (yfract));
-
- /* y2 * (xfract) * (yfract) in 1.51 and adding to acc */
- out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
- acc += ((q63_t) out * (yfract));
-
- /* acc is in 13.51 format and down shift acc by 36 times */
- /* Convert out to 1.15 format */
- return (acc >> 36);
-
- }
-
- /**
- * @brief Q7 bilinear interpolation.
- * @param[in,out] *S points to an instance of the interpolation structure.
- * @param[in] X interpolation coordinate in 12.20 format.
- * @param[in] Y interpolation coordinate in 12.20 format.
- * @return out interpolated value.
- */
-
- __STATIC_INLINE q7_t arm_bilinear_interp_q7(
- arm_bilinear_interp_instance_q7 * S,
- q31_t X,
- q31_t Y)
- {
- q63_t acc = 0; /* output */
- q31_t out; /* Temporary output */
- q31_t xfract, yfract; /* X, Y fractional parts */
- q7_t x1, x2, y1, y2; /* Nearest output values */
- int32_t rI, cI; /* Row and column indices */
- q7_t *pYData = S->pData; /* pointer to output table values */
- uint32_t nCols = S->numCols; /* num of rows */
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- rI = ((X & 0xFFF00000) >> 20);
-
- /* Input is in 12.20 format */
- /* 12 bits for the table index */
- /* Index value calculation */
- cI = ((Y & 0xFFF00000) >> 20);
-
- /* Care taken for table outside boundary */
- /* Returns zero output when values are outside table boundary */
- if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
- {
- return (0);
- }
-
- /* 20 bits for the fractional part */
- /* xfract should be in 12.20 format */
- xfract = (X & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- x1 = pYData[(rI) + nCols * (cI)];
- x2 = pYData[(rI) + nCols * (cI) + 1u];
-
-
- /* 20 bits for the fractional part */
- /* yfract should be in 12.20 format */
- yfract = (Y & 0x000FFFFF);
-
- /* Read two nearest output values from the index */
- y1 = pYData[(rI) + nCols * (cI + 1)];
- y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
-
- /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
- out = ((x1 * (0xFFFFF - xfract)));
- acc = (((q63_t) out * (0xFFFFF - yfract)));
-
- /* x2 * (xfract) * (1-yfract) in 2.22 and adding to acc */
- out = ((x2 * (0xFFFFF - yfract)));
- acc += (((q63_t) out * (xfract)));
-
- /* y1 * (1 - xfract) * (yfract) in 2.22 and adding to acc */
- out = ((y1 * (0xFFFFF - xfract)));
- acc += (((q63_t) out * (yfract)));
-
- /* y2 * (xfract) * (yfract) in 2.22 and adding to acc */
- out = ((y2 * (yfract)));
- acc += (((q63_t) out * (xfract)));
-
- /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
- return (acc >> 40);
-
- }
-
- /**
- * @} end of BilinearInterpolate group
- */
-
-
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif /* _ARM_MATH_H */
-
-
-/**
- *
- * End of file.
- */
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cm0.h b/os/ports/common/ARMCMx/CMSIS/include/core_cm0.h deleted file mode 100644 index 0d7cfd85e..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cm0.h +++ /dev/null @@ -1,667 +0,0 @@ -/**************************************************************************//**
- * @file core_cm0.h
- * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version V3.01
- * @date 13. March 2012
- *
- * @note
- * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M0
- @{
- */
-
-/* CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB (0x01) /*!< [15:0] CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16) | \
- __CM0_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x00) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
-*/
-#define __FPU_USED 0
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM0_REV
- #define __CM0_REV 0x0000
- #warning "__CM0_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[1]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31];
- __IO uint32_t ICER[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31];
- __IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31];
- __IO uint32_t ICPR[1]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31];
- uint32_t RESERVED4[64];
- __IO uint32_t IP[8]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- uint32_t RESERVED0;
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IO uint32_t SHP[2]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR)
- are only accessible over DAP and not via processor. Therefore
- they are not covered by the Cortex-M0 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M0 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 )
-#define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )
-#define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) )
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
- else {
- NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M0 system interrupts */
- else {
- return((uint32_t)((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cm0plus.h b/os/ports/common/ARMCMx/CMSIS/include/core_cm0plus.h deleted file mode 100644 index cf92fb7fe..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cm0plus.h +++ /dev/null @@ -1,778 +0,0 @@ -/**************************************************************************//**
- * @file core_cm0plus.h
- * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version V3.01
- * @date 22. March 2012
- *
- * @note
- * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM0PLUS_H_GENERIC
-#define __CORE_CM0PLUS_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex-M0+
- @{
- */
-
-/* CMSIS CM0P definitions */
-#define __CM0PLUS_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM0PLUS_CMSIS_VERSION_SUB (0x01) /*!< [15:0] CMSIS HAL sub version */
-#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16) | \
- __CM0PLUS_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x00) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
-*/
-#define __FPU_USED 0
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-
-#endif /* __CORE_CM0PLUS_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0PLUS_H_DEPENDANT
-#define __CORE_CM0PLUS_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM0PLUS_REV
- #define __CM0PLUS_REV 0x0000
- #warning "__CM0PLUS_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __VTOR_PRESENT
- #define __VTOR_PRESENT 0
- #warning "__VTOR_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 2
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex-M0+ */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core MPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[1]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[31];
- __IO uint32_t ICER[1]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[31];
- __IO uint32_t ISPR[1]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[31];
- __IO uint32_t ICPR[1]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[31];
- uint32_t RESERVED4[64];
- __IO uint32_t IP[8]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
-} NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
-#if (__VTOR_PRESENT == 1)
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
-#else
- uint32_t RESERVED0;
-#endif
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- uint32_t RESERVED1;
- __IO uint32_t SHP[2]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if (__VTOR_PRESENT == 1)
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 8 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR)
- are only accessible over DAP and not via processor. Therefore
- they are not covered by the Cortex-M0 header file.
- @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M0+ Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/* Interrupt Priorities are WORD accessible only under ARMv6M */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 )
-#define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )
-#define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) )
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[0] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[0] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[_SHP_IDX(IRQn)] = (SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
- else {
- NVIC->IP[_IP_IDX(IRQn)] = (NVIC->IP[_IP_IDX(IRQn)] & ~(0xFF << _BIT_SHIFT(IRQn))) |
- (((priority << (8 - __NVIC_PRIO_BITS)) & 0xFF) << _BIT_SHIFT(IRQn)); }
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M0+ system interrupts */
- else {
- return((uint32_t)((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- SCB_AIRCR_SYSRESETREQ_Msk);
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#endif /* __CORE_CM0PLUS_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cm3.h b/os/ports/common/ARMCMx/CMSIS/include/core_cm3.h deleted file mode 100644 index db1716ad9..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cm3.h +++ /dev/null @@ -1,1612 +0,0 @@ -/**************************************************************************//**
- * @file core_cm3.h
- * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version V3.01
- * @date 22. March 2012
- *
- * @note
- * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM3_H_GENERIC
-#define __CORE_CM3_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M3
- @{
- */
-
-/* CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM3_CMSIS_VERSION_SUB (0x01) /*!< [15:0] CMSIS HAL sub version */
-#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | \
- __CM3_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x03) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. This core does not support an FPU at all
-*/
-#define __FPU_USED 0
-
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI__VFP_SUPPORT____
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-
-#endif /* __CORE_CM3_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM3_H_DEPENDANT
-#define __CORE_CM3_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM3_REV
- #define __CM3_REV 0x0200
- #warning "__CM3_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M3 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24];
- __IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24];
- __IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24];
- __IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24];
- __IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56];
- __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644];
- __O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5];
- __IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#if (__CM3_REV < 0x0201) /* core r2p1 */
-#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#else
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/** \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
-#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
- __IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-#else
- uint32_t RESERVED1[1];
-#endif
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1 /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __O union
- {
- __O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864];
- __IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15];
- __IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15];
- __IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29];
- __O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __I uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IO uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43];
- __O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __I uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6];
- __I uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __I uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __I uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __I uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __I uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __I uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __I uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __I uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __I uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __I uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __I uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __I uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IO uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IO uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IO uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IO uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IO uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __I uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IO uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IO uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1];
- __IO uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IO uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IO uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1];
- __IO uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IO uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IO uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1];
- __IO uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IO uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IO uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28 /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27 /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26 /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25 /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24 /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22 /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21 /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20 /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19 /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18 /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17 /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16 /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12 /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10 /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9 /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5 /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1 /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0 /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL << DWT_CTRL_CYCCNTENA_Pos) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0 /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL << DWT_CPICNT_CPICNT_Pos) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0 /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL << DWT_EXCCNT_EXCCNT_Pos) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0 /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0 /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0 /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL << DWT_MASK_MASK_Pos) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24 /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16 /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12 /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10 /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9 /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8 /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7 /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5 /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0 /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL << DWT_FUNCTION_FUNCTION_Pos) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/** \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IO uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IO uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2];
- __IO uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55];
- __IO uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131];
- __I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IO uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __I uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759];
- __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
- __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1];
- __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39];
- __IO uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IO uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8];
- __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __I uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0 /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL << TPI_ACPR_PRESCALER_Pos) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0 /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL << TPI_SPPR_TXMODE_Pos) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3 /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2 /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1 /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0 /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL << TPI_FFSR_FlInProg_Pos) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8 /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1 /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0 /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL << TPI_TRIGGER_TRIGGER_Pos) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29 /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27 /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26 /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24 /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16 /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8 /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0 /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL << TPI_FIFO0_ETM0_Pos) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0 /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL << TPI_ITATBCTR2_ATREADY_Pos) /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29 /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27 /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26 /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24 /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16 /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8 /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0 /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL << TPI_FIFO1_ITM0_Pos) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0 /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL << TPI_ITATBCTR0_ATREADY_Pos) /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0 /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL << TPI_ITCTRL_Mode_Pos) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11 /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10 /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9 /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6 /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5 /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0 /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL << TPI_DEVID_NrTraceInput_Pos) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 0 /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL << TPI_DEVTYPE_SubType_Pos) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 4 /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/** \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M3 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/** \brief Set Priority Grouping
-
- The function sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8)); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/** \brief Get Priority Grouping
-
- The function reads the priority grouping field from the NVIC Interrupt Controller.
-
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
- return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */
-}
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
- NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Get Active Interrupt
-
- The function reads the active register in NVIC and returns the active bit.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
- return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */
- else {
- NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M system interrupts */
- else {
- return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief Encode Priority
-
- The function encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
-
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- return (
- ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
- ((SubPriority & ((1 << (SubPriorityBits )) - 1)))
- );
-}
-
-
-/** \brief Decode Priority
-
- The function decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
-
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
- *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief ITM Send Character
-
- The function transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-
- \param [in] ch Character to transmit.
-
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */
- (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0].u32 == 0);
- ITM->PORT[0].u8 = (uint8_t) ch;
- }
- return (ch);
-}
-
-
-/** \brief ITM Receive Character
-
- The function inputs a character via the external variable \ref ITM_RxBuffer.
-
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/** \brief ITM Check Character
-
- The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
- return (0); /* no character available */
- } else {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-#endif /* __CORE_CM3_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cm4.h b/os/ports/common/ARMCMx/CMSIS/include/core_cm4.h deleted file mode 100644 index 024302e4a..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cm4.h +++ /dev/null @@ -1,1757 +0,0 @@ -/**************************************************************************//**
- * @file core_cm4.h
- * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version V3.01
- * @date 22. March 2012
- *
- * @note
- * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-#if defined ( __ICCARM__ )
- #pragma system_include /* treat file as system include file for MISRA check */
-#endif
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM4_H_GENERIC
-#define __CORE_CM4_H_GENERIC
-
-/** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
- CMSIS violates the following MISRA-C:2004 rules:
-
- \li Required Rule 8.5, object/function definition in header file.<br>
- Function definitions in header files are used to allow 'inlining'.
-
- \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
- Unions are used for effective representation of core registers.
-
- \li Advisory Rule 19.7, Function-like macro defined.<br>
- Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- * CMSIS definitions
- ******************************************************************************/
-/** \ingroup Cortex_M4
- @{
- */
-
-/* CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB (0x01) /*!< [15:0] CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16) | \
- __CM4_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
-
-#define __CORTEX_M (0x04) /*!< Cortex-M Core */
-
-
-#if defined ( __CC_ARM )
- #define __ASM __asm /*!< asm keyword for ARM Compiler */
- #define __INLINE __inline /*!< inline keyword for ARM Compiler */
- #define __STATIC_INLINE static __inline
-
-#elif defined ( __ICCARM__ )
- #define __ASM __asm /*!< asm keyword for IAR Compiler */
- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TMS470__ )
- #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __GNUC__ )
- #define __ASM __asm /*!< asm keyword for GNU Compiler */
- #define __INLINE inline /*!< inline keyword for GNU Compiler */
- #define __STATIC_INLINE static inline
-
-#elif defined ( __TASKING__ )
- #define __ASM __asm /*!< asm keyword for TASKING Compiler */
- #define __INLINE inline /*!< inline keyword for TASKING Compiler */
- #define __STATIC_INLINE static inline
-
-#endif
-
-/** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
- #if defined __TARGET_FPU_VFP
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __ICCARM__ )
- #if defined __ARMVFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TMS470__ )
- #if defined __TI_VFP_SUPPORT__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __GNUC__ )
- #if defined (__VFP_FP__) && !defined(__SOFTFP__)
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-
-#elif defined ( __TASKING__ )
- #if defined __FPU_VFP__
- #if (__FPU_PRESENT == 1)
- #define __FPU_USED 1
- #else
- #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
- #define __FPU_USED 0
- #endif
- #else
- #define __FPU_USED 0
- #endif
-#endif
-
-#include <stdint.h> /* standard types definitions */
-#include <core_cmInstr.h> /* Core Instruction Access */
-#include <core_cmFunc.h> /* Core Function Access */
-#include <core_cm4_simd.h> /* Compiler specific SIMD Intrinsics */
-
-#endif /* __CORE_CM4_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM4_H_DEPENDANT
-#define __CORE_CM4_H_DEPENDANT
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
- #ifndef __CM4_REV
- #define __CM4_REV 0x0000
- #warning "__CM4_REV not defined in device header file; using default!"
- #endif
-
- #ifndef __FPU_PRESENT
- #define __FPU_PRESENT 0
- #warning "__FPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __MPU_PRESENT
- #define __MPU_PRESENT 0
- #warning "__MPU_PRESENT not defined in device header file; using default!"
- #endif
-
- #ifndef __NVIC_PRIO_BITS
- #define __NVIC_PRIO_BITS 4
- #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
- #endif
-
- #ifndef __Vendor_SysTickConfig
- #define __Vendor_SysTickConfig 0
- #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
- #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
- \defgroup CMSIS_glob_defs CMSIS Global Defines
-
- <strong>IO Type Qualifiers</strong> are used
- \li to specify the access to peripheral variables.
- \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
- #define __I volatile /*!< Defines 'read only' permissions */
-#else
- #define __I volatile const /*!< Defines 'read only' permissions */
-#endif
-#define __O volatile /*!< Defines 'write only' permissions */
-#define __IO volatile /*!< Defines 'read / write' permissions */
-
-/*@} end of group Cortex_M4 */
-
-
-
-/*******************************************************************************
- * Register Abstraction
- Core Register contain:
- - Core Register
- - Core NVIC Register
- - Core SCB Register
- - Core SysTick Register
- - Core Debug Register
- - Core MPU Register
- - Core FPU Register
- ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
- \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CORE Status and Control Registers
- \brief Core Register type definitions.
- @{
- */
-
-/** \brief Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
- struct
- {
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */
-#else
- uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */
-#endif
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} APSR_Type;
-
-
-/** \brief Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
- uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} IPSR_Type;
-
-
-/** \brief Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
- struct
- {
- uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
-#if (__CORTEX_M != 0x04)
- uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
-#else
- uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */
- uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
- uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */
-#endif
- uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
- uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */
- uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
- uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
- uint32_t C:1; /*!< bit: 29 Carry condition code flag */
- uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
- uint32_t N:1; /*!< bit: 31 Negative condition code flag */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} xPSR_Type;
-
-
-/** \brief Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
- struct
- {
- uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */
- uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
- uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */
- uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */
- } b; /*!< Structure used for bit access */
- uint32_t w; /*!< Type used for word access */
-} CONTROL_Type;
-
-/*@} end of group CMSIS_CORE */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
- \brief Type definitions for the NVIC Registers
- @{
- */
-
-/** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
- __IO uint32_t ISER[8]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
- uint32_t RESERVED0[24];
- __IO uint32_t ICER[8]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
- uint32_t RSERVED1[24];
- __IO uint32_t ISPR[8]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
- uint32_t RESERVED2[24];
- __IO uint32_t ICPR[8]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
- uint32_t RESERVED3[24];
- __IO uint32_t IABR[8]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */
- uint32_t RESERVED4[56];
- __IO uint8_t IP[240]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */
- uint32_t RESERVED5[644];
- __O uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */
-} NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCB System Control Block (SCB)
- \brief Type definitions for the System Control Block Registers
- @{
- */
-
-/** \brief Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
- __I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
- __IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
- __IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
- __IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
- __IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
- __IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
- __IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
- __IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
- __IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
- __IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
- __IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
- __IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
- __IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
- __IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
- __I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
- __I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
- __I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
- __I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
- __I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
- uint32_t RESERVED0[5];
- __IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos 16 /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk (0xFUL << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk (1UL << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk (1UL << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk (1UL << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk (1UL << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
- \brief Type definitions for the System Control and ID Register not in the SCB
- @{
- */
-
-/** \brief Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __I uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */
- __IO uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos 0 /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL << SCnSCB_ICTR_INTLINESNUM_Pos) /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos 9 /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos 8 /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos 2 /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1 /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos 0 /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL << SCnSCB_ACTLR_DISMCYCINT_Pos) /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_SysTick System Tick Timer (SysTick)
- \brief Type definitions for the System Timer Registers.
- @{
- */
-
-/** \brief Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
- __IO uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
- __IO uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
- __I uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM)
- \brief Type definitions for the Instrumentation Trace Macrocell (ITM)
- @{
- */
-
-/** \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
- __O union
- {
- __O uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */
- __O uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */
- __O uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */
- } PORT [32]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */
- uint32_t RESERVED0[864];
- __IO uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */
- uint32_t RESERVED1[15];
- __IO uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */
- uint32_t RESERVED2[15];
- __IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */
- uint32_t RESERVED3[29];
- __O uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */
- __I uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */
- __IO uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */
- uint32_t RESERVED4[43];
- __O uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */
- __I uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */
- uint32_t RESERVED5[6];
- __I uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */
- __I uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */
- __I uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */
- __I uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */
- __I uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */
- __I uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */
- __I uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */
- __I uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */
- __I uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */
- __I uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */
- __I uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */
- __I uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk (0xFUL << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos 16 /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos 10 /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk (1UL << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk (1UL << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk (1UL << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk (1UL << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk (1UL << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT)
- \brief Type definitions for the Data Watchpoint and Trace (DWT)
- @{
- */
-
-/** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
- __IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */
- __IO uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */
- __IO uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */
- __IO uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */
- __IO uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */
- __IO uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */
- __IO uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */
- __I uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */
- __IO uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */
- __IO uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */
- __IO uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */
- uint32_t RESERVED0[1];
- __IO uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */
- __IO uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */
- __IO uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */
- uint32_t RESERVED1[1];
- __IO uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */
- __IO uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */
- __IO uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */
- uint32_t RESERVED2[1];
- __IO uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */
- __IO uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */
- __IO uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos 28 /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos 27 /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos 26 /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos 25 /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos 24 /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos 22 /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos 21 /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos 20 /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos 19 /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos 18 /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos 17 /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos 16 /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos 12 /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos 10 /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos 9 /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos 5 /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos 1 /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos 0 /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk (0x1UL << DWT_CTRL_CYCCNTENA_Pos) /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos 0 /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk (0xFFUL << DWT_CPICNT_CPICNT_Pos) /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos 0 /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL << DWT_EXCCNT_EXCCNT_Pos) /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos 0 /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL << DWT_SLEEPCNT_SLEEPCNT_Pos) /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos 0 /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL << DWT_LSUCNT_LSUCNT_Pos) /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos 0 /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL << DWT_FOLDCNT_FOLDCNT_Pos) /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos 0 /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk (0x1FUL << DWT_MASK_MASK_Pos) /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos 24 /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos 16 /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos 12 /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos 10 /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos 9 /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos 8 /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos 7 /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos 5 /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos 0 /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk (0xFUL << DWT_FUNCTION_FUNCTION_Pos) /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_TPI Trace Port Interface (TPI)
- \brief Type definitions for the Trace Port Interface (TPI)
- @{
- */
-
-/** \brief Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
- __IO uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */
- __IO uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */
- uint32_t RESERVED0[2];
- __IO uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */
- uint32_t RESERVED1[55];
- __IO uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */
- uint32_t RESERVED2[131];
- __I uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */
- __IO uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */
- __I uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */
- uint32_t RESERVED3[759];
- __I uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER */
- __I uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */
- __I uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */
- uint32_t RESERVED4[1];
- __I uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
- __I uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- __IO uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
- uint32_t RESERVED5[39];
- __IO uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */
- __IO uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */
- uint32_t RESERVED7[8];
- __I uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */
- __I uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos 0 /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL << TPI_ACPR_PRESCALER_Pos) /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos 0 /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk (0x3UL << TPI_SPPR_TXMODE_Pos) /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos 3 /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos 2 /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos 1 /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos 0 /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk (0x1UL << TPI_FFSR_FlInProg_Pos) /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos 8 /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos 1 /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos 0 /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk (0x1UL << TPI_TRIGGER_TRIGGER_Pos) /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos 29 /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos 27 /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos 26 /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos 24 /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos 16 /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos 8 /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos 0 /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk (0xFFUL << TPI_FIFO0_ETM0_Pos) /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos 0 /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk (0x1UL << TPI_ITATBCTR2_ATREADY_Pos) /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos 29 /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos 27 /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos 26 /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos 24 /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos 16 /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos 8 /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos 0 /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk (0xFFUL << TPI_FIFO1_ITM0_Pos) /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos 0 /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk (0x1UL << TPI_ITATBCTR0_ATREADY_Pos) /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos 0 /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk (0x1UL << TPI_ITCTRL_Mode_Pos) /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos 11 /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos 10 /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos 9 /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos 6 /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos 5 /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos 0 /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk (0x1FUL << TPI_DEVID_NrTraceInput_Pos) /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos 0 /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk (0xFUL << TPI_DEVTYPE_SubType_Pos) /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos 4 /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if (__MPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_MPU Memory Protection Unit (MPU)
- \brief Type definitions for the Memory Protection Unit (MPU)
- @{
- */
-
-/** \brief Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
- __I uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */
- __IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */
- __IO uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */
- __IO uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */
- __IO uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */
- __IO uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */
- __IO uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */
- __IO uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */
- __IO uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */
- __IO uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */
- __IO uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk (1UL << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk (1UL << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk (0xFFUL << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk (0xFUL << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos 16 /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos 18 /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos 17 /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos 16 /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos 0 /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk (1UL << MPU_RASR_ENABLE_Pos) /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if (__FPU_PRESENT == 1)
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_FPU Floating Point Unit (FPU)
- \brief Type definitions for the Floating Point Unit (FPU)
- @{
- */
-
-/** \brief Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
- uint32_t RESERVED0[1];
- __IO uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */
- __IO uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */
- __IO uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */
- __I uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */
- __I uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register */
-#define FPU_FPCCR_ASPEN_Pos 31 /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos 30 /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos 8 /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos 6 /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos 5 /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos 4 /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos 3 /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos 1 /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos 0 /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk (1UL << FPU_FPCCR_LSPACT_Pos) /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register */
-#define FPU_FPCAR_ADDRESS_Pos 3 /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register */
-#define FPU_FPDSCR_AHP_Pos 26 /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos 25 /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos 24 /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos 22 /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 */
-#define FPU_MVFR0_FP_rounding_modes_Pos 28 /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos 24 /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos 20 /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos 16 /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos 12 /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos 8 /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos 4 /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos 0 /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL << FPU_MVFR0_A_SIMD_registers_Pos) /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 */
-#define FPU_MVFR1_FP_fused_MAC_Pos 28 /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos 24 /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos 4 /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos 0 /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk (0xFUL << FPU_MVFR1_FtZ_mode_Pos) /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-#endif
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
- \brief Type definitions for the Core Debug Registers
- @{
- */
-
-/** \brief Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
- __IO uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */
- __O uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */
- __IO uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */
- __IO uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/** \ingroup CMSIS_core_register
- \defgroup CMSIS_core_base Core Definitions
- \brief Definitions for base addresses, unions, and structures.
- @{
- */
-
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
-#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */
-#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */
-#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */
-#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */
-#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
-#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
-#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
-
-#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */
-#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
-#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
-#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
-#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */
-#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */
-#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */
-#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */
-
-#if (__MPU_PRESENT == 1)
- #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */
- #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */
-#endif
-
-#if (__FPU_PRESENT == 1)
- #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */
- #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- Core Function Interface contains:
- - Core NVIC Functions
- - Core SysTick Functions
- - Core Debug Functions
- - Core Register Access Functions
- ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ########################## NVIC functions #################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_NVICFunctions NVIC Functions
- \brief Functions that manage interrupts and exceptions via the NVIC.
- @{
- */
-
-/** \brief Set Priority Grouping
-
- The function sets the priority grouping field using the required unlock sequence.
- The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
- Only values from 0..7 are used.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
- \param [in] PriorityGroup Priority grouping field.
- */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
- uint32_t reg_value;
- uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
-
- reg_value = SCB->AIRCR; /* read old register configuration */
- reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
- reg_value = (reg_value |
- ((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (PriorityGroupTmp << 8)); /* Insert write key and priorty group */
- SCB->AIRCR = reg_value;
-}
-
-
-/** \brief Get Priority Grouping
-
- The function reads the priority grouping field from the NVIC Interrupt Controller.
-
- \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
-{
- return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */
-}
-
-
-/** \brief Enable External Interrupt
-
- The function enables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-/* NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); enable interrupt */
- NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F)); /* enable interrupt */
-}
-
-
-/** \brief Disable External Interrupt
-
- The function disables a device-specific interrupt in the NVIC interrupt controller.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
-{
- NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */
-}
-
-
-/** \brief Get Pending Interrupt
-
- The function reads the pending register in the NVIC and returns the pending bit
- for the specified interrupt.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not pending.
- \return 1 Interrupt status is pending.
- */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
- return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */
-}
-
-
-/** \brief Set Pending Interrupt
-
- The function sets the pending bit of an external interrupt.
-
- \param [in] IRQn Interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */
-}
-
-
-/** \brief Clear Pending Interrupt
-
- The function clears the pending bit of an external interrupt.
-
- \param [in] IRQn External interrupt number. Value cannot be negative.
- */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
- NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */
-}
-
-
-/** \brief Get Active Interrupt
-
- The function reads the active register in NVIC and returns the active bit.
-
- \param [in] IRQn Interrupt number.
-
- \return 0 Interrupt status is not active.
- \return 1 Interrupt status is active.
- */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
-{
- return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */
-}
-
-
-/** \brief Set Interrupt Priority
-
- The function sets the priority of an interrupt.
-
- \note The priority cannot be set for every core interrupt.
-
- \param [in] IRQn Interrupt number.
- \param [in] priority Priority to set.
- */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
- if(IRQn < 0) {
- SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M System Interrupts */
- else {
- NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */
-}
-
-
-/** \brief Get Interrupt Priority
-
- The function reads the priority of an interrupt. The interrupt
- number can be positive to specify an external (device specific)
- interrupt, or negative to specify an internal (core) interrupt.
-
-
- \param [in] IRQn Interrupt number.
- \return Interrupt Priority. Value is aligned automatically to the implemented
- priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
-{
-
- if(IRQn < 0) {
- return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M system interrupts */
- else {
- return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */
-}
-
-
-/** \brief Encode Priority
-
- The function encodes the priority for an interrupt with the given priority group,
- preemptive priority value, and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS), the samllest possible priority group is set.
-
- \param [in] PriorityGroup Used priority group.
- \param [in] PreemptPriority Preemptive priority value (starting from 0).
- \param [in] SubPriority Subpriority value (starting from 0).
- \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- return (
- ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) |
- ((SubPriority & ((1 << (SubPriorityBits )) - 1)))
- );
-}
-
-
-/** \brief Decode Priority
-
- The function decodes an interrupt priority value with a given priority group to
- preemptive priority value and subpriority value.
- In case of a conflict between priority grouping and available
- priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set.
-
- \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
- \param [in] PriorityGroup Used priority group.
- \param [out] pPreemptPriority Preemptive priority value (starting from 0).
- \param [out] pSubPriority Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
-{
- uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */
- uint32_t PreemptPriorityBits;
- uint32_t SubPriorityBits;
-
- PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;
- SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;
-
- *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1);
- *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1);
-}
-
-
-/** \brief System Reset
-
- The function initiates a system reset request to reset the MCU.
- */
-__STATIC_INLINE void NVIC_SystemReset(void)
-{
- __DSB(); /* Ensure all outstanding memory accesses included
- buffered write are completed before reset */
- SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) |
- (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
- SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */
- __DSB(); /* Ensure completion of memory access */
- while(1); /* wait until reset */
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-
-/* ################################## SysTick function ############################################ */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
- \brief Functions that configure the System.
- @{
- */
-
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief System Tick Configuration
-
- The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
- Counter is in free running mode to generate periodic interrupts.
-
- \param [in] ticks Number of ticks between two interrupts.
-
- \return 0 Function succeeded.
- \return 1 Function failed.
-
- \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
- function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
- must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
- if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */
-
- SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */
- NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Systick Interrupt */
- SysTick->VAL = 0; /* Load the SysTick Counter Value */
- SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
- SysTick_CTRL_TICKINT_Msk |
- SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
- return (0); /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_core_DebugFunctions ITM Functions
- \brief Functions that access the ITM debug interface.
- @{
- */
-
-extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */
-#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief ITM Send Character
-
- The function transmits a character via the ITM channel 0, and
- \li Just returns when no debugger is connected that has booked the output.
- \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-
- \param [in] ch Character to transmit.
-
- \returns Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
- if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */
- (ITM->TER & (1UL << 0) ) ) /* ITM Port #0 enabled */
- {
- while (ITM->PORT[0].u32 == 0);
- ITM->PORT[0].u8 = (uint8_t) ch;
- }
- return (ch);
-}
-
-
-/** \brief ITM Receive Character
-
- The function inputs a character via the external variable \ref ITM_RxBuffer.
-
- \return Received character.
- \return -1 No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
- int32_t ch = -1; /* no character available */
-
- if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
- ch = ITM_RxBuffer;
- ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
- }
-
- return (ch);
-}
-
-
-/** \brief ITM Check Character
-
- The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
- \return 0 No character available.
- \return 1 Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
-
- if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
- return (0); /* no character available */
- } else {
- return (1); /* character available */
- }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-#endif /* __CORE_CM4_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cm4_simd.h b/os/ports/common/ARMCMx/CMSIS/include/core_cm4_simd.h deleted file mode 100644 index b5140073f..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cm4_simd.h +++ /dev/null @@ -1,649 +0,0 @@ -/**************************************************************************//**
- * @file core_cm4_simd.h
- * @brief CMSIS Cortex-M4 SIMD Header File
- * @version V3.01
- * @date 06. March 2012
- *
- * @note
- * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#ifndef __CORE_CM4_SIMD_H
-#define __CORE_CM4_SIMD_H
-
-
-/*******************************************************************************
- * Hardware Abstraction Layer
- ******************************************************************************/
-
-
-/* ################### Compiler specific Intrinsics ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
- Access to dedicated SIMD instructions
- @{
-*/
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-#define __SADD8 __sadd8
-#define __QADD8 __qadd8
-#define __SHADD8 __shadd8
-#define __UADD8 __uadd8
-#define __UQADD8 __uqadd8
-#define __UHADD8 __uhadd8
-#define __SSUB8 __ssub8
-#define __QSUB8 __qsub8
-#define __SHSUB8 __shsub8
-#define __USUB8 __usub8
-#define __UQSUB8 __uqsub8
-#define __UHSUB8 __uhsub8
-#define __SADD16 __sadd16
-#define __QADD16 __qadd16
-#define __SHADD16 __shadd16
-#define __UADD16 __uadd16
-#define __UQADD16 __uqadd16
-#define __UHADD16 __uhadd16
-#define __SSUB16 __ssub16
-#define __QSUB16 __qsub16
-#define __SHSUB16 __shsub16
-#define __USUB16 __usub16
-#define __UQSUB16 __uqsub16
-#define __UHSUB16 __uhsub16
-#define __SASX __sasx
-#define __QASX __qasx
-#define __SHASX __shasx
-#define __UASX __uasx
-#define __UQASX __uqasx
-#define __UHASX __uhasx
-#define __SSAX __ssax
-#define __QSAX __qsax
-#define __SHSAX __shsax
-#define __USAX __usax
-#define __UQSAX __uqsax
-#define __UHSAX __uhsax
-#define __USAD8 __usad8
-#define __USADA8 __usada8
-#define __SSAT16 __ssat16
-#define __USAT16 __usat16
-#define __UXTB16 __uxtb16
-#define __UXTAB16 __uxtab16
-#define __SXTB16 __sxtb16
-#define __SXTAB16 __sxtab16
-#define __SMUAD __smuad
-#define __SMUADX __smuadx
-#define __SMLAD __smlad
-#define __SMLADX __smladx
-#define __SMLALD __smlald
-#define __SMLALDX __smlaldx
-#define __SMUSD __smusd
-#define __SMUSDX __smusdx
-#define __SMLSD __smlsd
-#define __SMLSDX __smlsdx
-#define __SMLSLD __smlsld
-#define __SMLSLDX __smlsldx
-#define __SEL __sel
-#define __QADD __qadd
-#define __QSUB __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
- ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
-
-#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
- ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
-
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-#include <cmsis_iar.h>
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-#include <cmsis_ccs.h>
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
- uint32_t result;
-
- __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SMLALD(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-#define __SMLALDX(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
- uint32_t result;
-
- __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#define __SMLSLD(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-#define __SMLSLDX(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
- __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
- (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
-{
- uint32_t result;
-
- __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
- return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
- if (ARG3 == 0) \
- __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
- else \
- __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
- __RES; \
- })
-
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-
-
-/*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
-/* not yet supported */
-/*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
-
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CORE_CM4_SIMD_H */
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h b/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h deleted file mode 100644 index 585d2bb56..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cmFunc.h +++ /dev/null @@ -1,620 +0,0 @@ -/**************************************************************************//**
- * @file core_cmFunc.h
- * @brief CMSIS Cortex-M Core Function Access Header File
- * @version V3.01
- * @date 06. March 2012
- *
- * @note
- * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ########################### Core Function Access ########################### */
-/** \ingroup CMSIS_Core_FunctionInterface
- \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- @{
- */
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
- #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* intrinsic void __enable_irq(); */
-/* intrinsic void __disable_irq(); */
-
-/** \brief Get Control Register
-
- This function returns the content of the Control Register.
-
- \return Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- register uint32_t __regControl __ASM("control");
- return(__regControl);
-}
-
-
-/** \brief Set Control Register
-
- This function writes the given value to the Control Register.
-
- \param [in] control Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- register uint32_t __regControl __ASM("control");
- __regControl = control;
-}
-
-
-/** \brief Get IPSR Register
-
- This function returns the content of the IPSR Register.
-
- \return IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
- register uint32_t __regIPSR __ASM("ipsr");
- return(__regIPSR);
-}
-
-
-/** \brief Get APSR Register
-
- This function returns the content of the APSR Register.
-
- \return APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
- register uint32_t __regAPSR __ASM("apsr");
- return(__regAPSR);
-}
-
-
-/** \brief Get xPSR Register
-
- This function returns the content of the xPSR Register.
-
- \return xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
- register uint32_t __regXPSR __ASM("xpsr");
- return(__regXPSR);
-}
-
-
-/** \brief Get Process Stack Pointer
-
- This function returns the current value of the Process Stack Pointer (PSP).
-
- \return PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- return(__regProcessStackPointer);
-}
-
-
-/** \brief Set Process Stack Pointer
-
- This function assigns the given value to the Process Stack Pointer (PSP).
-
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- register uint32_t __regProcessStackPointer __ASM("psp");
- __regProcessStackPointer = topOfProcStack;
-}
-
-
-/** \brief Get Main Stack Pointer
-
- This function returns the current value of the Main Stack Pointer (MSP).
-
- \return MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- return(__regMainStackPointer);
-}
-
-
-/** \brief Set Main Stack Pointer
-
- This function assigns the given value to the Main Stack Pointer (MSP).
-
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- register uint32_t __regMainStackPointer __ASM("msp");
- __regMainStackPointer = topOfMainStack;
-}
-
-
-/** \brief Get Priority Mask
-
- This function returns the current state of the priority mask bit from the Priority Mask Register.
-
- \return Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- register uint32_t __regPriMask __ASM("primask");
- return(__regPriMask);
-}
-
-
-/** \brief Set Priority Mask
-
- This function assigns the given value to the Priority Mask Register.
-
- \param [in] priMask Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- register uint32_t __regPriMask __ASM("primask");
- __regPriMask = (priMask);
-}
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Enable FIQ
-
- This function enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq __enable_fiq
-
-
-/** \brief Disable FIQ
-
- This function disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq __disable_fiq
-
-
-/** \brief Get Base Priority
-
- This function returns the current value of the Base Priority register.
-
- \return Base Priority register value
- */
-__STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- register uint32_t __regBasePri __ASM("basepri");
- return(__regBasePri);
-}
-
-
-/** \brief Set Base Priority
-
- This function assigns the given value to the Base Priority register.
-
- \param [in] basePri Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
- register uint32_t __regBasePri __ASM("basepri");
- __regBasePri = (basePri & 0xff);
-}
-
-
-/** \brief Get Fault Mask
-
- This function returns the current value of the Fault Mask register.
-
- \return Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- return(__regFaultMask);
-}
-
-
-/** \brief Set Fault Mask
-
- This function assigns the given value to the Fault Mask register.
-
- \param [in] faultMask Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- register uint32_t __regFaultMask __ASM("faultmask");
- __regFaultMask = (faultMask & (uint32_t)1);
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-#if (__CORTEX_M == 0x04)
-
-/** \brief Get FPSCR
-
- This function returns the current value of the Floating Point Status/Control register.
-
- \return Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- register uint32_t __regfpscr __ASM("fpscr");
- return(__regfpscr);
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPSCR
-
- This function assigns the given value to the Floating Point Status/Control register.
-
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- register uint32_t __regfpscr __ASM("fpscr");
- __regfpscr = (fpscr);
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) */
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-
-#include <cmsis_iar.h>
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-
-#include <cmsis_ccs.h>
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/** \brief Enable IRQ Interrupts
-
- This function enables IRQ interrupts by clearing the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
- __ASM volatile ("cpsie i");
-}
-
-
-/** \brief Disable IRQ Interrupts
-
- This function disables IRQ interrupts by setting the I-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
-{
- __ASM volatile ("cpsid i");
-}
-
-
-/** \brief Get Control Register
-
- This function returns the content of the Control Register.
-
- \return Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, control" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Control Register
-
- This function writes the given value to the Control Register.
-
- \param [in] control Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
- __ASM volatile ("MSR control, %0" : : "r" (control) );
-}
-
-
-/** \brief Get IPSR Register
-
- This function returns the content of the IPSR Register.
-
- \return IPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Get APSR Register
-
- This function returns the content of the APSR Register.
-
- \return APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Get xPSR Register
-
- This function returns the content of the xPSR Register.
-
- \return xPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Get Process Stack Pointer
-
- This function returns the current value of the Process Stack Pointer (PSP).
-
- \return PSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Process Stack Pointer
-
- This function assigns the given value to the Process Stack Pointer (PSP).
-
- \param [in] topOfProcStack Process Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
- __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
-}
-
-
-/** \brief Get Main Stack Pointer
-
- This function returns the current value of the Main Stack Pointer (MSP).
-
- \return MSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
-{
- register uint32_t result;
-
- __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Main Stack Pointer
-
- This function assigns the given value to the Main Stack Pointer (MSP).
-
- \param [in] topOfMainStack Main Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
- __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
-}
-
-
-/** \brief Get Priority Mask
-
- This function returns the current state of the priority mask bit from the Priority Mask Register.
-
- \return Priority Mask value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, primask" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Priority Mask
-
- This function assigns the given value to the Priority Mask Register.
-
- \param [in] priMask Priority Mask
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
- __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
-}
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Enable FIQ
-
- This function enables FIQ interrupts by clearing the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
-{
- __ASM volatile ("cpsie f");
-}
-
-
-/** \brief Disable FIQ
-
- This function disables FIQ interrupts by setting the F-bit in the CPSR.
- Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
-{
- __ASM volatile ("cpsid f");
-}
-
-
-/** \brief Get Base Priority
-
- This function returns the current value of the Base Priority register.
-
- \return Base Priority register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Base Priority
-
- This function assigns the given value to the Base Priority register.
-
- \param [in] basePri Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
- __ASM volatile ("MSR basepri, %0" : : "r" (value) );
-}
-
-
-/** \brief Get Fault Mask
-
- This function returns the current value of the Fault Mask register.
-
- \return Fault Mask register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
- uint32_t result;
-
- __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- return(result);
-}
-
-
-/** \brief Set Fault Mask
-
- This function assigns the given value to the Fault Mask register.
-
- \param [in] faultMask Fault Mask value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
- __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-#if (__CORTEX_M == 0x04)
-
-/** \brief Get FPSCR
-
- This function returns the current value of the Floating Point Status/Control register.
-
- \return Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- uint32_t result;
-
- __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- return(result);
-#else
- return(0);
-#endif
-}
-
-
-/** \brief Set FPSCR
-
- This function assigns the given value to the Floating Point Status/Control register.
-
- \param [in] fpscr Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
- __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
-/* CHIBIOS FIX BEGIN */
-#else
- (void)fpscr;
-/* CHIBIOS FIX END */
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) */
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all instrinsics,
- * Including the CMSIS ones.
- */
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-#endif /* __CORE_CMFUNC_H */
diff --git a/os/ports/common/ARMCMx/CMSIS/include/core_cmInstr.h b/os/ports/common/ARMCMx/CMSIS/include/core_cmInstr.h deleted file mode 100644 index 624c175fd..000000000 --- a/os/ports/common/ARMCMx/CMSIS/include/core_cmInstr.h +++ /dev/null @@ -1,618 +0,0 @@ -/**************************************************************************//**
- * @file core_cmInstr.h
- * @brief CMSIS Cortex-M Core Instruction Access Header File
- * @version V3.01
- * @date 06. March 2012
- *
- * @note
- * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
- *
- * @par
- * ARM Limited (ARM) is supplying this software for use with Cortex-M
- * processor based microcontrollers. This file can be freely distributed
- * within development tools that are supporting such ARM based processors.
- *
- * @par
- * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
- * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
- * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
- * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
- *
- ******************************************************************************/
-
-#ifndef __CORE_CMINSTR_H
-#define __CORE_CMINSTR_H
-
-
-/* ########################## Core Instruction Access ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- Access to dedicated instructions
- @{
-*/
-
-#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
- #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-
-/** \brief No Operation
-
- No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP __nop
-
-
-/** \brief Wait For Interrupt
-
- Wait For Interrupt is a hint instruction that suspends execution
- until one of a number of events occurs.
- */
-#define __WFI __wfi
-
-
-/** \brief Wait For Event
-
- Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-#define __WFE __wfe
-
-
-/** \brief Send Event
-
- Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV __sev
-
-
-/** \brief Instruction Synchronization Barrier
-
- Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or
- memory, after the instruction has been completed.
- */
-#define __ISB() __isb(0xF)
-
-
-/** \brief Data Synchronization Barrier
-
- This function acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() __dsb(0xF)
-
-
-/** \brief Data Memory Barrier
-
- This function ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-#define __DMB() __dmb(0xF)
-
-
-/** \brief Reverse byte order (32 bit)
-
- This function reverses the byte order in integer value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __REV __rev
-
-
-/** \brief Reverse byte order (16 bit)
-
- This function reverses the byte order in two unsigned short values.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
- rev16 r0, r0
- bx lr
-}
-
-
-/** \brief Reverse byte order in signed short value
-
- This function reverses the byte order in a signed short value with sign extension to integer.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
-{
- revsh r0, r0
- bx lr
-}
-
-
-/** \brief Rotate Right in unsigned value (32 bit)
-
- This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
- \return Rotated value
- */
-#define __ROR __ror
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Reverse bit order of value
-
- This function reverses the bit order of the given value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-#define __RBIT __rbit
-
-
-/** \brief LDR Exclusive (8 bit)
-
- This function performs a exclusive LDR command for 8 bit value.
-
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
-
-
-/** \brief LDR Exclusive (16 bit)
-
- This function performs a exclusive LDR command for 16 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
-
-
-/** \brief LDR Exclusive (32 bit)
-
- This function performs a exclusive LDR command for 32 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
-
-
-/** \brief STR Exclusive (8 bit)
-
- This function performs a exclusive STR command for 8 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXB(value, ptr) __strex(value, ptr)
-
-
-/** \brief STR Exclusive (16 bit)
-
- This function performs a exclusive STR command for 16 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXH(value, ptr) __strex(value, ptr)
-
-
-/** \brief STR Exclusive (32 bit)
-
- This function performs a exclusive STR command for 32 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-#define __STREXW(value, ptr) __strex(value, ptr)
-
-
-/** \brief Remove the exclusive lock
-
- This function removes the exclusive lock which is created by LDREX.
-
- */
-#define __CLREX __clrex
-
-
-/** \brief Signed Saturate
-
- This function saturates a signed value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT __ssat
-
-
-/** \brief Unsigned Saturate
-
- This function saturates an unsigned value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT __usat
-
-
-/** \brief Count leading zeros
-
- This function counts the number of leading zeros of a data value.
-
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-#define __CLZ __clz
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-
-#include <cmsis_iar.h>
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-
-#include <cmsis_ccs.h>
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/** \brief No Operation
-
- No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
-{
- __ASM volatile ("nop");
-}
-
-
-/** \brief Wait For Interrupt
-
- Wait For Interrupt is a hint instruction that suspends execution
- until one of a number of events occurs.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
-{
- __ASM volatile ("wfi");
-}
-
-
-/** \brief Wait For Event
-
- Wait For Event is a hint instruction that permits the processor to enter
- a low-power state until one of a number of events occurs.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
-{
- __ASM volatile ("wfe");
-}
-
-
-/** \brief Send Event
-
- Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
-{
- __ASM volatile ("sev");
-}
-
-
-/** \brief Instruction Synchronization Barrier
-
- Instruction Synchronization Barrier flushes the pipeline in the processor,
- so that all instructions following the ISB are fetched from cache or
- memory, after the instruction has been completed.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
-{
- __ASM volatile ("isb");
-}
-
-
-/** \brief Data Synchronization Barrier
-
- This function acts as a special kind of Data Memory Barrier.
- It completes when all explicit memory accesses before this instruction complete.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
-{
- __ASM volatile ("dsb");
-}
-
-
-/** \brief Data Memory Barrier
-
- This function ensures the apparent order of the explicit memory operations before
- and after the instruction, without ensuring their completion.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
-{
- __ASM volatile ("dmb");
-}
-
-
-/** \brief Reverse byte order (32 bit)
-
- This function reverses the byte order in integer value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-
-/** \brief Reverse byte order (16 bit)
-
- This function reverses the byte order in two unsigned short values.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-
-/** \brief Reverse byte order in signed short value
-
- This function reverses the byte order in a signed short value with sign extension to integer.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-
-/** \brief Rotate Right in unsigned value (32 bit)
-
- This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-
- \param [in] value Value to rotate
- \param [in] value Number of Bits to rotate
- \return Rotated value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-
- __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
- return(op1);
-}
-
-
-#if (__CORTEX_M >= 0x03)
-
-/** \brief Reverse bit order of value
-
- This function reverses the bit order of the given value.
-
- \param [in] value Value to reverse
- \return Reversed value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
- uint32_t result;
-
- __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-
-/** \brief LDR Exclusive (8 bit)
-
- This function performs a exclusive LDR command for 8 bit value.
-
- \param [in] ptr Pointer to data
- \return value of type uint8_t at (*ptr)
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
- uint8_t result;
-
- __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
-}
-
-
-/** \brief LDR Exclusive (16 bit)
-
- This function performs a exclusive LDR command for 16 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint16_t at (*ptr)
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
- uint16_t result;
-
- __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
-}
-
-
-/** \brief LDR Exclusive (32 bit)
-
- This function performs a exclusive LDR command for 32 bit values.
-
- \param [in] ptr Pointer to data
- \return value of type uint32_t at (*ptr)
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
- return(result);
-}
-
-
-/** \brief STR Exclusive (8 bit)
-
- This function performs a exclusive STR command for 8 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
- return(result);
-}
-
-
-/** \brief STR Exclusive (16 bit)
-
- This function performs a exclusive STR command for 16 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
- return(result);
-}
-
-
-/** \brief STR Exclusive (32 bit)
-
- This function performs a exclusive STR command for 32 bit values.
-
- \param [in] value Value to store
- \param [in] ptr Pointer to location
- \return 0 Function succeeded
- \return 1 Function failed
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
- uint32_t result;
-
- __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
- return(result);
-}
-
-
-/** \brief Remove the exclusive lock
-
- This function removes the exclusive lock which is created by LDREX.
-
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
-{
- __ASM volatile ("clrex");
-}
-
-
-/** \brief Signed Saturate
-
- This function saturates a signed value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (1..32)
- \return Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/** \brief Unsigned Saturate
-
- This function saturates an unsigned value.
-
- \param [in] value Value to be saturated
- \param [in] sat Bit position to saturate to (0..31)
- \return Saturated value
- */
-#define __USAT(ARG1,ARG2) \
-({ \
- uint32_t __RES, __ARG1 = (ARG1); \
- __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
- __RES; \
- })
-
-
-/** \brief Count leading zeros
-
- This function counts the number of leading zeros of a data value.
-
- \param [in] value Value to count the leading zeros
- \return number of leading zeros in value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
-{
- uint8_t result;
-
- __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
- return(result);
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-#endif
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-#endif /* __CORE_CMINSTR_H */
diff --git a/os/ports/common/ARMCMx/CMSIS/readme.txt b/os/ports/common/ARMCMx/CMSIS/readme.txt deleted file mode 100644 index 6e2172455..000000000 --- a/os/ports/common/ARMCMx/CMSIS/readme.txt +++ /dev/null @@ -1,6 +0,0 @@ -CMSIS is Copyright (C) 2011 ARM Limited. All rights reserved.
-
-This directory contains only part of the CMSIS package. If you need the whole
-package please download it from:
-
-http://www.onarm.com
diff --git a/os/ports/common/ARMCMx/nvic.c b/os/ports/common/ARMCMx/nvic.c deleted file mode 100644 index 3cf80fbfc..000000000 --- a/os/ports/common/ARMCMx/nvic.c +++ /dev/null @@ -1,74 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file common/ARMCMx/nvic.c
- * @brief Cortex-Mx NVIC support code.
- *
- * @addtogroup COMMON_ARMCMx_NVIC
- * @{
- */
-
-#include "ch.h"
-#include "nvic.h"
-
-/**
- * @brief Sets the priority of an interrupt handler and enables it.
- * @note The parameters are not tested for correctness.
- *
- * @param[in] n the interrupt number
- * @param[in] prio the interrupt priority mask
- */
-void nvicEnableVector(uint32_t n, uint32_t prio) {
- unsigned sh = (n & 3) << 3;
-
- NVIC_IPR(n >> 2) = (NVIC_IPR(n >> 2) & ~(0xFF << sh)) | (prio << sh);
- NVIC_ICPR(n >> 5) = 1 << (n & 0x1F);
- NVIC_ISER(n >> 5) = 1 << (n & 0x1F);
-}
-
-/**
- * @brief Disables an interrupt handler.
- * @note The parameters are not tested for correctness.
- *
- * @param[in] n the interrupt number
- */
-void nvicDisableVector(uint32_t n) {
- unsigned sh = (n & 3) << 3;
-
- NVIC_ICER(n >> 5) = 1 << (n & 0x1F);
- NVIC_IPR(n >> 2) = NVIC_IPR(n >> 2) & ~(0xFF << sh);
-}
-
-/**
- * @brief Changes the priority of a system handler.
- * @note The parameters are not tested for correctness.
- *
- * @param[in] handler the system handler number
- * @param[in] prio the system handler priority mask
- */
-void nvicSetSystemHandlerPriority(uint32_t handler, uint32_t prio) {
- unsigned sh = (handler & 3) * 8;
-
- SCB_SHPR(handler >> 2) = (SCB_SHPR(handler >> 2) &
- ~(0xFF << sh)) | (prio << sh);
-}
-
-/** @} */
diff --git a/os/ports/common/ARMCMx/nvic.h b/os/ports/common/ARMCMx/nvic.h deleted file mode 100644 index 5ebff94cd..000000000 --- a/os/ports/common/ARMCMx/nvic.h +++ /dev/null @@ -1,293 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file common/ARMCMx/nvic.h
- * @brief Cortex-Mx NVIC support macros and structures.
- *
- * @addtogroup COMMON_ARMCMx_NVIC
- * @{
- */
-
-#ifndef _NVIC_H_
-#define _NVIC_H_
-
-/**
- * @name System vector numbers
- * @{
- */
-#define HANDLER_MEM_MANAGE 0 /**< MEM MANAGE vector id. */
-#define HANDLER_BUS_FAULT 1 /**< BUS FAULT vector id. */
-#define HANDLER_USAGE_FAULT 2 /**< USAGE FAULT vector id. */
-#define HANDLER_RESERVED_3 3
-#define HANDLER_RESERVED_4 4
-#define HANDLER_RESERVED_5 5
-#define HANDLER_RESERVED_6 6
-#define HANDLER_SVCALL 7 /**< SVCALL vector id. */
-#define HANDLER_DEBUG_MONITOR 8 /**< DEBUG MONITOR vector id. */
-#define HANDLER_RESERVED_9 9
-#define HANDLER_PENDSV 10 /**< PENDSV vector id. */
-#define HANDLER_SYSTICK 11 /**< SYS TCK vector id. */
-/** @} */
-
-typedef volatile uint8_t IOREG8; /**< 8 bits I/O register type. */
-typedef volatile uint32_t IOREG32; /**< 32 bits I/O register type. */
-
-/**
- * @brief NVIC ITCR register.
- */
-#define NVIC_ITCR (*((IOREG32 *)0xE000E004U))
-
-/**
- * @brief Structure representing the SYSTICK I/O space.
- */
-typedef struct {
- IOREG32 CSR;
- IOREG32 RVR;
- IOREG32 CVR;
- IOREG32 CBVR;
-} CMx_ST;
-
-/**
- * @brief SYSTICK peripheral base address.
- */
-#define STBase ((CMx_ST *)0xE000E010U)
-#define ST_CSR (STBase->CSR)
-#define ST_RVR (STBase->RVR)
-#define ST_CVR (STBase->CVR)
-#define ST_CBVR (STBase->CBVR)
-
-#define CSR_ENABLE_MASK (0x1U << 0)
-#define ENABLE_OFF_BITS (0U << 0)
-#define ENABLE_ON_BITS (1U << 0)
-#define CSR_TICKINT_MASK (0x1U << 1)
-#define TICKINT_DISABLED_BITS (0U << 1)
-#define TICKINT_ENABLED_BITS (1U << 1)
-#define CSR_CLKSOURCE_MASK (0x1U << 2)
-#define CLKSOURCE_EXT_BITS (0U << 2)
-#define CLKSOURCE_CORE_BITS (1U << 2)
-#define CSR_COUNTFLAG_MASK (0x1U << 16)
-
-#define RVR_RELOAD_MASK (0xFFFFFFU << 0)
-
-#define CVR_CURRENT_MASK (0xFFFFFFU << 0)
-
-#define CBVR_TENMS_MASK (0xFFFFFFU << 0)
-#define CBVR_SKEW_MASK (0x1U << 30)
-#define CBVR_NOREF_MASK (0x1U << 31)
-
-/**
- * @brief Structure representing the NVIC I/O space.
- */
-typedef struct {
- IOREG32 ISER[8];
- IOREG32 unused1[24];
- IOREG32 ICER[8];
- IOREG32 unused2[24];
- IOREG32 ISPR[8];
- IOREG32 unused3[24];
- IOREG32 ICPR[8];
- IOREG32 unused4[24];
- IOREG32 IABR[8];
- IOREG32 unused5[56];
- IOREG32 IPR[60];
- IOREG32 unused6[644];
- IOREG32 STIR;
-} CMx_NVIC;
-
-/**
- * @brief NVIC peripheral base address.
- */
-#define NVICBase ((CMx_NVIC *)0xE000E100U)
-#define NVIC_ISER(n) (NVICBase->ISER[n])
-#define NVIC_ICER(n) (NVICBase->ICER[n])
-#define NVIC_ISPR(n) (NVICBase->ISPR[n])
-#define NVIC_ICPR(n) (NVICBase->ICPR[n])
-#define NVIC_IABR(n) (NVICBase->IABR[n])
-#define NVIC_IPR(n) (NVICBase->IPR[n])
-#define NVIC_STIR (NVICBase->STIR)
-
-/**
- * @brief Structure representing the System Control Block I/O space.
- */
-typedef struct {
- IOREG32 CPUID;
- IOREG32 ICSR;
- IOREG32 VTOR;
- IOREG32 AIRCR;
- IOREG32 SCR;
- IOREG32 CCR;
- IOREG32 SHPR[3];
- IOREG32 SHCSR;
- IOREG32 CFSR;
- IOREG32 HFSR;
- IOREG32 DFSR;
- IOREG32 MMFAR;
- IOREG32 BFAR;
- IOREG32 AFSR;
- IOREG32 PFR[2];
- IOREG32 DFR;
- IOREG32 ADR;
- IOREG32 MMFR[4];
- IOREG32 SAR[5];
- IOREG32 unused1[5];
- IOREG32 CPACR;
-} CMx_SCB;
-
-/**
- * @brief SCB peripheral base address.
- */
-#define SCBBase ((CMx_SCB *)0xE000ED00U)
-#define SCB_CPUID (SCBBase->CPUID)
-#define SCB_ICSR (SCBBase->ICSR)
-#define SCB_VTOR (SCBBase->VTOR)
-#define SCB_AIRCR (SCBBase->AIRCR)
-#define SCB_SCR (SCBBase->SCR)
-#define SCB_CCR (SCBBase->CCR)
-#define SCB_SHPR(n) (SCBBase->SHPR[n])
-#define SCB_SHCSR (SCBBase->SHCSR)
-#define SCB_CFSR (SCBBase->CFSR)
-#define SCB_HFSR (SCBBase->HFSR)
-#define SCB_DFSR (SCBBase->DFSR)
-#define SCB_MMFAR (SCBBase->MMFAR)
-#define SCB_BFAR (SCBBase->BFAR)
-#define SCB_AFSR (SCBBase->AFSR)
-#define SCB_PFR(n) (SCBBase->PFR[n])
-#define SCB_DFR (SCBBase->DFR)
-#define SCB_ADR (SCBBase->ADR)
-#define SCB_MMFR(n) (SCBBase->MMFR[n])
-#define SCB_SAR(n) (SCBBase->SAR[n])
-#define SCB_CPACR (SCBBase->CPACR)
-
-#define ICSR_VECTACTIVE_MASK (0x1FFU << 0)
-#define ICSR_RETTOBASE (0x1U << 11)
-#define ICSR_VECTPENDING_MASK (0x1FFU << 12)
-#define ICSR_ISRPENDING (0x1U << 22)
-#define ICSR_ISRPREEMPT (0x1U << 23)
-#define ICSR_PENDSTCLR (0x1U << 25)
-#define ICSR_PENDSTSET (0x1U << 26)
-#define ICSR_PENDSVCLR (0x1U << 27)
-#define ICSR_PENDSVSET (0x1U << 28)
-#define ICSR_NMIPENDSET (0x1U << 31)
-
-#define AIRCR_VECTKEY 0x05FA0000U
-#define AIRCR_PRIGROUP_MASK (0x7U << 8)
-#define AIRCR_PRIGROUP(n) ((n) << 8)
-
-/**
- * @brief Structure representing the FPU I/O space.
- */
-typedef struct {
- IOREG32 unused1[1];
- IOREG32 FPCCR;
- IOREG32 FPCAR;
- IOREG32 FPDSCR;
- IOREG32 MVFR0;
- IOREG32 MVFR1;
-} CMx_FPU;
-
-/**
- * @brief FPU peripheral base address.
- */
-#define FPUBase ((CMx_FPU *)0xE000EF30U)
-#define SCB_FPCCR (FPUBase->FPCCR)
-#define SCB_FPCAR (FPUBase->FPCAR)
-#define SCB_FPDSCR (FPUBase->FPDSCR)
-#define SCB_MVFR0 (FPUBase->MVFR0)
-#define SCB_MVFR1 (FPUBase->MVFR1)
-
-#define FPCCR_ASPEN (0x1U << 31)
-#define FPCCR_LSPEN (0x1U << 30)
-#define FPCCR_MONRDY (0x1U << 8)
-#define FPCCR_BFRDY (0x1U << 6)
-#define FPCCR_MMRDY (0x1U << 5)
-#define FPCCR_HFRDY (0x1U << 4)
-#define FPCCR_THREAD (0x1U << 3)
-#define FPCCR_USER (0x1U << 1)
-#define FPCCR_LSPACT (0x1U << 0)
-
-#define FPDSCR_AHP (0x1U << 26)
-#define FPDSCR_DN (0x1U << 25)
-#define FPDSCR_FZ (0x1U << 24)
-#define FPDSCR_RMODE(n) ((n##U) << 22)
-
-/**
- * @brief Structure representing the SCS I/O space.
- */
-typedef struct {
- IOREG32 DHCSR;
- IOREG32 DCRSR;
- IOREG32 DCRDR;
- IOREG32 DEMCR;
-} CMx_SCS;
-
-/**
- * @brief SCS peripheral base address.
- */
-#define SCSBase ((CMx_SCS *)0xE000EDF0U)
-#define SCS_DHCSR (SCSBase->DHCSR)
-#define SCS_DCRSR (SCSBase->DCRSR)
-#define SCS_DCRDR (SCSBase->DCRDR)
-#define SCS_DEMCR (SCSBase->DEMCR)
-
-#define SCS_DEMCR_TRCENA (0x1U << 24)
-
-/**
- * @brief Structure representing the DWT I/O space.
- */
-typedef struct {
- IOREG32 CTRL;
- IOREG32 CYCCNT;
- IOREG32 CPICNT;
- IOREG32 EXCCNT;
- IOREG32 SLEEPCNT;
- IOREG32 LSUCNT;
- IOREG32 FOLDCNT;
- IOREG32 PCSR;
-} CMx_DWT;
-
-/**
- * @brief DWT peripheral base address.
- */
-#define DWTBase ((CMx_DWT *)0xE0001000U)
-#define DWT_CTRL (DWTBase->CTRL)
-#define DWT_CYCCNT (DWTBase->CYCCNT)
-#define DWT_CPICNT (DWTBase->CPICNT)
-#define DWT_EXCCNT (DWTBase->EXCCNT)
-#define DWT_SLEEPCNT (DWTBase->SLEEPCNT)
-#define DWT_LSUCNT (DWTBase->LSUCNT)
-#define DWT_FOLDCNT (DWTBase->FOLDCNT)
-#define DWT_PCSR (DWTBase->PCSR)
-
-#define DWT_CTRL_CYCCNTENA (0x1U << 0)
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void nvicEnableVector(uint32_t n, uint32_t prio);
- void nvicDisableVector(uint32_t n);
- void nvicSetSystemHandlerPriority(uint32_t handler, uint32_t prio);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* _NVIC_H_ */
-
-/** @} */
diff --git a/os/ports/common/ARMCMx/port.dox b/os/ports/common/ARMCMx/port.dox deleted file mode 100644 index abb6a42e7..000000000 --- a/os/ports/common/ARMCMx/port.dox +++ /dev/null @@ -1,34 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup COMMON_ARMCMx ARM Cortex-Mx Common Code
- * @ingroup port_common
- */
-
-/**
- * @defgroup COMMON_ARMCMx_NVIC NVIC Support
- * @details ARM Cortex-Mx NVIC support.
- *
- * @ingroup COMMON_ARMCMx
- */
-
- /** @} */
-
diff --git a/os/ports/cosmic/STM8/chcore.c b/os/ports/cosmic/STM8/chcore.c deleted file mode 100644 index 69fce38de..000000000 --- a/os/ports/cosmic/STM8/chcore.c +++ /dev/null @@ -1,71 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file cosmic/STM8/chcore.c
- * @brief STM8 (Cosmic) architecture port code.
- *
- * @addtogroup STM8_COSMIC_CORE
- * @{
- */
-
-#include "ch.h"
-
-@tiny ReadyList rlist;
-
-/**
- * @brief Performs a context switch between two threads.
- *
- * @param otp the thread to be switched out
- */
-void _port_switch(Thread *otp) {
-
- _asm(" xref _rlist \n"
- " ldw y,sp \n"
- " ldw (5,x),y \n"
- " ldw x,_rlist+5 \n"
- " ldw x,(5,x) \n"
- " ldw sp,x \n", otp);
-}
-
-/**
- * @brief Thread start code.
- */
-void _port_thread_start(void) {
-
- chSysUnlock();
- _asm(" popw x \n");
-}
-
-/**
- * @brief Halts the system.
- * @details This function is invoked by the operating system when an
- * unrecoverable error is detected (for example because a programming
- * error in the application code that triggers an assertion while in
- * debug mode).
- */
-void port_halt(void) {
-
- port_disable();
- while (TRUE) {
- }
-}
-
-/** @} */
diff --git a/os/ports/cosmic/STM8/chcore.h b/os/ports/cosmic/STM8/chcore.h deleted file mode 100644 index 9610d1549..000000000 --- a/os/ports/cosmic/STM8/chcore.h +++ /dev/null @@ -1,332 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file cosmic/STM8/chcore.h
- * @brief STM8 (Cosmic) architecture port macros and structures.
- *
- * @addtogroup STM8_COSMIC_CORE
- * @{
- */
-
-#ifndef _CHCORE_H_
-#define _CHCORE_H_
-
-#if CH_DBG_ENABLE_STACK_CHECK
-#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
-#endif
-
-/*===========================================================================*/
-/* Port configurable parameters. */
-/*===========================================================================*/
-
-/**
- * @brief Enables the use of the WFI instruction in the idle thread loop.
- */
-#ifndef STM8_ENABLE_WFI_IDLE
-#define STM8_ENABLE_WFI_IDLE FALSE
-#endif
-
-/*===========================================================================*/
-/* Port exported info. */
-/*===========================================================================*/
-
-/**
- * @brief Unique macro for the implemented architecture.
- */
-#define CH_ARCHITECTURE_STM8
-
-/**
- * @brief Name of the implemented architecture.
- */
-#define CH_ARCHITECTURE_NAME "STM8"
-
-/**
- * @brief Name of the compiler supported by this port.
- */
-#define CH_COMPILER_NAME "Cosmic"
-
-/**
- * @brief Port-specific information string.
- */
-#define CH_PORT_INFO "None"
-
-/*===========================================================================*/
-/* Port implementation part. */
-/*===========================================================================*/
-
-/**
- * @brief Base type for stack alignment.
- * @note No alignment constraints so uint8_t.
- */
-typedef uint8_t stkalign_t;
-
-/**
- * @brief Generic STM8 function pointer.
- * @note It is used to allocate the proper size for return addresses in
- * context-related structures.
- */
-typedef void (*stm8func_t)(void);
-
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note The structure requires one dummy field at its start because the
- * stack is handled as preincremented/postdecremented.
- */
-struct extctx {
- uint8_t _next;
- uint8_t c_lreg[4];
- uint8_t c_y[3];
- uint8_t c_x[3];
- uint8_t cc;
- uint8_t a;
- uint16_t x;
- uint16_t y;
- uint8_t pce;
- uint8_t pch;
- uint8_t pcl;
-};
-
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching..
- * @note The structure requires one dummy field at its start because the
- * stack is handled as preincremented/postdecremented.
- */
-struct intctx {
- uint8_t _next;
- stm8func_t pc; /* Function pointer sized return address. */
-};
-
-/**
- * @brief Platform dependent part of the @p Thread structure.
- * @details This structure usually contains just the saved stack pointer
- * defined as a pointer to a @p intctx structure.
- */
-struct context {
- struct intctx *sp;
-};
-
-/**
- * @brief Start context.
- * @details This context is the stack organization for the trampoline code
- * @p _port_thread_start().
- */
-struct stm8_startctx {
- uint8_t _next;
- stm8func_t ts; /* Trampoline address. */
- void *arg; /* Thread argument. */
- stm8func_t pc; /* Thread function address. */
- stm8func_t ret; /* chThdExit() address. */
-};
-
-/**
- * @brief Platform dependent part of the @p chThdCreateI() API.
- * @details This code usually setup the context switching frame represented
- * by an @p intctx structure.
- */
-#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
- struct stm8_startctx *scp; \
- scp = (struct stm8_startctx *)((uint8_t *)workspace + wsize - \
- sizeof(struct stm8_startctx)); \
- scp->ts = _port_thread_start; \
- scp->arg = arg; \
- scp->pc = (stm8func_t)pf; \
- scp->ret = (stm8func_t)chThdExit; \
- tp->p_ctx.sp = (struct intctx *)scp; \
-}
-
-/**
- * @brief Stack size for the system idle thread.
- * @details This size depends on the idle thread implementation, usually
- * the idle thread should take no more space than those reserved
- * by @p PORT_INT_REQUIRED_STACK.
- */
-#ifndef PORT_IDLE_THREAD_STACK_SIZE
-#define PORT_IDLE_THREAD_STACK_SIZE 0
-#endif
-
-/**
- * @brief Per-thread stack overhead for interrupts servicing.
- * @details This is a safe value, you may trim it down after reading the
- * right size in the map file.
- */
-#ifndef PORT_INT_REQUIRED_STACK
-#define PORT_INT_REQUIRED_STACK 48
-#endif
-
-/**
- * @brief Enforces a correct alignment for a stack area size value.
- */
-#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
-
-/**
- * @brief Computes the thread working area global size.
- */
-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
- (sizeof(struct intctx) - 1) + \
- (sizeof(struct extctx) - 1) + \
- (n) + (PORT_INT_REQUIRED_STACK))
-
-/**
- * @brief Static working area allocation.
- * @details This macro is used to allocate a static thread working area
- * aligned as both position and size.
- */
-#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
-
-/**
- * @brief IRQ prologue code.
- * @details This macro must be inserted at the start of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_PROLOGUE()
-
-/**
- * @brief IRQ epilogue code.
- * @details This macro must be inserted at the end of all IRQ handlers
- * enabled to invoke system APIs.
- */
-#define PORT_IRQ_EPILOGUE() { \
- dbg_check_lock(); \
- if (chSchIsPreemptionRequired()) \
- chSchDoReschedule(); \
- dbg_check_unlock(); \
-}
-
-/**
- * @brief IRQ handler function declaration.
- * @note @p id can be a function name or a vector number depending on the
- * port implementation.
- */
-#define PORT_IRQ_HANDLER(id) @far @interrupt @svlreg void vector##id(void)
-
-/**
- * @brief Port-related initialization code.
- * @note None in this port.
- */
-#define port_init()
-
-/**
- * @brief Kernel-lock action.
- * @note Implemented as global interrupts disable.
- */
-#define port_lock() _asm("sim")
-
-/**
- * @brief Kernel-unlock action.
- * @note Implemented as global interrupts enable.
- */
-#define port_unlock() _asm("rim")
-
-/**
- * @brief Kernel-lock action from an interrupt handler.
- * @note This function is empty in this port.
- */
-#define port_lock_from_isr()
-
-/**
- * @brief Kernel-unlock action from an interrupt handler.
- * @note This function is empty in this port.
- */
-#define port_unlock_from_isr()
-
-/**
- * @brief Disables all the interrupt sources.
- * @note Implemented as global interrupts disable.
- * @note Of course non-maskable interrupt sources are not included.
- */
-#define port_disable() _asm("sim")
-
-/**
- * @brief Disables the interrupt sources that are not supposed to preempt
- * the kernel.
- * @note Same as @p port_disable() in this port, there is no difference
- * between the two states.
- */
-#define port_suspend() _asm("sim")
-
-/**
- * @brief Enables all the interrupt sources.
- * @note Implemented as global interrupt enable.
- */
-#define port_enable() _asm("rim")
-
-/**
- * @brief Enters an architecture-dependent halt mode.
- * @note Implemented with the specific "wfi" instruction.
- */
-#if STM8_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
-#define port_wait_for_interrupt() _asm("wfi")
-#else
-#define port_wait_for_interrupt()
-#endif
-
-/**
- * @brief Performs a context switch between two threads.
- * @details This is the most critical code in any port, this function
- * is responsible for the context switch between 2 threads.
- * @note Implemented as a call to a low level assembler routine.
- *
- * @param ntp the thread to be switched in
- * @param otp the thread to be switched out
- */
-#define port_switch(ntp, otp) _port_switch(otp)
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _port_switch(Thread *otp);
- void _port_thread_start(void);
- void port_halt(void);
-#ifdef __cplusplus
-}
-#endif
-
-/*===========================================================================*/
-/* Scheduler captured code. */
-/*===========================================================================*/
-
-#define PORT_OPTIMIZED_RLIST_VAR
-#define PORT_OPTIMIZED_RLIST_EXT
-#define PORT_OPTIMIZED_READYLIST_STRUCT
-
-typedef struct {
- ThreadsQueue r_queue;
- tprio_t r_prio;
- Thread *r_current;
-#if CH_CFG_USE_REGISTRY
- Thread *r_newer;
- Thread *r_older;
-#endif
- /* End of the fields shared with the Thread structure.*/
-#if CH_CFG_TIME_QUANTUM > 0
- cnt_t r_preempt;
-#endif
-} ReadyList;
-
-@tiny extern ReadyList rlist;
-
-#endif /* _CHCORE_H_ */
-
-/** @} */
diff --git a/os/ports/cosmic/STM8/chtypes.h b/os/ports/cosmic/STM8/chtypes.h deleted file mode 100644 index efd25964e..000000000 --- a/os/ports/cosmic/STM8/chtypes.h +++ /dev/null @@ -1,97 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file cosmic/STM8/chtypes.h
- * @brief STM8 (Cosmic) port system types.
- *
- * @addtogroup STM8_COSMIC_CORE
- * @{
- */
-
-#ifndef _CHTYPES_H_
-#define _CHTYPES_H_
-
-#include <stddef.h>
-
-typedef unsigned char uint8t; /**< C99-style boolean. */
-typedef unsigned char uint8_t; /**< C99-style 8 bits unsigned. */
-typedef signed char int8_t; /**< C99-style 8 bits signed. */
-typedef unsigned int uint16_t; /**< C99-style 16 bits unsigned. */
-typedef signed int int16_t; /**< C99-style 16 bits signed. */
-typedef unsigned long uint32_t; /**< C99-style 32 bits unsigned. */
-typedef signed long int32_t; /**< C99-style 32 bits signed. */
-typedef uint8_t uint_fast8_t; /**< C99-style 8 bits unsigned. */
-typedef uint16_t uint_fast16_t; /**< C99-style 16 bits unsigned. */
-typedef uint32_t uint_fast32_t; /**< C99-style 32 bits unsigned. */
-
-#if !defined(false) || defined(__DOXYGEN__)
-#define false 0
-#endif
-
-#if !defined(true) || defined(__DOXYGEN__)
-#define true (!false)
-#endif
-
-typedef bool bool_t; /**< Fast boolean type. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter. */
-typedef uint8_t tprio_t; /**< Thread priority. */
-typedef int16_t msg_t; /**< Inter-thread message. */
-typedef int8_t eventid_t; /**< Event Id. */
-typedef uint8_t eventmask_t; /**< Event mask. */
-typedef uint8_t flagsmask_t; /**< Event flags. */
-typedef uint16_t systime_t; /**< System time. */
-typedef int8_t cnt_t; /**< Resources counter. */
-
-/**
- * @brief Inline function modifier.
- */
-#define INLINE @inline
-
-/**
- * @brief ROM constant modifier.
- * @note Uses the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Packed structure modifier (within).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_STRUCT
-
-/**
- * @brief Packed structure modifier (before).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_BEGIN
-
-/**
- * @brief Packed structure modifier (after).
- * @note Empty in this port.
- */
-#define PACK_STRUCT_END
-
-#endif /* _CHTYPES_H_ */
-
-/** @} */
diff --git a/os/ports/cosmic/STM8/port.dox b/os/ports/cosmic/STM8/port.dox deleted file mode 100644 index e337fe9d7..000000000 --- a/os/ports/cosmic/STM8/port.dox +++ /dev/null @@ -1,95 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup STM8_COSMIC STM8
- * @details STM8 port for the Cosmic C compiler.
- *
- * @section STM8_COSMIC_INTRO Introduction
- * This port supports all STM8 8 bits MCUs.
- *
- * @section STM8_COSMIC_STATES Mapping of the System States in the STM8 port
- * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8
- * port:
- * - <b>Init</b>. This state is represented by the startup code and the
- * initialization code before @p chSysInit() is executed. It has not a
- * special hardware state associated.
- * - <b>Normal</b>. This is the state the system has after executing
- * @p chSysInit(). Interrupts are enabled.
- * - <b>Suspended</b>. Interrupts are disabled.
- * - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
- * Suspended state because there are no fast interrupts in this architecture.
- * - <b>Sleep</b>. Implemented with "wait" instruction insertion in the idle
- * loop.
- * - <b>S-Locked</b>. Interrupts are disabled.
- * - <b>I-Locked</b>. This state is equivalent to the SRI state, the
- * @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
- * order to formally change state because this may change).
- * - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
- * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
- * - <b>Serving Non-Maskable Interrupt</b>. The STM8 ha non
- * maskable interrupt sources that can be associated to this state.
- * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- * .
- * @section STM8_COSMIC_NOTES The STM8 port notes
- * - The STM8 does not have a dedicated interrupt stack, make sure to reserve
- * enough stack space for interrupts in each thread stack. This can be done
- * by modifying the @p INT_REQUIRED_STACK macro into
- * <b>./os/ports/cosmic/STM8/chcore.h</b>.
- * - The kernel currently supports only the small memory model so the
- * kernel files should be loaded in the first 64K. Note that this is not
- * a problem because upper addresses can be used by the user code, the
- * kernel can context switch code running there.
- * - The configuration option @p CH_CFG_OPTIMIZE_SPEED is not currently supported
- * because the missing support of the @p inline "C" keyword in the
- * compiler.
- * .
- * @ingroup cosmic
- */
-
-/**
- * @defgroup STM8_COSMIC_CONF Configuration Options
- * @details STM8 Configuration Options. The STM8 port allows some
- * architecture-specific configurations settings that can be overridden
- * by redefining them in @p chconf.h. Usually there is no need to change
- * the default values.
- * - @p INT_REQUIRED_STACK, this value represent the amount of stack space
- * used by the interrupt handlers.<br>
- * The default for this value is @p 48, this space is allocated for each
- * thread so be careful in order to not waste precious RAM space.
- * .
- * @ingroup STM8_COSMIC
- */
-
-/**
- * @defgroup STM8_COSMIC_CORE Core Port Implementation
- * @details STM8 specific port code, structures and macros.
- *
- * @ingroup STM8_COSMIC
- */
-
- /**
- * @defgroup STM8_COSMIC_STARTUP Startup Support
- * @details ChibiOS/RT doed not provide startup files for the STM8, there
- * are no special startup requirement so the normal toolchain-provided
- * startup files can be used.
- *
- * @ingroup STM8_COSMIC
- */
diff --git a/os/ports/ports.dox b/os/ports/ports.dox deleted file mode 100644 index e2f834441..000000000 --- a/os/ports/ports.dox +++ /dev/null @@ -1,67 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011,2012,2013 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @defgroup ports Ports
- * This section describes the technical details of the various supported
- * ChibiOS/RT ports.
- */
-
-/**
- * @defgroup port_common Common Code
- * Code common to all compilers.
- *
- * @ingroup ports
- */
-
-/**
- * @defgroup gcc GCC Ports
- * Ports for the GCC compiler or derivatives.
- *
- * @ingroup ports
- */
-
-/**
- * @defgroup iar IAR Ports
- * Ports for the IAR compiler.
- *
- * @ingroup ports
- */
-
-/**
- * @defgroup rvct RVCT Ports
- * Ports for the RVCT compiler.
- *
- * @ingroup ports
- */
-
-/**
- * @defgroup cosmic Cosmic Compiler Ports
- * Ports for the Compiler compiler.
- *
- * @ingroup ports
- */
-
-/**
- * @defgroup raisonance Raisonance Compiler Ports
- * Ports for the Raisonance compiler.
- *
- * @ingroup ports
- */
|