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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-10-03 08:45:34 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-10-03 08:45:34 +0000
commit1b56dd572e01e2460c149ac6835db7bdf175b305 (patch)
tree26d0f7cdf91e9ee96eef86864cfdfc0e19622b9c /os/ports
parentc62d4d6407ef7ec46ff6258fe7390de645810a10 (diff)
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Documentation related fixes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2225 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports')
-rw-r--r--os/ports/GCC/ARMCMx/chcore.h21
-rw-r--r--os/ports/GCC/ARMCMx/chcore_v6m.h12
-rw-r--r--os/ports/GCC/ARMCMx/chcore_v7m.h13
-rw-r--r--os/ports/GCC/ARMCMx/port.dox4
4 files changed, 23 insertions, 27 deletions
diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h
index 4995013e5..3581a6dea 100644
--- a/os/ports/GCC/ARMCMx/chcore.h
+++ b/os/ports/GCC/ARMCMx/chcore.h
@@ -261,6 +261,27 @@ typedef uint32_t stkalign_t __attribute__ ((aligned (4)));
*/
typedef void *regarm_t;
+#if defined(__DOXYGEN__)
+/**
+ * @brief Interrupt saved context.
+ * @details This structure represents the stack frame saved during a
+ * preemption-capable interrupt handler.
+ * @note It is implemented to match the Cortex-Mx exception context.
+ */
+struct extctx {
+ /* Dummy definition, just for Doxygen.*/
+};
+
+/**
+ * @brief System saved context.
+ * @details This structure represents the inner stack frame during a context
+ * switching.
+ */
+struct intctx {
+ /* Dummy definition, just for Doxygen.*/
+};
+#endif
+
#if !defined(__DOXYGEN__)
/**
* @brief Platform dependent part of the @p Thread structure.
diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.h b/os/ports/GCC/ARMCMx/chcore_v6m.h
index a4b0e582d..5f45f581d 100644
--- a/os/ports/GCC/ARMCMx/chcore_v6m.h
+++ b/os/ports/GCC/ARMCMx/chcore_v6m.h
@@ -47,11 +47,6 @@ struct cmxctx {
};
#if !defined(__DOXYGEN__)
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- */
struct extctx {
regarm_t xpsr;
regarm_t r12;
@@ -62,14 +57,7 @@ struct extctx {
regarm_t r3;
regarm_t pc;
};
-#endif
-#if !defined(__DOXYGEN__)
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
struct intctx {
regarm_t r8;
regarm_t r9;
diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.h b/os/ports/GCC/ARMCMx/chcore_v7m.h
index 263e20e2d..2c9dd0952 100644
--- a/os/ports/GCC/ARMCMx/chcore_v7m.h
+++ b/os/ports/GCC/ARMCMx/chcore_v7m.h
@@ -33,12 +33,6 @@
/*===========================================================================*/
#if !defined(__DOXYGEN__)
-/**
- * @brief Interrupt saved context.
- * @details This structure represents the stack frame saved during a
- * preemption-capable interrupt handler.
- * @note It is implemented to match the Cortex-Mx exception context.
- */
struct extctx {
regarm_t r0;
regarm_t r1;
@@ -49,14 +43,7 @@ struct extctx {
regarm_t pc;
regarm_t xpsr;
};
-#endif
-#if !defined(__DOXYGEN__)
-/**
- * @brief System saved context.
- * @details This structure represents the inner stack frame during a context
- * switching.
- */
struct intctx {
regarm_t r4;
regarm_t r5;
diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox
index f7a51dd2c..3556d3196 100644
--- a/os/ports/GCC/ARMCMx/port.dox
+++ b/os/ports/GCC/ARMCMx/port.dox
@@ -26,7 +26,7 @@
* architectures.
*
* @section ARMCMx_STATES_A System logical states in ARMv6-M mode
- * The ChibiOS/RT logical system states are mapped as follow in the ARM
+ * The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM
* Cortex-M0 port:
* - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a
@@ -60,7 +60,7 @@
* was running when @p chSysHalt() was invoked.
*
* @section ARMCMx_STATES_B System logical states in ARMv7-M mode
- * The ChibiOS/RT logical system states are mapped as follow in the ARM
+ * The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM
* Cortex-M3 port:
* - <b>Init</b>. This state is represented by the startup code and the
* initialization code before @p chSysInit() is executed. It has not a