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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-08-13 07:06:02 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-08-13 07:06:02 +0000 |
| commit | aaad958769e757093a258cfdd5c75f515534fd7a (patch) | |
| tree | d58c08fc4a4c4b32a7eb8e14d5b58e4ddde70a8e /os/ports/RVCT/ARMCMx | |
| parent | 43752ee8d132fc57028a9ff15156c5bfcd81c013 (diff) | |
| download | ChibiOS-aaad958769e757093a258cfdd5c75f515534fd7a.tar.gz ChibiOS-aaad958769e757093a258cfdd5c75f515534fd7a.tar.bz2 ChibiOS-aaad958769e757093a258cfdd5c75f515534fd7a.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3224 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/RVCT/ARMCMx')
| -rw-r--r-- | os/ports/RVCT/ARMCMx/chcore.h | 3 | ||||
| -rw-r--r-- | os/ports/RVCT/ARMCMx/chcoreasm_v6m.s | 8 | ||||
| -rw-r--r-- | os/ports/RVCT/ARMCMx/chcoreasm_v7m.s | 8 |
3 files changed, 10 insertions, 9 deletions
diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h index 42b397e93..7c4e82613 100644 --- a/os/ports/RVCT/ARMCMx/chcore.h +++ b/os/ports/RVCT/ARMCMx/chcore.h @@ -116,7 +116,7 @@ * separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero.
* @note In this port it is conservatively set to 16 because the function
- * @p chSchDoRescheduleI() can have a stack frame, expecially with
+ * @p chSchDoReschedule() can have a stack frame, expecially with
* compiler optimizations disabled.
*/
#ifndef PORT_INT_REQUIRED_STACK
@@ -227,6 +227,7 @@ struct intctx { /**
* @brief Platform dependent part of the @p Thread structure.
+
* @details In this port the structure just holds a pointer to the @p intctx
* structure representing the stack pointer at context switch time.
*/
diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s index 579680421..cf67d82c2 100644 --- a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s +++ b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s @@ -34,8 +34,8 @@ SCB_ICSR EQU 0xE000ED04 AREA |.text|, CODE, READONLY
IMPORT chThdExit
- IMPORT chSchIsRescRequiredExI
- IMPORT chSchDoRescheduleI
+ IMPORT chSchIsPreemptionRequired
+ IMPORT chSchDoReschedule
/*
* Performs a context switch between two threads.
@@ -109,10 +109,10 @@ PendSVVector PROC */
EXPORT _port_switch_from_isr
_port_switch_from_isr PROC
- bl chSchIsRescRequiredExI
+ bl chSchIsPreemptionRequired
cmp r0, #0
beq noresch
- bl chSchDoRescheduleI
+ bl chSchDoReschedule
noresch
ldr r2, =SCB_ICSR
movs r3, #128
diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s index f6acf2968..db2c747ca 100644 --- a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s +++ b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s @@ -36,8 +36,8 @@ ICSR_PENDSVSET EQU 0x10000000 AREA |.text|, CODE, READONLY
IMPORT chThdExit
- IMPORT chSchIsRescRequiredExI
- IMPORT chSchDoRescheduleI
+ IMPORT chSchIsPreemptionRequired
+ IMPORT chSchDoReschedule
/*
* Performs a context switch between two threads.
@@ -73,9 +73,9 @@ _port_thread_start PROC */
EXPORT _port_switch_from_isr
_port_switch_from_isr PROC
- bl chSchIsRescRequiredExI
+ bl chSchIsPreemptionRequired
cbz r0, noreschedule
- bl chSchDoRescheduleI
+ bl chSchDoReschedule
noreschedule
#if CORTEX_SIMPLIFIED_PRIORITY
mov r3, #SCB_ICSR :AND: 0xFFFF
|