git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3224 35acf78f-673a-0410-8e92-d51de3d6d3f4

21 files changed, 136 insertions, 106 deletions

diff --git a/os/hal/platforms/Posix/hal_lld.c b/os/hal/platforms/Posix/hal_lld.c
index 1eb0af355..8b59d992b 100644
--- a/os/hal/platforms/Posix/hal_lld.c
+++ b/os/hal/platforms/Posix/hal_lld.c
@@ -78,8 +78,8 @@ void ChkIntSources(void) {
 

 #if HAL_USE_SERIAL

   if (sd_lld_interrupt_pending()) {

-    if (chSchIsRescRequiredExI())

-      chSchDoRescheduleI();

+    if (chSchIsPreemptionRequired())

+      chSchDoReschedule();

     return;

   }

 #endif

@@ -88,8 +88,8 @@ void ChkIntSources(void) {
   if (timercmp(&tv, &nextcnt, >=)) {

     timeradd(&nextcnt, &tick, &nextcnt);

     chSysTimerHandlerI();

-    if (chSchIsRescRequiredExI())

-      chSchDoRescheduleI();

+    if (chSchIsPreemptionRequired())

+      chSchDoReschedule();

   }

 }

 

diff --git a/os/hal/platforms/Win32/hal_lld.c b/os/hal/platforms/Win32/hal_lld.c
index 24a11f51c..5906e372c 100644
--- a/os/hal/platforms/Win32/hal_lld.c
+++ b/os/hal/platforms/Win32/hal_lld.c
@@ -83,8 +83,8 @@ void ChkIntSources(void) {
 

 #if HAL_USE_SERIAL

   if (sd_lld_interrupt_pending()) {

-    if (chSchIsRescRequiredExI())

-      chSchDoRescheduleI();

+    if (chSchIsPreemptionRequired())

+      chSchDoReschedule();

     return;

   }

 #endif

@@ -94,8 +94,8 @@ void ChkIntSources(void) {
   if (n.QuadPart > nextcnt.QuadPart) {

     nextcnt.QuadPart += slice.QuadPart;

     chSysTimerHandlerI();

-    if (chSchIsRescRequiredExI())

-      chSchDoRescheduleI();

+    if (chSchIsPreemptionRequired())

+      chSchDoReschedule();

   }

 }

 

diff --git a/os/kernel/include/chschd.h b/os/kernel/include/chschd.h
index cd545a05e..0e933e8ba 100644
--- a/os/kernel/include/chschd.h
+++ b/os/kernel/include/chschd.h
@@ -134,14 +134,14 @@ extern "C" {
 #if !defined(PORT_OPTIMIZED_WAKEUPS)

   void chSchWakeupS(Thread *tp, msg_t msg);

 #endif

-#if !defined(PORT_OPTIMIZED_DORESCHEDULEI)

-  void chSchDoRescheduleI(void);

-#endif

 #if !defined(PORT_OPTIMIZED_RESCHEDULES)

   void chSchRescheduleS(void);

 #endif

-#if !defined(PORT_OPTIMIZED_ISRESCHREQUIREDEXI)

-  bool_t chSchIsRescRequiredExI(void);

+#if !defined(PORT_OPTIMIZED_ISPREEMPTIONREQUIRED)

+  bool_t chSchIsPreemptionRequired(void);

+#endif

+#if !defined(PORT_OPTIMIZED_DORESCHEDULE)

+  void chSchDoReschedule(void);

 #endif

 #ifdef __cplusplus

 }

@@ -179,10 +179,37 @@ extern "C" {
 #if !defined(PORT_OPTIMIZED_DOYIELDS) || defined(__DOXYGEN__)

 #define chSchDoYieldS() {                                                   \

   if (chSchCanYieldS())                                                     \

-    chSchDoRescheduleI();                                                   \

+    chSchDoReschedule();                                                    \

 }

 #endif /* !defined(PORT_OPTIMIZED_DOYIELDS) */

 

+/**

+ * @brief   Inlineable preemption code.

+ * @details This is the common preemption code, this function must be invoked

+ *          exclusively from the port layer.

+ *

+ * @special

+ */

+#if (CH_TIME_QUANTUM > 0) || defined(__DOXYGEN__)

+#define chSchPreemption() {                                                 \

+  tprio_t p1 = firstprio(&rlist.r_queue);                                   \

+  tprio_t p2 = currp->p_prio;                                               \

+  if (rlist.r_preempt) {                                                    \

+    if (p1 > p2)                                                            \

+      chSchDoReschedule();                                                  \

+  }                                                                         \

+  else {                                                                    \

+    if (p1 >= p2)                                                           \

+      chSchDoReschedule();                                                  \

+  }                                                                         \

+}

+#else /* CH_TIME_QUANTUM == 0 */

+#define chSchPreemption() {                                                 \

+  if (p1 >= p2)                                                             \

+    chSchDoReschedule();                                                    \

+}

+#endif /* CH_TIME_QUANTUM == 0 */

+

 #endif /* _CHSCHD_H_ */

 

 /** @} */

diff --git a/os/kernel/include/chsys.h b/os/kernel/include/chsys.h
index 994b1301f..7c3a77d5c 100644
--- a/os/kernel/include/chsys.h
+++ b/os/kernel/include/chsys.h
@@ -66,14 +66,15 @@
 

 /**

  * @brief   Performs a context switch.

- * @note    This function should nevel be used from user code directly.

+ * @note    Not a user function, it is meant to be invoked by the scheduler

+ *          itself or from within the port layer.

  *

  * @param[in] ntp       the thread to be switched in

  * @param[in] otp       the thread to be switched out

  *

  * @special

  */

-#define chSysSwitchI(ntp, otp) {                                            \

+#define chSysSwitch(ntp, otp) {                                             \

   dbg_trace(otp);                                                           \

   port_switch(ntp, otp);                                                    \

 }

@@ -180,6 +181,8 @@
  * @brief   IRQ handler enter code.

  * @note    Usually IRQ handlers functions are also declared naked.

  * @note    On some architectures this macro can be empty.

+ *

+ * @special

  */

 #define CH_IRQ_PROLOGUE() {                                                 \

   PORT_IRQ_PROLOGUE();                                                      \

@@ -190,7 +193,9 @@
  * @brief   IRQ handler exit code.

  * @note    Usually IRQ handlers function are also declared naked.

  * @note    This macro usually performs the final reschedule by using

- *          @p chSchRescRequiredI() and @p chSchDoRescheduleI().

+ *          @p chSchIsPreemptionRequired() and @p chSchDoReschedule().

+ *

+ * @special

  */

 #define CH_IRQ_EPILOGUE() {                                                 \

   dbg_check_leave_isr();                                                    \

@@ -201,6 +206,8 @@
  * @brief   Standard normal IRQ handler declaration.

  * @note    @p id can be a function name or a vector number depending on the

  *          port implementation.

+ *

+ * @special

  */

 #define CH_IRQ_HANDLER(id) PORT_IRQ_HANDLER(id)

 

@@ -209,6 +216,8 @@
  * @note    @p id can be a function name or a vector number depending on the

  *          port implementation.

  * @note    Not all architectures support fast interrupts.

+ *

+ * @special

  */

 #define CH_FAST_IRQ_HANDLER(id) PORT_FAST_IRQ_HANDLER(id)

 

diff --git a/os/kernel/src/chschd.c b/os/kernel/src/chschd.c
index b481a0b6a..f2014b8c7 100644
--- a/os/kernel/src/chschd.c
+++ b/os/kernel/src/chschd.c
@@ -76,7 +76,6 @@ Thread *chSchReadyI(Thread *tp) {
   Thread *cp;

 

   /* Integrity checks.*/

-  chDbgCheckClassI();

   chDbgAssert((tp->p_state != THD_STATE_READY) &&

               (tp->p_state != THD_STATE_FINAL),

               "chSchReadyI(), #1",

@@ -116,7 +115,7 @@ void chSchGoSleepS(tstate_t newstate) {
 #endif

   setcurrp(fifo_remove(&rlist.r_queue));

   currp->p_state = THD_STATE_CURRENT;

-  chSysSwitchI(currp, otp);

+  chSysSwitch(currp, otp);

 }

 #endif /* !defined(PORT_OPTIMIZED_GOSLEEPS) */

 

@@ -228,37 +227,12 @@ void chSchWakeupS(Thread *ntp, msg_t msg) {
 #endif

     setcurrp(ntp);

     ntp->p_state = THD_STATE_CURRENT;

-    chSysSwitchI(ntp, otp);

+    chSysSwitch(ntp, otp);

   }

 }

 #endif /* !defined(PORT_OPTIMIZED_WAKEUPS) */

 

 /**

- * @brief   Switches to the first thread on the runnable queue.

- * @note    It is intended to be called if @p chSchRescRequiredI() evaluates

- *          to @p TRUE.

- *

- * @iclass

- */

-#if !defined(PORT_OPTIMIZED_DORESCHEDULEI) || defined(__DOXYGEN__)

-void chSchDoRescheduleI(void) {

-  Thread *otp;

-

-  chDbgCheckClassI();

-

-#if CH_TIME_QUANTUM > 0

-  rlist.r_preempt = CH_TIME_QUANTUM;

-#endif

-  otp = currp;

-  /* Picks the first thread from the ready queue and makes it current.*/

-  setcurrp(fifo_remove(&rlist.r_queue));

-  currp->p_state = THD_STATE_CURRENT;

-  chSchReadyI(otp);

-  chSysSwitchI(currp, otp);

-}

-#endif /* !defined(PORT_OPTIMIZED_DORESCHEDULEI) */

-

-/**

  * @brief   Performs a reschedule if a higher priority thread is runnable.

  * @details If a thread with a higher priority than the current thread is in

  *          the ready list then make the higher priority thread running.

@@ -271,24 +245,25 @@ void chSchRescheduleS(void) {
   chDbgCheckClassS();

 

   if (chSchIsRescRequiredI())

-    chSchDoRescheduleI();

+    chSchDoReschedule();

 }

 #endif /* !defined(PORT_OPTIMIZED_RESCHEDULES) */

 

 /**

- * @brief   Evaluates if a reschedule is required.

+ * @brief   Evaluates if preemption is required.

  * @details The decision is taken by comparing the relative priorities and

  *          depending on the state of the round robin timeout counter.

- * @note    This function is meant to be used in the timer interrupt handler

- *          where @p chVTDoTickI() is invoked.

+ * @note    Not a user function, it is meant to be invoked by the scheduler

+ *          itself or from within the port layer.

  *

- * @retval TRUE         if there is a thread that should go in running state.

- * @retval FALSE        if a reschedule is not required.

+ * @retval TRUE         if there is a thread that must go in running state

+ *                      immediately.

+ * @retval FALSE        if preemption is not required.

  *

- * @iclass

+ * @special

  */

-#if !defined(PORT_OPTIMIZED_ISRESCHREQUIREDEXI) || defined(__DOXYGEN__)

-bool_t chSchIsRescRequiredExI(void) {

+#if !defined(PORT_OPTIMIZED_ISPREEMPTIONREQUIRED) || defined(__DOXYGEN__)

+bool_t chSchIsPreemptionRequired(void) {

   tprio_t p1 = firstprio(&rlist.r_queue);

   tprio_t p2 = currp->p_prio;

 #if CH_TIME_QUANTUM > 0

@@ -303,6 +278,29 @@ bool_t chSchIsRescRequiredExI(void) {
   return p1 > p2;

 #endif

 }

-#endif /* !defined(PORT_OPTIMIZED_ISRESCHREQUIREDEXI) */

+#endif /* !defined(PORT_OPTIMIZED_ISPREEMPTIONREQUIRED) */

+

+/**

+ * @brief   Switches to the first thread on the runnable queue.

+ * @note    Not a user function, it is meant to be invoked by the scheduler

+ *          itself or from within the port layer.

+ *

+ * @special

+ */

+#if !defined(PORT_OPTIMIZED_DORESCHEDULE) || defined(__DOXYGEN__)

+void chSchDoReschedule(void) {

+  Thread *otp;

+

+#if CH_TIME_QUANTUM > 0

+  rlist.r_preempt = CH_TIME_QUANTUM;

+#endif

+  otp = currp;

+  /* Picks the first thread from the ready queue and makes it current.*/

+  setcurrp(fifo_remove(&rlist.r_queue));

+  currp->p_state = THD_STATE_CURRENT;

+  chSchReadyI(otp);

+  chSysSwitch(currp, otp);

+}

+#endif /* !defined(PORT_OPTIMIZED_DORESCHEDULE) */

 

 /** @} */

diff --git a/os/ports/GCC/ARM/chcoreasm.s b/os/ports/GCC/ARM/chcoreasm.s
index 41bd29a90..2266d3f1a 100644
--- a/os/ports/GCC/ARM/chcoreasm.s
+++ b/os/ports/GCC/ARM/chcoreasm.s
@@ -143,12 +143,12 @@ _port_switch_arm:
  *      |     R0     |  |

  *      |     PC     |  |   (user code return address)

  *      |   PSR_USR  | -+   (user code status)

- *      |    ....    | <- mk_DoRescheduleI() stack frame, optimize it for space

+ *      |    ....    | <- chSchDoReschedule() stack frame, optimize it for space

  *      |     LR     | -+   (system code return address)

  *      |     R11    |  |

  *      |     R10    |  |

  *      |     R9     |  |

- *      |     R8     |  | Internal context: mk_SwitchI() frame

+ *      |     R8     |  | Internal context: chSysSwitch() frame

  *      |    (R7)    |  |   (optional, see CH_CURRP_REGISTER_CACHE)

  *      |     R6     |  |

  *      |     R5     |  |

@@ -161,7 +161,7 @@ _port_switch_arm:
 .thumb_func

 .globl _port_irq_common

 _port_irq_common:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

         mov     lr, pc

         bx      lr

 .code 32

@@ -169,7 +169,7 @@ _port_irq_common:
 .code 32

 .globl _port_irq_common

 _port_irq_common:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

 #endif /* !THUMB_NO_INTERWORKING */

         cmp     r0, #0                          // Simply returns if a

         ldmeqfd sp!, {r0-r3, r12, lr}           // reschedule is not

@@ -190,12 +190,12 @@ _port_irq_common:
         add     r0, pc, #1

         bx      r0

 .code 16

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

         mov     lr, pc

         bx      lr

 .code 32

 #else /* !THUMB_NO_INTERWORKING */

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

 #endif /* !THUMB_NO_INTERWORKING */

 

         // Re-establish the IRQ conditions again.

diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h
index 5d47a6699..944094925 100644
--- a/os/ports/GCC/ARMCMx/chcore.h
+++ b/os/ports/GCC/ARMCMx/chcore.h
@@ -116,7 +116,7 @@
  *          separate interrupt stack and the stack space between @p intctx and

  *          @p extctx is known to be zero.

  * @note    In this port it is conservatively set to 16 because the function

- *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          @p chSchDoReschedule() can have a stack frame, expecially with

  *          compiler optimizations disabled.

  */

 #ifndef PORT_INT_REQUIRED_STACK

diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.c b/os/ports/GCC/ARMCMx/chcore_v6m.c
index 4ee3dca1a..453bc2c65 100644
--- a/os/ports/GCC/ARMCMx/chcore_v6m.c
+++ b/os/ports/GCC/ARMCMx/chcore_v6m.c
@@ -90,12 +90,8 @@ __attribute__((naked))
 #endif

 void _port_switch_from_isr(void) {

 

-  /* The calls to the debug functions are required in order to simulate the

-     correct call protocol from this peculiar code zone.*/

-  dbg_check_lock();

-  if (chSchIsRescRequiredExI())

-    chSchDoRescheduleI();

-  dbg_check_unlock();

+  if (chSchIsPreemptionRequired())

+    chSchDoReschedule();

 #if CORTEX_ALTERNATE_SWITCH

   SCB_ICSR = ICSR_PENDSVSET;

   port_unlock();

diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.c b/os/ports/GCC/ARMCMx/chcore_v7m.c
index 5f9be6f4d..e8a1ff16e 100644
--- a/os/ports/GCC/ARMCMx/chcore_v7m.c
+++ b/os/ports/GCC/ARMCMx/chcore_v7m.c
@@ -141,11 +141,9 @@ __attribute__((naked))
 #endif

 void _port_switch_from_isr(void) {

 

-  /* The calls to the debug functions are required in order to simulate the

-     correct call protocol from this peculiar code zone.*/

   dbg_check_lock();

-  if (chSchIsRescRequiredExI())

-    chSchDoRescheduleI();

+  if (chSchIsPreemptionRequired())

+    chSchDoReschedule();

   dbg_check_unlock();

 #if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)

   asm volatile ("svc     #0");

diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h
index 2d33b205d..757488948 100644
--- a/os/ports/GCC/AVR/chcore.h
+++ b/os/ports/GCC/AVR/chcore.h
@@ -215,8 +215,8 @@ struct context {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                           \

-  if (chSchIsRescRequiredExI())                                         \

-    chSchDoRescheduleI();                                               \

+  if (chSchIsPreemptionRequired())                                      \

+    chSchDoReschedule();                                                \

 }

 

 /**

diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h
index 3e3d5b5d1..bac05608c 100644
--- a/os/ports/GCC/MSP430/chcore.h
+++ b/os/ports/GCC/MSP430/chcore.h
@@ -184,8 +184,8 @@ struct context {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                           \

-  if (chSchIsRescRequiredExI())                                         \

-    chSchDoRescheduleI();                                               \

+  if (chSchIsPreemptionRequired())                                      \

+    chSchDoReschedule();                                                \

 }

 

 /**

diff --git a/os/ports/GCC/PPC/SPC56x/ivor.s b/os/ports/GCC/PPC/SPC56x/ivor.s
index 660fab5ed..03bc8b002 100644
--- a/os/ports/GCC/PPC/SPC56x/ivor.s
+++ b/os/ports/GCC/PPC/SPC56x/ivor.s
@@ -73,10 +73,10 @@ IVOR10:
 

         /* System tick handler invocation.*/

         bl          chSysTimerHandlerI

-        bl          chSchIsRescRequiredExI

+        bl          chSchIsPreemptionRequired

         cmpli       cr0, %r3, 0

         beq         cr0, .ctxrestore

-        bl          chSchDoRescheduleI

+        bl          chSchDoReschedule

         b           .ctxrestore

 

         /*

@@ -138,10 +138,10 @@ IVOR4:
         stw         %r3, 0(%r3)             /* Writing any value should do. */

 

         /* Verifies if a reschedule is required.*/

-        bl          chSchIsRescRequiredExI

+        bl          chSchIsPreemptionRequired

         cmpli       cr0, %r3, 0

         beq         cr0, .ctxrestore

-        bl          chSchDoRescheduleI

+        bl          chSchDoReschedule

 

         /* Context restore.*/

 .ctxrestore:

diff --git a/os/ports/IAR/ARMCMx/chcore.h b/os/ports/IAR/ARMCMx/chcore.h
index 5eff85f51..c3e91cc02 100644
--- a/os/ports/IAR/ARMCMx/chcore.h
+++ b/os/ports/IAR/ARMCMx/chcore.h
@@ -116,7 +116,7 @@
  *          separate interrupt stack and the stack space between @p intctx and

  *          @p extctx is known to be zero.

  * @note    In this port it is conservatively set to 16 because the function

- *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          @p chSchDoReschedule() can have a stack frame, expecially with

  *          compiler optimizations disabled.

  */

 #ifndef PORT_INT_REQUIRED_STACK

diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
index a05ce3aa1..6f6aebcaf 100644
--- a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
+++ b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
@@ -37,8 +37,8 @@ SCB_ICSR        SET     0xE000ED04
         SECTION .text:CODE:NOROOT(2)

 

         EXTERN  chThdExit

-        EXTERN  chSchIsRescRequiredExI

-        EXTERN  chSchDoRescheduleI

+        EXTERN  chSchIsPreemptionRequired

+        EXTERN  chSchDoReschedule

 

         THUMB

 

@@ -110,10 +110,10 @@ PendSVVector:
  */

         PUBLIC  _port_switch_from_isr

 _port_switch_from_isr:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

         cmp     r0, #0

         beq     noresch

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

 noresch:

         ldr     r2, =SCB_ICSR

         movs    r3, #128

diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s
index 8367fcdb0..a9318f991 100644
--- a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s
+++ b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s
@@ -39,8 +39,8 @@ ICSR_PENDSVSET  SET 0x10000000
         SECTION .text:CODE:NOROOT(2)

 

         EXTERN  chThdExit

-        EXTERN  chSchIsRescRequiredExI

-        EXTERN  chSchDoRescheduleI

+        EXTERN  chSchIsPreemptionRequired

+        EXTERN  chSchDoReschedule

 

         THUMB

 

@@ -76,9 +76,9 @@ _port_thread_start:
  */

         PUBLIC  _port_switch_from_isr

 _port_switch_from_isr:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

         cbz     r0, .L2

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

 .L2:

 #if CORTEX_SIMPLIFIED_PRIORITY

         mov     r3, #LWRD SCB_ICSR

diff --git a/os/ports/RC/STM8/chcore.h b/os/ports/RC/STM8/chcore.h
index 07b7fa0b6..e889cf1d0 100644
--- a/os/ports/RC/STM8/chcore.h
+++ b/os/ports/RC/STM8/chcore.h
@@ -206,8 +206,8 @@ struct stm8_startctx {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                               \

-  if (chSchIsRescRequiredExI())                                             \

-    chSchDoRescheduleI();                                                   \

+  if (chSchIsPreemptionRequired())                                          \

+    chSchDoReschedule();                                                    \

 }

 

 /**

diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h
index 42b397e93..7c4e82613 100644
--- a/os/ports/RVCT/ARMCMx/chcore.h
+++ b/os/ports/RVCT/ARMCMx/chcore.h
@@ -116,7 +116,7 @@
  *          separate interrupt stack and the stack space between @p intctx and

  *          @p extctx is known to be zero.

  * @note    In this port it is conservatively set to 16 because the function

- *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          @p chSchDoReschedule() can have a stack frame, expecially with

  *          compiler optimizations disabled.

  */

 #ifndef PORT_INT_REQUIRED_STACK

@@ -227,6 +227,7 @@ struct intctx {
 

 /**

  * @brief   Platform dependent part of the @p Thread structure.

+

  * @details In this port the structure just holds a pointer to the @p intctx

  *          structure representing the stack pointer at context switch time.

  */

diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
index 579680421..cf67d82c2 100644
--- a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
+++ b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
@@ -34,8 +34,8 @@ SCB_ICSR        EQU     0xE000ED04
                 AREA    |.text|, CODE, READONLY

 

                 IMPORT  chThdExit

-                IMPORT  chSchIsRescRequiredExI

-                IMPORT  chSchDoRescheduleI

+                IMPORT  chSchIsPreemptionRequired

+                IMPORT  chSchDoReschedule

 

 /*

  * Performs a context switch between two threads.

@@ -109,10 +109,10 @@ PendSVVector       PROC
  */

                 EXPORT  _port_switch_from_isr

 _port_switch_from_isr PROC

-                bl      chSchIsRescRequiredExI

+                bl      chSchIsPreemptionRequired

                 cmp     r0, #0

                 beq     noresch

-                bl      chSchDoRescheduleI

+                bl      chSchDoReschedule

 noresch

                 ldr     r2, =SCB_ICSR

                 movs    r3, #128

diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
index f6acf2968..db2c747ca 100644
--- a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
+++ b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
@@ -36,8 +36,8 @@ ICSR_PENDSVSET  EQU     0x10000000
                 AREA    |.text|, CODE, READONLY

 

                 IMPORT  chThdExit

-                IMPORT  chSchIsRescRequiredExI

-                IMPORT  chSchDoRescheduleI

+                IMPORT  chSchIsPreemptionRequired

+                IMPORT  chSchDoReschedule

 

 /*

  * Performs a context switch between two threads.

@@ -73,9 +73,9 @@ _port_thread_start PROC
  */

                 EXPORT  _port_switch_from_isr

 _port_switch_from_isr PROC

-                bl      chSchIsRescRequiredExI

+                bl      chSchIsPreemptionRequired

                 cbz     r0, noreschedule

-                bl      chSchDoRescheduleI

+                bl      chSchDoReschedule

 noreschedule

 #if CORTEX_SIMPLIFIED_PRIORITY

                 mov     r3, #SCB_ICSR :AND: 0xFFFF

diff --git a/os/ports/cosmic/STM8/chcore.h b/os/ports/cosmic/STM8/chcore.h
index 93a4c24f0..75bed68cc 100644
--- a/os/ports/cosmic/STM8/chcore.h
+++ b/os/ports/cosmic/STM8/chcore.h
@@ -203,8 +203,8 @@ struct stm8_startctx {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                               \

-  if (chSchIsRescRequiredExI())                                             \

-    chSchDoRescheduleI();                                                   \

+  if (chSchIsPreemptionRequired())                                          \

+    chSchDoReschedule();                                                    \

 }

 

 /**

diff --git a/readme.txt b/readme.txt
index d451a79f4..f55a93ae8 100644
--- a/readme.txt
+++ b/readme.txt
@@ -94,10 +94,7 @@
   useful.

 - NEW: Added a new debug option CH_DBG_SYSTEM_STATE_CHECK that ensures the

   correct API call protocol. If an API is invoked out of the correct context

-  then the kernel panics with a debug message. The extension is functional on

-  the Cortex-Mx GCC ports only in this moment.

-  (TODO: port to IAR and RVCT compilers)

-  (TODO: port to other architectures)

+  then the kernel panics with a debug message.

 - NEW: Added Eclipse ChibiOS/RT debugger plugin 1.0.5 under ./tools/eclipse.

 - NEW: The ARMCMx startup file (crt0.c) now is able to fill the stack areas

   with a filler (default behavior). This is required in order to easily assess

@@ -160,6 +157,10 @@
   not support fast interrupts (backported to 2.2.5).

 - NEW: Now the port layer exports info regarding the compiler and the port

   options. The info are printed into the test reports.

+- CHANGE: Renamed the scheduler functions chSchIsRescRequiredExI() to

+  chSchIsPreemptionRequired(), chSchDoRescheduleI() to chSchDoReschedule(),

+  chSysSwitchI() to chSysSwitch(). All those functions were special cases

+  and not regular I-class APIs.

 - CHANGE: Renamed the macros IDLE_THREAD_STACK_SIZE and INT_REQUIRED_STACK

   to PORT_IDLE_THREAD_STACK_SIZE and PORT_INT_REQUIRED_STACK for consistency.

 - CHANGE: Removed the "old" Cortex-M3 port from the code, the current port