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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-16 19:56:47 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-16 19:56:47 +0000 |
| commit | 51875dac89e323d1a0eebc301a2122903bbb58ba (patch) | |
| tree | 15400c71298bc5a48d2c4719cff2a5b3043ff6f2 /os/ports/IAR/ARMCMx | |
| parent | 527c75dbcde62e2a0bb5739f8d4eed8389ca96bf (diff) | |
| download | ChibiOS-51875dac89e323d1a0eebc301a2122903bbb58ba.tar.gz ChibiOS-51875dac89e323d1a0eebc301a2122903bbb58ba.tar.bz2 ChibiOS-51875dac89e323d1a0eebc301a2122903bbb58ba.zip | |
Fixed bug 3317500, retested impacted ports.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3047 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/IAR/ARMCMx')
| -rw-r--r-- | os/ports/IAR/ARMCMx/chcoreasm_v6m.s | 20 | ||||
| -rw-r--r-- | os/ports/IAR/ARMCMx/chcoreasm_v7m.s | 25 |
2 files changed, 17 insertions, 28 deletions
diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s index ef72de53c..a05ce3aa1 100644 --- a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s +++ b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s @@ -110,7 +110,11 @@ PendSVVector: */
PUBLIC _port_switch_from_isr
_port_switch_from_isr:
+ bl chSchIsRescRequiredExI
+ cmp r0, #0
+ beq noresch
bl chSchDoRescheduleI
+noresch:
ldr r2, =SCB_ICSR
movs r3, #128
#if CORTEX_ALTERNATE_SWITCH
@@ -129,25 +133,19 @@ waithere: */
PUBLIC _port_irq_epilogue
_port_irq_epilogue:
- push {r3, lr}
+ push {lr}
adds r0, r0, #15
- beq stillnested
+ beq skipexit
cpsid i
- bl chSchIsRescRequiredExI
- cmp r0, #0
- bne doresch
- cpsie i
-stillnested
- pop {r3, pc}
-doresch
mrs r3, PSP
subs r3, r3, #32
msr PSP, r3
ldr r2, =_port_switch_from_isr
str r2, [r3, #24]
movs r2, #128
- lsls r2, r2, #17
+ lsls r2, r2, #17
str r2, [r3, #28]
- pop {r3, pc}
+skipexit:
+ pop {pc}
END
diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s index 65531ff8c..8367fcdb0 100644 --- a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s +++ b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s @@ -76,7 +76,10 @@ _port_thread_start: */
PUBLIC _port_switch_from_isr
_port_switch_from_isr:
+ bl chSchIsRescRequiredExI
+ cbz r0, .L2
bl chSchDoRescheduleI
+.L2:
#if CORTEX_SIMPLIFIED_PRIORITY
mov r3, #LWRD SCB_ICSR
movt r3, #HWRD SCB_ICSR
@@ -102,20 +105,16 @@ _port_irq_epilogue: mov r3, #LWRD SCB_ICSR
movt r3, #HWRD SCB_ICSR
ldr r3, [r3, #0]
- tst r3, #ICSR_RETTOBASE
- bne .L7
+ ands r3, r3, #ICSR_RETTOBASE
+ bne .L8
#if CORTEX_SIMPLIFIED_PRIORITY
cpsie i
#else
- movs r3, #CORTEX_BASEPRI_DISABLED
+ /* Note, R3 is already zero.*/
msr BASEPRI, r3
#endif
bx lr
-.L7:
- push {r3, lr}
- bl chSchIsRescRequiredExI
- cmp r0, #0
- beq .L4
+.L8:
mrs r3, PSP
subs r3, r3, #EXTCTX_SIZE
msr PSP, r3
@@ -123,15 +122,7 @@ _port_irq_epilogue: str r2, [r3, #24]
mov r2, #0x01000000
str r2, [r3, #28]
- pop {r3, pc}
-.L4:
-#if CORTEX_SIMPLIFIED_PRIORITY
- cpsie i
-#else
- movs r3, #CORTEX_BASEPRI_DISABLED
- msr BASEPRI, r3
-#endif
- pop {r3, pc}
+ bx lr
/*
* SVC vector.
|