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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-11-16 16:39:22 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-11-16 16:39:22 +0000 |
| commit | aa2f5af6f01de0e2083c2c92bc4ae2fedeac847d (patch) | |
| tree | 2e961919bddaa06ec5b876f8ea494078c77e90b5 /os/io/platforms/STM32/adc_lld.c | |
| parent | b488811f14f65a746ac9e0cdd8d392cd011517e6 (diff) | |
| download | ChibiOS-aa2f5af6f01de0e2083c2c92bc4ae2fedeac847d.tar.gz ChibiOS-aa2f5af6f01de0e2083c2c92bc4ae2fedeac847d.tar.bz2 ChibiOS-aa2f5af6f01de0e2083c2c92bc4ae2fedeac847d.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1309 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/io/platforms/STM32/adc_lld.c')
| -rw-r--r-- | os/io/platforms/STM32/adc_lld.c | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/os/io/platforms/STM32/adc_lld.c b/os/io/platforms/STM32/adc_lld.c index 9581574ec..10fd27ec1 100644 --- a/os/io/platforms/STM32/adc_lld.c +++ b/os/io/platforms/STM32/adc_lld.c @@ -26,6 +26,13 @@ #include <ch.h>
#include <adc.h>
+#include <stm32_dma.h>
+#include <nvic.h>
+
+#if USE_STM32_ADC1 || defined(__DOXYGEN__)
+/** @brief ADC1 driver identifier.*/
+ADCDriver ADCD1;
+#endif
/*===========================================================================*/
/* Low Level Driver local functions. */
@@ -44,6 +51,12 @@ */
void adc_lld_init(void) {
+#if USE_STM32_ADC1
+ adcObjectInit(&ADCD1);
+ DMA1_Channel1->CPAR = (uint32_t)ADC1->DR;
+ ADCD1.ad_adc = ADC1;
+ ADCD1.ad_dma = DMA1_Channel1;
+#endif
}
/**
@@ -53,10 +66,16 @@ void adc_lld_init(void) { */
void adc_lld_start(ADCDriver *adcp) {
- if (adcp->adc_state == ADC_STOP) {
- /* Clock activation.*/
+ /* If in stopped state then enables the ADC and DMA clocks.*/
+ if (adcp->ad_state == ADC_STOP) {
+#if USE_STM32_ADC1
+ if (&ADCD1 == adcp) {
+ NVICEnableVector(DMA1_Channel1_IRQn, STM32_ADC1_IRQ_PRIORITY);
+ dmaEnable(DMA1_ID);
+ RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
+ }
+#endif
}
- /* Configuration.*/
}
/**
@@ -66,6 +85,16 @@ void adc_lld_start(ADCDriver *adcp) { */
void adc_lld_stop(ADCDriver *adcp) {
+ /* If in ready state then disables the SPI clock.*/
+ if (adcp->ad_state == ADC_READY) {
+#if USE_STM32_ADC1
+ if (&ADCD1 == adcp) {
+ NVICDisableVector(DMA1_Channel1_IRQn);
+ dmaDisable(DMA1_ID);
+ RCC->APB2ENR &= ~RCC_APB2ENR_ADC1EN;
+ }
+#endif
+ }
}
/**
|