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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-10 10:55:35 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-05-10 10:55:35 +0000 |
| commit | eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487 (patch) | |
| tree | b5b904addaa78253643b143f59848a5de48f3020 /os/hal | |
| parent | 85d08595ab2e14aa8e5fa682cbaf60f599c4245b (diff) | |
| download | ChibiOS-eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487.tar.gz ChibiOS-eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487.tar.bz2 ChibiOS-eaeabaf3c27132ce4ed48e948f0d7ccc39ca8487.zip | |
STM32H7-related fixes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12017 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h | 16 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32H7xx/hal_lld.c | 2 |
2 files changed, 9 insertions, 9 deletions
diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h index 8b8e39b7f..7ec858ee7 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.h @@ -243,14 +243,14 @@ #define STM32_USBCLK STM32_48CLK
#elif defined(STM32H7XX)
/* Defines directly STM32_USBCLK.*/
-#define rccEnableOTG_FS rccEnableUSB1_OTG_HS
-#define rccDisableOTG_FS rccDisableUSB1_OTG_HS
-#define rccResetOTG_FS rccResetUSB1_OTG_HS
-#define rccEnableOTG_HS rccEnableUSB2_OTG_HS
-#define rccDisableOTG_HS rccDisableUSB2_OTG_HS
-#define rccResetOTG_HS rccResetUSB2_OTG_HS
-#define rccEnableOTG_HSULPI rccEnableUSB2_HSULPI
-#define rccDisableOTG_HSULPI rccDisableUSB2_HSULPI
+#define rccEnableOTG_FS rccEnableUSB2_OTG_HS
+#define rccDisableOTG_FS rccDisableUSB2_OTG_HS
+#define rccResetOTG_FS rccResetUSB2_OTG_HS
+#define rccEnableOTG_HS rccEnableUSB1_OTG_HS
+#define rccDisableOTG_HS rccDisableUSB1_OTG_HS
+#define rccResetOTG_HS rccResetUSB1_OTG_HS
+#define rccEnableOTG_HSULPI rccEnableUSB1_HSULPI
+#define rccDisableOTG_HSULPI rccDisableUSB1_HSULPI
#else
#error "unsupported STM32 platform for OTG functionality"
#endif
diff --git a/os/hal/ports/STM32/STM32H7xx/hal_lld.c b/os/hal/ports/STM32/STM32H7xx/hal_lld.c index bb79a429b..60ce00310 100644 --- a/os/hal/ports/STM32/STM32H7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32H7xx/hal_lld.c @@ -102,7 +102,7 @@ static inline void init_pwr(void) { PWR->CR3 = STM32_PWR_CR3;
PWR->CPUCR = STM32_PWR_CPUCR;
PWR->D3CR = STM32_VOS;
- while ((PWR->CSR1 & PWR_CSR1_ACTVOS) == 0)
+ while ((PWR->D3CR & PWR_D3CR_VOSRDY) == 0)
;
#if STM32_PWR_CR2 & PWR_CR2_BREN
// while ((PWR->CR2 & PWR_CR2_BRRDY) == 0)
|