aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/ports
diff options
context:
space:
mode:
authorGiovanni Di Sirio <gdisirio@gmail.com>2018-10-07 07:58:29 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-10-07 07:58:29 +0000
commite72ef8c943b3a335fe4354e6451be99ab1346081 (patch)
tree7f3e178fe11465c79753666492605ee34f39aaec /os/hal/ports
parent644898df5f9771ad9308ed9abd7dee165a4b1268 (diff)
downloadChibiOS-e72ef8c943b3a335fe4354e6451be99ab1346081.tar.gz
ChibiOS-e72ef8c943b3a335fe4354e6451be99ab1346081.tar.bz2
ChibiOS-e72ef8c943b3a335fe4354e6451be99ab1346081.zip
STM32 TRNG driver, not tested yet.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12342 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports')
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/driver.mk9
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c179
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h157
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/notes.txt10
-rw-r--r--os/hal/ports/STM32/STM32L4xx/hal_lld.h5
-rw-r--r--os/hal/ports/STM32/STM32L4xx/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_rcc.h28
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_registry.h12
8 files changed, 401 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/LLD/RNGv1/driver.mk b/os/hal/ports/STM32/LLD/RNGv1/driver.mk
new file mode 100644
index 000000000..3c905004a
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/driver.mk
@@ -0,0 +1,9 @@
+ifeq ($(USE_SMART_BUILD),yes)
+ifneq ($(findstring HAL_USE_TRNG TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
+endif
+else
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
+endif
+
+PLATFORMINC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1
diff --git a/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
new file mode 100644
index 000000000..ac6d39838
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
@@ -0,0 +1,179 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_trng_lld.c
+ * @brief STM32 TRNG subsystem low level driver source.
+ *
+ * @addtogroup TRNG
+ * @{
+ */
+
+#include "hal.h"
+
+#if (HAL_USE_TRNG == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/**
+ * @brief TRNGD1 driver identifier.
+ */
+#if (STM32_TRNG_USE_RNG1 == TRUE) || defined(__DOXYGEN__)
+TRNGDriver TRNGD1;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+static const TRNGConfig default_cfg = {0};
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level TRNG driver initialization.
+ *
+ * @notapi
+ */
+void trng_lld_init(void) {
+
+#if STM32_TRNG_USE_RNG1 == TRUE
+ /* Driver initialization.*/
+ trngObjectInit(&TRNGD1);
+ TRNGD1.rng = RNG;
+#endif
+}
+
+/**
+ * @brief Configures and activates the TRNG peripheral.
+ *
+ * @param[in] trngp pointer to the @p TRNGDriver object
+ *
+ * @notapi
+ */
+void trng_lld_start(TRNGDriver *trngp) {
+
+ /* There is no real configuration but setting up a valid pointer anyway.*/
+ if (trngp->config == NULL) {
+ trngp->config = &default_cfg;
+ }
+
+ if (trngp->state == TRNG_STOP) {
+ /* Enables the peripheral.*/
+#if STM32_TRNG_USE_RNG1 == TRUE
+ if (&TRNGD1 == trngp) {
+ rccEnableRNG(false);
+ }
+#endif
+ }
+ /* Configures the peripheral.*/
+ trngp->rng->CR |= RNG_CR_RNGEN;
+}
+
+/**
+ * @brief Deactivates the TRNG peripheral.
+ *
+ * @param[in] trngp pointer to the @p TRNGDriver object
+ *
+ * @notapi
+ */
+void trng_lld_stop(TRNGDriver *trngp) {
+
+ if (trngp->state == TRNG_READY) {
+ /* Resets the peripheral.*/
+ trngp->rng->CR &= ~RNG_CR_RNGEN;
+
+ /* Disables the peripheral.*/
+#if STM32_TRNG_USE_RNG1 == TRUE
+ if (&TRNGD1 == trngp) {
+ rccDisableRNG();
+ }
+#endif
+ }
+}
+
+/**
+ * @brief True random numbers generator.
+ * @note The function is blocking and likely performs polled waiting
+ * inside the low level implementation.
+ *
+ * @param[in] trngp pointer to the @p TRNGDriver object
+ * @param[in] size size of output buffer
+ * @param[out] out output buffer
+ * @return The operation status.
+ * @retval false if a random number has been generated.
+ * @retval true if an HW error occurred.
+ *
+ * @api
+ */
+bool trng_lld_generate(TRNGDriver *trngp, size_t size, uint8_t *out) {
+
+ while (true) {
+ uint32_t r, tmo;
+ size_t i;
+
+ /* Waiting for error conditions to be cleared.*/
+ tmo = STM32_TRNG_ERROR_CLEAR_ATTEMPTS;
+ while ((tmo > 0) && ((trngp->rng->SR & (RNG_SR_CECS | RNG_SR_SECS)) != 0)) {
+ tmo--;
+ if (tmo == 0) {
+ return true;
+ }
+ }
+
+ /* Waiting for a random number in data register.*/
+ tmo = STM32_DATA_FETCH_ATTEMPTS;
+ while ((tmo > 0) && ((trngp->rng->SR & RNG_SR_DRDY) != 0)) {
+ tmo--;
+ if (tmo == 0) {
+ return true;
+ }
+ }
+
+ /* Getting the generated random number.*/
+ r = trngp->rng->DR;
+
+ /* Writing in the output buffer.*/
+ for (i = 0; i < sizeof (uint32_t) / sizeof (uint8_t); i++) {
+ *out++ = (uint8_t)r;
+ r = r >> 8;
+ size--;
+ if (size == 0) {
+ return false;
+ }
+ }
+ }
+}
+
+#endif /* HAL_USE_TRNG == TRUE */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h
new file mode 100644
index 000000000..3f04adcde
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h
@@ -0,0 +1,157 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_trng_lld.h
+ * @brief STM32 TRNG subsystem low level driver header.
+ *
+ * @addtogroup TRNG
+ * @{
+ */
+
+#ifndef HAL_TRNG_LLD_H
+#define HAL_TRNG_LLD_H
+
+#if (HAL_USE_TRNG == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @name STM32 configuration options
+ * @{
+ */
+/**
+ * @brief TRNGD1 driver enable switch.
+ * @details If set to @p TRUE the support for TRNGD1 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(STM32_TRNG_USE_RNG1) || defined(__DOXYGEN__)
+#define STM32_TRNG_USE_RNG1 FALSE
+#endif
+
+/**
+ * @brief TRNGD1 error clear timeout counter.
+ * @details Number of status register fetches before failing.
+ */
+#if !defined(STM32_TRNG_ERROR_CLEAR_ATTEMPTS) || defined(__DOXYGEN__)
+#define STM32_TRNG_ERROR_CLEAR_ATTEMPTS 1000
+#endif
+
+/**
+ * @brief TRNGD1 data available timeout counter.
+ * @details Number of status register fetches before failing.
+ */
+#if !defined(STM32_DATA_FETCH_ATTEMPTS) || defined(__DOXYGEN__)
+#define STM32_DATA_FETCH_ATTEMPTS 1000
+#endif
+/** @} */
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+#if !defined(STM32_HAS_RNG1)
+#define STM32_HAS_RNG1 FALSE
+#endif
+
+#if STM32_TRNG_USE_RNG1 && !STM32_HAS_RNG1
+#error "RNG1 not present in the selected device"
+#endif
+
+#if !STM32_TRNG_USE_RNG1
+#error "TRNG driver activated but no RNG peripheral assigned"
+#endif
+
+#if !defined(STM32_RNGCLK)
+#error "STM32_RNGCLK not defined in this HAL"
+#endif
+
+#if STM32_RNGCLK != 48000000
+#error "STM32_RNGCLK is not exactly 48000000"
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Driver configuration structure.
+ * @note It could be empty on some architectures.
+ */
+typedef struct {
+ /* End of the mandatory fields.*/
+ /**
+ * @brief Dummy configuration, it is not needed.
+ */
+ uint32_t dummy;
+} TRNGConfig;
+
+/**
+ * @brief Structure representing a TRNG driver.
+ */
+struct TRNGDriver {
+ /**
+ * @brief Driver state.
+ */
+ trngstate_t state;
+ /**
+ * @brief Current configuration data.
+ */
+ const TRNGConfig *config;
+#if defined(TRNG_DRIVER_EXT_FIELDS)
+ TRNG_DRIVER_EXT_FIELDS
+#endif
+ /* End of the mandatory fields.*/
+ /**
+ * @brief Pointer to the RNG registers block.
+ */
+ RNG_TypeDef *rng;
+};
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if (STM32_TRNG_USE_RNG1 == TRUE) && !defined(__DOXYGEN__)
+extern TRNGDriver TRNGD1;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void trng_lld_init(void);
+ void trng_lld_start(TRNGDriver *trngp);
+ void trng_lld_stop(TRNGDriver *trngp);
+ bool trng_lld_generate(TRNGDriver *trngp, size_t size, uint8_t *out);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_TRNG == TRUE */
+
+#endif /* HAL_TRNG_LLD_H */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/RNGv1/notes.txt b/os/hal/ports/STM32/LLD/RNGv1/notes.txt
new file mode 100644
index 000000000..8e0c8e530
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/notes.txt
@@ -0,0 +1,10 @@
+STM32 RNGv1 driver.
+
+Driver capability:
+
+- Supports the STM32 TRNGv1 found on STM32L4 and STM32L4+ families.
+
+The file registry must export:
+
+STM32_HAS_RNG1 - RNG presence flag.
+
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index 40da4cc73..1595e600b 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -2096,6 +2096,11 @@
#define STM32_USBCLK STM32_48CLK
/**
+ * @brief RNG clock point.
+ */
+#define STM32_RNGCLK STM32_48CLK
+
+/**
* @brief ADC clock frequency.
*/
#if (STM32_ADCSEL == STM32_ADCSEL_NOCLK) || defined(__DOXYGEN__)
diff --git a/os/hal/ports/STM32/STM32L4xx/platform.mk b/os/hal/ports/STM32/STM32L4xx/platform.mk
index 67fa08497..c65cf74d0 100644
--- a/os/hal/ports/STM32/STM32L4xx/platform.mk
+++ b/os/hal/ports/STM32/STM32L4xx/platform.mk
@@ -29,6 +29,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
index 2a8a7904d..91cc696f2 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
@@ -626,6 +626,34 @@
/** @} */
/**
+ * @name RNG peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the RNG peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableRNG(lp) rccEnableAHB2(RCC_AHB2ENR_RNGEN, lp)
+
+/**
+ * @brief Disables the RNG peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableRNG() rccDisableAHB2(RCC_AHB2ENR_RNGEN)
+
+/**
+ * @brief Resets the RNG peripheral.
+ *
+ * @api
+ */
+#define rccResetRNG() rccResetAHB3(RCC_AHB2RSTR_RNGRST)
+/** @} */
+
+/**
* @name SDMMC peripheral specific RCC operations
* @{
*/
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
index 2e5b48724..1bea6e22e 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
@@ -204,6 +204,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -551,6 +554,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -913,6 +919,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1338,6 +1347,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE