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-rw-r--r--demos/STM32/RT-STM32L476-DISCOVERY/Makefile2
-rw-r--r--demos/STM32/RT-STM32L496ZG-NUCLEO144/Makefile2
-rw-r--r--demos/STM32/RT-STM32L4R5ZI-NUCLEO144/Makefile2
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/driver.mk9
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c179
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h157
-rw-r--r--os/hal/ports/STM32/LLD/RNGv1/notes.txt10
-rw-r--r--os/hal/ports/STM32/STM32L4xx/hal_lld.h5
-rw-r--r--os/hal/ports/STM32/STM32L4xx/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_rcc.h28
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_registry.h12
-rw-r--r--os/hal/templates/hal_trng_lld.h10
-rw-r--r--testhal/STM32/multi/TRNG/.cproject5
-rw-r--r--testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/halconf.h4
-rw-r--r--testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h7
-rw-r--r--testhal/STM32/multi/TRNG/main.c37
-rw-r--r--testhal/STM32/multi/TRNG/make/stm32l476_discovery.make103
17 files changed, 448 insertions, 125 deletions
diff --git a/demos/STM32/RT-STM32L476-DISCOVERY/Makefile b/demos/STM32/RT-STM32L476-DISCOVERY/Makefile
index 881f1aade..20b05ee22 100644
--- a/demos/STM32/RT-STM32L476-DISCOVERY/Makefile
+++ b/demos/STM32/RT-STM32L476-DISCOVERY/Makefile
@@ -89,7 +89,7 @@ PROJECT = ch
MCU = cortex-m4
# Imported source files and paths.
-CHIBIOS = ../../..
+CHIBIOS := ../../..
CONFDIR := ./cfg
BUILDDIR := ./build
DEPDIR := ./.dep
diff --git a/demos/STM32/RT-STM32L496ZG-NUCLEO144/Makefile b/demos/STM32/RT-STM32L496ZG-NUCLEO144/Makefile
index afb684603..efd03dbf2 100644
--- a/demos/STM32/RT-STM32L496ZG-NUCLEO144/Makefile
+++ b/demos/STM32/RT-STM32L496ZG-NUCLEO144/Makefile
@@ -89,7 +89,7 @@ PROJECT = ch
MCU = cortex-m4
# Imported source files and paths.
-CHIBIOS = ../../..
+CHIBIOS := ../../..
CONFDIR := ./cfg
BUILDDIR := ./build
DEPDIR := ./.dep
diff --git a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/Makefile b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/Makefile
index 11cdaaabe..b22e88f60 100644
--- a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/Makefile
+++ b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/Makefile
@@ -89,7 +89,7 @@ PROJECT = ch
MCU = cortex-m4
# Imported source files and paths.
-CHIBIOS = ../../..
+CHIBIOS := ../../..
CONFDIR := ./cfg
BUILDDIR := ./build
DEPDIR := ./.dep
diff --git a/os/hal/ports/STM32/LLD/RNGv1/driver.mk b/os/hal/ports/STM32/LLD/RNGv1/driver.mk
new file mode 100644
index 000000000..3c905004a
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/driver.mk
@@ -0,0 +1,9 @@
+ifeq ($(USE_SMART_BUILD),yes)
+ifneq ($(findstring HAL_USE_TRNG TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
+endif
+else
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
+endif
+
+PLATFORMINC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1
diff --git a/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
new file mode 100644
index 000000000..ac6d39838
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.c
@@ -0,0 +1,179 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_trng_lld.c
+ * @brief STM32 TRNG subsystem low level driver source.
+ *
+ * @addtogroup TRNG
+ * @{
+ */
+
+#include "hal.h"
+
+#if (HAL_USE_TRNG == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/**
+ * @brief TRNGD1 driver identifier.
+ */
+#if (STM32_TRNG_USE_RNG1 == TRUE) || defined(__DOXYGEN__)
+TRNGDriver TRNGD1;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+static const TRNGConfig default_cfg = {0};
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level TRNG driver initialization.
+ *
+ * @notapi
+ */
+void trng_lld_init(void) {
+
+#if STM32_TRNG_USE_RNG1 == TRUE
+ /* Driver initialization.*/
+ trngObjectInit(&TRNGD1);
+ TRNGD1.rng = RNG;
+#endif
+}
+
+/**
+ * @brief Configures and activates the TRNG peripheral.
+ *
+ * @param[in] trngp pointer to the @p TRNGDriver object
+ *
+ * @notapi
+ */
+void trng_lld_start(TRNGDriver *trngp) {
+
+ /* There is no real configuration but setting up a valid pointer anyway.*/
+ if (trngp->config == NULL) {
+ trngp->config = &default_cfg;
+ }
+
+ if (trngp->state == TRNG_STOP) {
+ /* Enables the peripheral.*/
+#if STM32_TRNG_USE_RNG1 == TRUE
+ if (&TRNGD1 == trngp) {
+ rccEnableRNG(false);
+ }
+#endif
+ }
+ /* Configures the peripheral.*/
+ trngp->rng->CR |= RNG_CR_RNGEN;
+}
+
+/**
+ * @brief Deactivates the TRNG peripheral.
+ *
+ * @param[in] trngp pointer to the @p TRNGDriver object
+ *
+ * @notapi
+ */
+void trng_lld_stop(TRNGDriver *trngp) {
+
+ if (trngp->state == TRNG_READY) {
+ /* Resets the peripheral.*/
+ trngp->rng->CR &= ~RNG_CR_RNGEN;
+
+ /* Disables the peripheral.*/
+#if STM32_TRNG_USE_RNG1 == TRUE
+ if (&TRNGD1 == trngp) {
+ rccDisableRNG();
+ }
+#endif
+ }
+}
+
+/**
+ * @brief True random numbers generator.
+ * @note The function is blocking and likely performs polled waiting
+ * inside the low level implementation.
+ *
+ * @param[in] trngp pointer to the @p TRNGDriver object
+ * @param[in] size size of output buffer
+ * @param[out] out output buffer
+ * @return The operation status.
+ * @retval false if a random number has been generated.
+ * @retval true if an HW error occurred.
+ *
+ * @api
+ */
+bool trng_lld_generate(TRNGDriver *trngp, size_t size, uint8_t *out) {
+
+ while (true) {
+ uint32_t r, tmo;
+ size_t i;
+
+ /* Waiting for error conditions to be cleared.*/
+ tmo = STM32_TRNG_ERROR_CLEAR_ATTEMPTS;
+ while ((tmo > 0) && ((trngp->rng->SR & (RNG_SR_CECS | RNG_SR_SECS)) != 0)) {
+ tmo--;
+ if (tmo == 0) {
+ return true;
+ }
+ }
+
+ /* Waiting for a random number in data register.*/
+ tmo = STM32_DATA_FETCH_ATTEMPTS;
+ while ((tmo > 0) && ((trngp->rng->SR & RNG_SR_DRDY) != 0)) {
+ tmo--;
+ if (tmo == 0) {
+ return true;
+ }
+ }
+
+ /* Getting the generated random number.*/
+ r = trngp->rng->DR;
+
+ /* Writing in the output buffer.*/
+ for (i = 0; i < sizeof (uint32_t) / sizeof (uint8_t); i++) {
+ *out++ = (uint8_t)r;
+ r = r >> 8;
+ size--;
+ if (size == 0) {
+ return false;
+ }
+ }
+ }
+}
+
+#endif /* HAL_USE_TRNG == TRUE */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h
new file mode 100644
index 000000000..3f04adcde
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/hal_trng_lld.h
@@ -0,0 +1,157 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_trng_lld.h
+ * @brief STM32 TRNG subsystem low level driver header.
+ *
+ * @addtogroup TRNG
+ * @{
+ */
+
+#ifndef HAL_TRNG_LLD_H
+#define HAL_TRNG_LLD_H
+
+#if (HAL_USE_TRNG == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @name STM32 configuration options
+ * @{
+ */
+/**
+ * @brief TRNGD1 driver enable switch.
+ * @details If set to @p TRUE the support for TRNGD1 is included.
+ * @note The default is @p FALSE.
+ */
+#if !defined(STM32_TRNG_USE_RNG1) || defined(__DOXYGEN__)
+#define STM32_TRNG_USE_RNG1 FALSE
+#endif
+
+/**
+ * @brief TRNGD1 error clear timeout counter.
+ * @details Number of status register fetches before failing.
+ */
+#if !defined(STM32_TRNG_ERROR_CLEAR_ATTEMPTS) || defined(__DOXYGEN__)
+#define STM32_TRNG_ERROR_CLEAR_ATTEMPTS 1000
+#endif
+
+/**
+ * @brief TRNGD1 data available timeout counter.
+ * @details Number of status register fetches before failing.
+ */
+#if !defined(STM32_DATA_FETCH_ATTEMPTS) || defined(__DOXYGEN__)
+#define STM32_DATA_FETCH_ATTEMPTS 1000
+#endif
+/** @} */
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+#if !defined(STM32_HAS_RNG1)
+#define STM32_HAS_RNG1 FALSE
+#endif
+
+#if STM32_TRNG_USE_RNG1 && !STM32_HAS_RNG1
+#error "RNG1 not present in the selected device"
+#endif
+
+#if !STM32_TRNG_USE_RNG1
+#error "TRNG driver activated but no RNG peripheral assigned"
+#endif
+
+#if !defined(STM32_RNGCLK)
+#error "STM32_RNGCLK not defined in this HAL"
+#endif
+
+#if STM32_RNGCLK != 48000000
+#error "STM32_RNGCLK is not exactly 48000000"
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Driver configuration structure.
+ * @note It could be empty on some architectures.
+ */
+typedef struct {
+ /* End of the mandatory fields.*/
+ /**
+ * @brief Dummy configuration, it is not needed.
+ */
+ uint32_t dummy;
+} TRNGConfig;
+
+/**
+ * @brief Structure representing a TRNG driver.
+ */
+struct TRNGDriver {
+ /**
+ * @brief Driver state.
+ */
+ trngstate_t state;
+ /**
+ * @brief Current configuration data.
+ */
+ const TRNGConfig *config;
+#if defined(TRNG_DRIVER_EXT_FIELDS)
+ TRNG_DRIVER_EXT_FIELDS
+#endif
+ /* End of the mandatory fields.*/
+ /**
+ * @brief Pointer to the RNG registers block.
+ */
+ RNG_TypeDef *rng;
+};
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if (STM32_TRNG_USE_RNG1 == TRUE) && !defined(__DOXYGEN__)
+extern TRNGDriver TRNGD1;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void trng_lld_init(void);
+ void trng_lld_start(TRNGDriver *trngp);
+ void trng_lld_stop(TRNGDriver *trngp);
+ bool trng_lld_generate(TRNGDriver *trngp, size_t size, uint8_t *out);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_TRNG == TRUE */
+
+#endif /* HAL_TRNG_LLD_H */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/RNGv1/notes.txt b/os/hal/ports/STM32/LLD/RNGv1/notes.txt
new file mode 100644
index 000000000..8e0c8e530
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/RNGv1/notes.txt
@@ -0,0 +1,10 @@
+STM32 RNGv1 driver.
+
+Driver capability:
+
+- Supports the STM32 TRNGv1 found on STM32L4 and STM32L4+ families.
+
+The file registry must export:
+
+STM32_HAS_RNG1 - RNG presence flag.
+
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index 40da4cc73..1595e600b 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -2096,6 +2096,11 @@
#define STM32_USBCLK STM32_48CLK
/**
+ * @brief RNG clock point.
+ */
+#define STM32_RNGCLK STM32_48CLK
+
+/**
* @brief ADC clock frequency.
*/
#if (STM32_ADCSEL == STM32_ADCSEL_NOCLK) || defined(__DOXYGEN__)
diff --git a/os/hal/ports/STM32/STM32L4xx/platform.mk b/os/hal/ports/STM32/STM32L4xx/platform.mk
index 67fa08497..c65cf74d0 100644
--- a/os/hal/ports/STM32/STM32L4xx/platform.mk
+++ b/os/hal/ports/STM32/STM32L4xx/platform.mk
@@ -29,6 +29,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/OTGv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
index 2a8a7904d..91cc696f2 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
@@ -626,6 +626,34 @@
/** @} */
/**
+ * @name RNG peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the RNG peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableRNG(lp) rccEnableAHB2(RCC_AHB2ENR_RNGEN, lp)
+
+/**
+ * @brief Disables the RNG peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableRNG() rccDisableAHB2(RCC_AHB2ENR_RNGEN)
+
+/**
+ * @brief Resets the RNG peripheral.
+ *
+ * @api
+ */
+#define rccResetRNG() rccResetAHB3(RCC_AHB2RSTR_RNGRST)
+/** @} */
+
+/**
* @name SDMMC peripheral specific RCC operations
* @{
*/
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
index 2e5b48724..1bea6e22e 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
@@ -204,6 +204,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -551,6 +554,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -913,6 +919,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1338,6 +1347,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_QUADSPI1_DMA_CHN 0x03050000
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
diff --git a/os/hal/templates/hal_trng_lld.h b/os/hal/templates/hal_trng_lld.h
index c110fbefa..c1ca6bed2 100644
--- a/os/hal/templates/hal_trng_lld.h
+++ b/os/hal/templates/hal_trng_lld.h
@@ -58,16 +58,6 @@
/*===========================================================================*/
/**
- * @brief TRNG frequency type.
- */
-typedef uint32_t trngfreq_t;
-
-/**
- * @brief TRNG counter type.
- */
-typedef uint16_t trngcnt_t;
-
-/**
* @brief Driver configuration structure.
* @note It could be empty on some architectures.
*/
diff --git a/testhal/STM32/multi/TRNG/.cproject b/testhal/STM32/multi/TRNG/.cproject
index b857ea1a3..14d0bd252 100644
--- a/testhal/STM32/multi/TRNG/.cproject
+++ b/testhal/STM32/multi/TRNG/.cproject
@@ -78,13 +78,14 @@
<configuration configurationName="Default">
<resource resourceType="PROJECT" workspacePath="/STM32-TRNG"/>
</configuration>
+ <configuration configurationName="Build for STM32L476-Discovery"/>
</storageModule>
<storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
- <scannerConfigBuildInfo instanceId="0.365230168.523175374">
+ <scannerConfigBuildInfo instanceId="0.365230168">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
</scannerConfigBuildInfo>
- <scannerConfigBuildInfo instanceId="0.365230168">
+ <scannerConfigBuildInfo instanceId="0.365230168.523175374">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
</scannerConfigBuildInfo>
</storageModule>
diff --git a/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/halconf.h b/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/halconf.h
index 545a6a835..9323c4fe1 100644
--- a/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/halconf.h
+++ b/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/halconf.h
@@ -170,7 +170,7 @@
* @brief Enables the TRNG subsystem.
*/
#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
-#define HAL_USE_TRNG FALSE
+#define HAL_USE_TRNG TRUE
#endif
/**
@@ -198,7 +198,7 @@
* @brief Enables the WSPI subsystem.
*/
#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
-#define HAL_USE_WSPI TRUE
+#define HAL_USE_WSPI FALSE
#endif
/*===========================================================================*/
diff --git a/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h b/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h
index 46e69ff34..cd98f46c5 100644
--- a/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h
+++ b/testhal/STM32/multi/TRNG/cfg/stm32l476_discovery/mcuconf.h
@@ -278,6 +278,11 @@
#define STM32_ST_USE_TIMER 2
/*
+ * TRNG driver system settings.
+ */
+#define STM32_TRNG_USE_RNG1 TRUE
+
+/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
@@ -322,7 +327,7 @@
/*
* WSPI driver system settings.
*/
-#define STM32_WSPI_USE_QUADSPI1 TRUE
+#define STM32_WSPI_USE_QUADSPI1 FALSE
#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#endif /* MCUCONF_H */
diff --git a/testhal/STM32/multi/TRNG/main.c b/testhal/STM32/multi/TRNG/main.c
index 3de5be345..83edb3e63 100644
--- a/testhal/STM32/multi/TRNG/main.c
+++ b/testhal/STM32/multi/TRNG/main.c
@@ -14,41 +14,11 @@
limitations under the License.
*/
-#include <string.h>
-
#include "ch.h"
#include "hal.h"
-#include "serial_nor.h"
-#include "mfs.h"
-
-#include "mfs_test_root.h"
-
#include "portab.h"
-/* 16MB device, 2 cycles delay after NCS.*/
-const WSPIConfig WSPIcfg1 = {
- .end_cb = NULL,
- .dcr = STM32_DCR_FSIZE(24) | STM32_DCR_CSHT(1)
-};
-
-const SNORConfig snorcfg1 = {
- .busp = &WSPID1,
- .buscfg = &WSPIcfg1
-};
-
-SNORDriver snor1;
-
-const MFSConfig mfscfg1 = {
- .flashp = (BaseFlash *)&snor1,
- .erased = 0xFFFFFFFFU,
- .bank_size = 4096U,
- .bank0_start = 0U,
- .bank0_sectors = 1U,
- .bank1_start = 1U,
- .bank1_sectors = 1U
-};
-
/*
* LED blinker thread, times are in milliseconds.
*/
@@ -86,18 +56,11 @@ int main(void) {
/* Starting a serial port for test report output.*/
sdStart(&PORTAB_SD1, NULL);
- /* Initializing and starting snor1 driver.*/
- snorObjectInit(&snor1);
- snorStart(&snor1, &snorcfg1);
-
/* Creates the blinker thread.*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/* Normal main() thread activity, in this demo it does nothing.*/
while (true) {
- if (palReadLine(PORTAB_LINE_BUTTON) == PORTAB_BUTTON_PRESSED) {
- test_execute((BaseSequentialStream *)&PORTAB_SD1, &mfs_test_suite);
- }
chThdSleepMilliseconds(500);
}
return 0;
diff --git a/testhal/STM32/multi/TRNG/make/stm32l476_discovery.make b/testhal/STM32/multi/TRNG/make/stm32l476_discovery.make
index 067ab9f04..a8d43f714 100644
--- a/testhal/STM32/multi/TRNG/make/stm32l476_discovery.make
+++ b/testhal/STM32/multi/TRNG/make/stm32l476_discovery.make
@@ -18,7 +18,7 @@ ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti
endif
-# Enable this if you want the linker to remove unused code and data
+# Enable this if you want the linker to remove unused code and data.
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
@@ -28,16 +28,11 @@ ifeq ($(USE_LDOPT),)
USE_LDOPT =
endif
-# Enable this if you want link time optimizations (LTO)
+# Enable this if you want link time optimizations (LTO).
ifeq ($(USE_LTO),)
USE_LTO = yes
endif
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
- USE_THUMB = yes
-endif
-
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
@@ -76,7 +71,7 @@ endif
# FPU-related options.
ifeq ($(USE_FPU_OPT),)
- USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant
+ USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
endif
#
@@ -84,13 +79,16 @@ endif
##############################################################################
##############################################################################
-# Project, sources and paths
+# Project, target, sources and paths
#
# Define project name here
PROJECT = ch
-# Imported source files and paths
+# Target settings.
+MCU = cortex-m4
+
+# Imported source files and paths.
CHIBIOS := ../../../..
CONFDIR := ./cfg/stm32l476_discovery
BUILDDIR := ./build/stm32l476_discovery
@@ -112,12 +110,10 @@ include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
include $(CHIBIOS)/tools/mk/autobuild.mk
# Other files (optional).
include $(CHIBIOS)/test/lib/test.mk
-include $(CHIBIOS)/test/mfs/mfs_test.mk
-include $(CHIBIOS)/os/hal/lib/complex/serial_nor/devices/micron_n25q/flash_device.mk
-include $(CHIBIOS)/os/hal/lib/complex/mfs/mfs.mk
-include $(CHIBIOS)/os/hal/lib/streams/streams.mk
+include $(CHIBIOS)/test/rt/rt_test.mk
+include $(CHIBIOS)/test/oslib/oslib_test.mk
-# Define linker script file here
+# Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32L476xG.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
@@ -131,34 +127,23 @@ CSRC = $(ALLCSRC) \
# setting.
CPPSRC = $(ALLCPPSRC)
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACPPSRC =
+# List ASM source files here.
+ASMSRC = $(ALLASMSRC)
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCSRC =
+# List ASM with preprocessor source files here.
+ASMXSRC = $(ALLXASMSRC)
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCPPSRC =
+# Inclusion directories.
+INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC)
-# List ASM source files here
-ASMSRC = $(ALLASMSRC)
-ASMXSRC = $(ALLXASMSRC)
+# Define C warning options here.
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-INCDIR = $(ALLINC) $(TESTINC) $(CONFDIR)
+# Define C++ warning options here.
+CPPWARN = -Wall -Wextra -Wundef
#
-# Project, sources and paths
+# Project, target, sources and paths
##############################################################################
##############################################################################
@@ -185,43 +170,21 @@ ULIBS =
##############################################################################
##############################################################################
-# Compiler settings
+# Common rules
#
-MCU = cortex-m4
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
+include $(RULESPATH)/arm-none-eabi.mk
+include $(RULESPATH)/rules.mk
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-# runtime support makes code size explode.
-LD = $(TRGT)gcc
-#LD = $(TRGT)g++
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-AR = $(TRGT)ar
-OD = $(TRGT)objdump
-SZ = $(TRGT)size
-HEX = $(CP) -O ihex
-BIN = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
-CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+#
+# Common rules
+##############################################################################
-# Define C++ warning options here
-CPPWARN = -Wall -Wextra -Wundef
+##############################################################################
+# Custom rules
+#
#
-# Compiler settings
+# Custom rules
##############################################################################
-
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
-include $(RULESPATH)/rules.mk