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authorGiovanni Di Sirio <gdisirio@gmail.com>2017-12-02 09:22:23 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2017-12-02 09:22:23 +0000
commitafbc92a7f789d0f1a747341a37c0e6f881f36085 (patch)
treea1ba26ed3da9c313866eb5f3ed6c19db26de0126 /os/hal/ports
parent7055e2b5aa1d15c342cd97a0750801fdc13beac6 (diff)
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Updated GPIOv3 for new board files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11101 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports')
-rw-r--r--os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c72
-rw-r--r--os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h114
-rw-r--r--os/hal/ports/STM32/STM32L4xx/hal_lld.c6
-rw-r--r--os/hal/ports/STM32/STM32L4xx/hal_lld.h1
4 files changed, 15 insertions, 178 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
index a7d91cd29..185f8392c 100644
--- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
+++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
@@ -30,14 +30,6 @@
/* Driver local definitions. */
/*===========================================================================*/
-#if defined(STM32L4XX)
-#define AHB2_EN_MASK STM32_GPIO_EN_MASK
-#define AHB2_LPEN_MASK 0
-
-#else
-#error "missing or unsupported platform for GPIOv3 PAL driver"
-#endif
-
/* Handling a difference in ST headers.*/
#if defined(STM32L4XX)
#define EMR EMR1
@@ -64,19 +56,6 @@ palevent_t _pal_events[16];
/* Driver local functions. */
/*===========================================================================*/
-static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) {
-
- gpiop->OTYPER = config->otyper;
- gpiop->ASCR = config->ascr;
- gpiop->OSPEEDR = config->ospeedr;
- gpiop->PUPDR = config->pupdr;
- gpiop->ODR = config->odr;
- gpiop->AFRL = config->afrl;
- gpiop->AFRH = config->afrh;
- gpiop->MODER = config->moder;
- gpiop->LOCKR = config->lockr;
-}
-
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
@@ -86,14 +65,11 @@ static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) {
/*===========================================================================*/
/**
- * @brief STM32 I/O ports configuration.
- * @details Ports A-D(E, F, G, H) clocks enabled.
- *
- * @param[in] config the STM32 ports configuration
+ * @brief PAL driver initialization.
*
* @notapi
*/
-void _pal_lld_init(const PALConfig *config) {
+void _pal_lld_init(void) {
#if PAL_USE_CALLBACKS || PAL_USE_WAIT || defined(__DOXYGEN__)
unsigned i;
@@ -102,50 +78,6 @@ void _pal_lld_init(const PALConfig *config) {
_pal_init_event(i);
}
#endif
-
- /*
- * Enables the GPIO related clocks.
- */
-#if defined(STM32L4XX)
- RCC->AHB2ENR |= AHB2_EN_MASK;
-#endif
-
- /*
- * Initial GPIO setup.
- */
-#if STM32_HAS_GPIOA
- initgpio(GPIOA, &config->PAData);
-#endif
-#if STM32_HAS_GPIOB
- initgpio(GPIOB, &config->PBData);
-#endif
-#if STM32_HAS_GPIOC
- initgpio(GPIOC, &config->PCData);
-#endif
-#if STM32_HAS_GPIOD
- initgpio(GPIOD, &config->PDData);
-#endif
-#if STM32_HAS_GPIOE
- initgpio(GPIOE, &config->PEData);
-#endif
-#if STM32_HAS_GPIOF
- initgpio(GPIOF, &config->PFData);
-#endif
-#if STM32_HAS_GPIOG
- initgpio(GPIOG, &config->PGData);
-#endif
-#if STM32_HAS_GPIOH
- initgpio(GPIOH, &config->PHData);
-#endif
-#if STM32_HAS_GPIOI
- initgpio(GPIOI, &config->PIData);
-#endif
-#if STM32_HAS_GPIOJ
- initgpio(GPIOJ, &config->PJData);
-#endif
-#if STM32_HAS_GPIOK
- initgpio(GPIOK, &config->PKData);
-#endif
}
/**
diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h
index c76fda1b0..ef1e7ebdd 100644
--- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h
+++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h
@@ -25,12 +25,18 @@
#ifndef HAL_PAL_LLD_H
#define HAL_PAL_LLD_H
+#include "stm32_gpio.h"
+
#if HAL_USE_PAL || defined(__DOXYGEN__)
/*===========================================================================*/
/* Unsupported modes and specific modes */
/*===========================================================================*/
+/* Specifies palInit() without parameter, required until all platforms will
+ be updated to the new style.*/
+#define PAL_NEW_INIT
+
#undef PAL_MODE_RESET
#undef PAL_MODE_UNCONNECTED
#undef PAL_MODE_INPUT
@@ -223,109 +229,6 @@
/** @} */
/**
- * @brief STM32 GPIO registers block.
- */
-typedef struct {
-
- volatile uint32_t MODER;
- volatile uint32_t OTYPER;
- volatile uint32_t OSPEEDR;
- volatile uint32_t PUPDR;
- volatile uint32_t IDR;
- volatile uint32_t ODR;
- volatile union {
- uint32_t W;
- struct {
- uint16_t set;
- uint16_t clear;
- } H;
- } BSRR;
- volatile uint32_t LOCKR;
- volatile uint32_t AFRL;
- volatile uint32_t AFRH;
- volatile uint32_t BRR;
- volatile uint32_t ASCR;
-} stm32_gpio_t;
-
-/**
- * @brief GPIO port setup info.
- */
-typedef struct {
- /** Initial value for MODER register.*/
- uint32_t moder;
- /** Initial value for OTYPER register.*/
- uint32_t otyper;
- /** Initial value for OSPEEDR register.*/
- uint32_t ospeedr;
- /** Initial value for PUPDR register.*/
- uint32_t pupdr;
- /** Initial value for ODR register.*/
- uint32_t odr;
- /** Initial value for AFRL register.*/
- uint32_t afrl;
- /** Initial value for AFRH register.*/
- uint32_t afrh;
- /** Initial value for ASCR register.*/
- uint32_t ascr;
- /** Initial value for LOCKR register.*/
- uint32_t lockr;
-} stm32_gpio_setup_t;
-
-/**
- * @brief STM32 GPIO static initializer.
- * @details An instance of this structure must be passed to @p palInit() at
- * system startup time in order to initialize the digital I/O
- * subsystem. This represents only the initial setup, specific pads
- * or whole ports can be reprogrammed at later time.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
- /** @brief Port A setup data.*/
- stm32_gpio_setup_t PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
- /** @brief Port B setup data.*/
- stm32_gpio_setup_t PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
- /** @brief Port C setup data.*/
- stm32_gpio_setup_t PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
- /** @brief Port D setup data.*/
- stm32_gpio_setup_t PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- /** @brief Port E setup data.*/
- stm32_gpio_setup_t PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- /** @brief Port F setup data.*/
- stm32_gpio_setup_t PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- /** @brief Port G setup data.*/
- stm32_gpio_setup_t PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
- /** @brief Port H setup data.*/
- stm32_gpio_setup_t PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
- /** @brief Port I setup data.*/
- stm32_gpio_setup_t PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
- /** @brief Port I setup data.*/
- stm32_gpio_setup_t PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
- /** @brief Port I setup data.*/
- stm32_gpio_setup_t PKData;
-#endif
-} PALConfig;
-
-/**
* @brief Type of digital I/O port sized unsigned integer.
*/
typedef uint32_t ioportmask_t;
@@ -451,7 +354,7 @@ typedef uint32_t iopadid_t;
*
* @notapi
*/
-#define pal_lld_init(config) _pal_lld_init(config)
+#define pal_lld_init() _pal_lld_init()
/**
* @brief Reads an I/O port.
@@ -608,14 +511,13 @@ typedef uint32_t iopadid_t;
&_pal_events[PAL_PAD(line)]
#if !defined(__DOXYGEN__)
-extern const PALConfig pal_default_config;
extern palevent_t _pal_events[16];
#endif
#ifdef __cplusplus
extern "C" {
#endif
- void _pal_lld_init(const PALConfig *config);
+ void _pal_lld_init(void);
void _pal_lld_setgroupmode(ioportid_t port,
ioportmask_t mask,
iomode_t mode);
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.c b/os/hal/ports/STM32/STM32L4xx/hal_lld.c
index 5b6be0999..d4022262b 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.c
@@ -109,9 +109,11 @@ static void hal_lld_backup_domain_init(void) {
*/
void hal_lld_init(void) {
- /* Reset of all peripherals.*/
+ /* Reset of all peripherals.
+ Note, GPIOs are not reset because initialized before this point in
+ board files.*/
rccResetAHB1(~0);
- rccResetAHB2(~0);
+ rccResetAHB2(~STM32_GPIO_EN_MASK);
rccResetAHB3(~0);
rccResetAPB1R1(~RCC_APB1RSTR1_PWRRST);
rccResetAPB1R2(~0);
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index 81826c5ac..ce60cfda9 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -2125,6 +2125,7 @@
/* Various helpers.*/
#include "nvic.h"
+#include "stm32_isr.h"
#include "stm32_dma.h"
#include "stm32_rcc.h"