Updated GPIOv3 for new board files.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11101 35acf78f-673a-0410-8e92-d51de3d6d3f4

6 files changed, 200 insertions, 185 deletions

diff --git a/os/hal/boards/ST_STM32L476_DISCOVERY/board.c b/os/hal/boards/ST_STM32L476_DISCOVERY/board.c
index f0ccf6c22..425f8b03a 100644
--- a/os/hal/boards/ST_STM32L476_DISCOVERY/board.c
+++ b/os/hal/boards/ST_STM32L476_DISCOVERY/board.c
@@ -20,14 +20,78 @@
  */

 

 #include "hal.h"

+#include "stm32_gpio.h"

+

+/*===========================================================================*/

+/* Driver local definitions.                                                 */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables and types.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Type of STM32 GPIO port setup.

+ */

+typedef struct {

+  uint32_t              moder;

+  uint32_t              otyper;

+  uint32_t              ospeedr;

+  uint32_t              pupdr;

+  uint32_t              odr;

+  uint32_t              afrl;

+  uint32_t              afrh;

+  uint32_t              ascr;

+  uint32_t              lockr;

+} gpio_setup_t;

+

+/**

+ * @brief   Type of STM32 GPIO initialization data.

+ */

+typedef struct {

+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)

+  gpio_setup_t          PAData;

+#endif

+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)

+  gpio_setup_t          PBData;

+#endif

+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)

+  gpio_setup_t          PCData;

+#endif

+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)

+  gpio_setup_t          PDData;

+#endif

+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)

+  gpio_setup_t          PEData;

+#endif

+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)

+  gpio_setup_t          PFData;

+#endif

+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)

+  gpio_setup_t          PGData;

+#endif

+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)

+  gpio_setup_t          PHData;

+#endif

+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)

+  gpio_setup_t          PIData;

+#endif

+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)

+  gpio_setup_t          PJData;

+#endif

+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)

+  gpio_setup_t          PKData;

+#endif

+} gpio_config_t;

 

-#if HAL_USE_PAL || defined(__DOXYGEN__)

 /**

- * @brief   PAL setup.

- * @details Digital I/O ports static configuration as defined in @p board.h.

- *          This variable is used by the HAL when initializing the PAL driver.

+ * @brief   STM32 GPIO static initialization data.

  */

-const PALConfig pal_default_config = {

+static const gpio_config_t gpio_default_config = {

 #if STM32_HAS_GPIOA

   {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,

    VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH,    VAL_GPIOA_ASCR,

@@ -68,16 +132,99 @@ const PALConfig pal_default_config = {
    VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH,    VAL_GPIOH_ASCR,

    VAL_GPIOH_LOCKR},

 #endif

+#if STM32_HAS_GPIOI

+  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,

+   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH,    VAL_GPIOI_ASCR,

+   VAL_GPIOI_LOCKR},

+#endif

+#if STM32_HAS_GPIOJ

+  {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,

+   VAL_GPIOJ_ODR,   VAL_GPIOJ_AFRL,   VAL_GPIOJ_AFRH,    VAL_GPIOJ_ASCR,

+   VAL_GPIOJ_LOCKR},

+#endif

+#if STM32_HAS_GPIOK

+  {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,

+   VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH,    VAL_GPIOK_ASCR,

+   VAL_GPIOK_LOCKR}

+#endif

 };

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {

+

+  gpiop->OTYPER  = config->otyper;

+  gpiop->ASCR    = config->ascr;

+  gpiop->OSPEEDR = config->ospeedr;

+  gpiop->PUPDR   = config->pupdr;

+  gpiop->ODR     = config->odr;

+  gpiop->AFRL    = config->afrl;

+  gpiop->AFRH    = config->afrh;

+  gpiop->MODER   = config->moder;

+  gpiop->LOCKR   = config->lockr;

+}

+

+static void stm32_gpio_init(void) {

+

+  /* Enabling GPIO-related clocks, the mask comes from the

+     registry header file.*/

+  rccResetAHB2(STM32_GPIO_EN_MASK);

+  rccEnableAHB2(STM32_GPIO_EN_MASK, true);

+

+  /* Initializing all the defined GPIO ports.*/

+#if STM32_HAS_GPIOA

+  gpio_init(GPIOA, &gpio_default_config.PAData);

+#endif

+#if STM32_HAS_GPIOB

+  gpio_init(GPIOB, &gpio_default_config.PBData);

+#endif

+#if STM32_HAS_GPIOC

+  gpio_init(GPIOC, &gpio_default_config.PCData);

+#endif

+#if STM32_HAS_GPIOD

+  gpio_init(GPIOD, &gpio_default_config.PDData);

+#endif

+#if STM32_HAS_GPIOE

+  gpio_init(GPIOE, &gpio_default_config.PEData);

 #endif

+#if STM32_HAS_GPIOF

+  gpio_init(GPIOF, &gpio_default_config.PFData);

+#endif

+#if STM32_HAS_GPIOG

+  gpio_init(GPIOG, &gpio_default_config.PGData);

+#endif

+#if STM32_HAS_GPIOH

+  gpio_init(GPIOH, &gpio_default_config.PHData);

+#endif

+#if STM32_HAS_GPIOI

+  gpio_init(GPIOI, &gpio_default_config.PIData);

+#endif

+#if STM32_HAS_GPIOJ

+  gpio_init(GPIOJ, &gpio_default_config.PJData);

+#endif

+#if STM32_HAS_GPIOK

+  gpio_init(GPIOK, &gpio_default_config.PKData);

+#endif

+}

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

 

 /**

  * @brief   Early initialization code.

- * @details This initialization must be performed just after stack setup

- *          and before any other initialization.

+ * @details GPIO ports and system clocks are initialized before everything

+ *          else.

  */

 void __early_init(void) {

 

+  stm32_gpio_init();

   stm32_clock_init();

 }

 

@@ -130,4 +277,5 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
  * @todo    Add your board-specific code, if any.

  */

 void boardInit(void) {

+

 }

diff --git a/os/hal/boards/ST_STM32L476_DISCOVERY/board.h b/os/hal/boards/ST_STM32L476_DISCOVERY/board.h
index 6d7c445f8..33d1e0b8a 100644
--- a/os/hal/boards/ST_STM32L476_DISCOVERY/board.h
+++ b/os/hal/boards/ST_STM32L476_DISCOVERY/board.h
@@ -22,6 +22,10 @@
 #ifndef BOARD_H

 #define BOARD_H

 

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

 /*

  * Setup for STMicroelectronics STM32L476-Discovery board.

  */

@@ -217,6 +221,7 @@
 #define LINE_OTG_FS_DP              PAL_LINE(GPIOA, 12U)

 #define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)

 #define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)

+

 #define LINE_LCD_SEG21              PAL_LINE(GPIOB, 0U)

 #define LINE_LCD_SEG2               PAL_LINE(GPIOB, 1U)

 #define LINE_LED_RED                PAL_LINE(GPIOB, 2U)

@@ -236,6 +241,7 @@
 #define LINE_LCD_SEG3               PAL_LINE(GPIOB, 13U)

 #define LINE_LCD_SEG19              PAL_LINE(GPIOB, 14U)

 #define LINE_LCD_SEG4               PAL_LINE(GPIOB, 15U)

+

 #define LINE_MAG_CS                 PAL_LINE(GPIOC, 0U)

 #define LINE_MAG_INT                PAL_LINE(GPIOC, 1U)

 #define LINE_MAG_DRDY               PAL_LINE(GPIOC, 2U)

@@ -252,6 +258,7 @@
 #define LINE_MFX_IRQ_OUT            PAL_LINE(GPIOC, 13U)

 #define LINE_OSC32_IN               PAL_LINE(GPIOC, 14U)

 #define LINE_OSC32_OUT              PAL_LINE(GPIOC, 15U)

+

 #define LINE_EXT_RST                PAL_LINE(GPIOD, 0U)

 #define LINE_MEMS_SCK               PAL_LINE(GPIOD, 1U)

 #define LINE_GYRO_INT1              PAL_LINE(GPIOD, 2U)

@@ -268,6 +275,7 @@
 #define LINE_LCD_SEG7               PAL_LINE(GPIOD, 13U)

 #define LINE_LCD_SEG15              PAL_LINE(GPIOD, 14U)

 #define LINE_LCD_SEG8               PAL_LINE(GPIOD, 15U)

+

 #define LINE_XL_CS                  PAL_LINE(GPIOE, 0U)

 #define LINE_XL_INT                 PAL_LINE(GPIOE, 1U)

 #define LINE_SAI1_MCK               PAL_LINE(GPIOE, 2U)

@@ -284,9 +292,28 @@
 #define LINE_QSPI_D1                PAL_LINE(GPIOE, 13U)

 #define LINE_QSPI_D2                PAL_LINE(GPIOE, 14U)

 #define LINE_QSPI_D3                PAL_LINE(GPIOE, 15U)

+

+

+

 #define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)

 #define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)

 

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

 /*

  * I/O ports initial setup, this configuration is established soon after reset

  * in the initialization code.

@@ -1505,6 +1532,9 @@
                                      PIN_LOCKR_DISABLED(GPIOH_PIN14) |      \

                                      PIN_LOCKR_DISABLED(GPIOH_PIN15))

 

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

 

 #if !defined(_FROM_ASM_)

 #ifdef __cplusplus

diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
index a7d91cd29..185f8392c 100644
--- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
+++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
@@ -30,14 +30,6 @@
 /* Driver local definitions.                                                 */

 /*===========================================================================*/

 

-#if defined(STM32L4XX)

-#define AHB2_EN_MASK    STM32_GPIO_EN_MASK

-#define AHB2_LPEN_MASK  0

-

-#else

-#error "missing or unsupported platform for GPIOv3 PAL driver"

-#endif

-

 /* Handling a difference in ST headers.*/

 #if defined(STM32L4XX)

 #define EMR     EMR1

@@ -64,19 +56,6 @@ palevent_t _pal_events[16];
 /* Driver local functions.                                                   */

 /*===========================================================================*/

 

-static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) {

-

-  gpiop->OTYPER  = config->otyper;

-  gpiop->ASCR    = config->ascr;

-  gpiop->OSPEEDR = config->ospeedr;

-  gpiop->PUPDR   = config->pupdr;

-  gpiop->ODR     = config->odr;

-  gpiop->AFRL    = config->afrl;

-  gpiop->AFRH    = config->afrh;

-  gpiop->MODER   = config->moder;

-  gpiop->LOCKR   = config->lockr;

-}

-

 /*===========================================================================*/

 /* Driver interrupt handlers.                                                */

 /*===========================================================================*/

@@ -86,14 +65,11 @@ static void initgpio(stm32_gpio_t *gpiop, const stm32_gpio_setup_t *config) {
 /*===========================================================================*/

 

 /**

- * @brief   STM32 I/O ports configuration.

- * @details Ports A-D(E, F, G, H) clocks enabled.

- *

- * @param[in] config    the STM32 ports configuration

+ * @brief   PAL driver initialization.

  *

  * @notapi

  */

-void _pal_lld_init(const PALConfig *config) {

+void _pal_lld_init(void) {

 

 #if PAL_USE_CALLBACKS || PAL_USE_WAIT || defined(__DOXYGEN__)

   unsigned i;

@@ -102,50 +78,6 @@ void _pal_lld_init(const PALConfig *config) {
     _pal_init_event(i);

   }

 #endif

-

-  /*

-   * Enables the GPIO related clocks.

-   */

-#if defined(STM32L4XX)

-  RCC->AHB2ENR |= AHB2_EN_MASK;

-#endif

-

-  /*

-   * Initial GPIO setup.

-   */

-#if STM32_HAS_GPIOA

-  initgpio(GPIOA, &config->PAData);

-#endif

-#if STM32_HAS_GPIOB

-  initgpio(GPIOB, &config->PBData);

-#endif

-#if STM32_HAS_GPIOC

-  initgpio(GPIOC, &config->PCData);

-#endif

-#if STM32_HAS_GPIOD

-  initgpio(GPIOD, &config->PDData);

-#endif

-#if STM32_HAS_GPIOE

-  initgpio(GPIOE, &config->PEData);

-#endif

-#if STM32_HAS_GPIOF

-  initgpio(GPIOF, &config->PFData);

-#endif

-#if STM32_HAS_GPIOG

-  initgpio(GPIOG, &config->PGData);

-#endif

-#if STM32_HAS_GPIOH

-  initgpio(GPIOH, &config->PHData);

-#endif

-#if STM32_HAS_GPIOI

-  initgpio(GPIOI, &config->PIData);

-#endif

-#if STM32_HAS_GPIOJ

-  initgpio(GPIOJ, &config->PJData);

-#endif

-#if STM32_HAS_GPIOK

-  initgpio(GPIOK, &config->PKData);

-#endif

 }

 

 /**

diff --git a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h
index c76fda1b0..ef1e7ebdd 100644
--- a/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h
+++ b/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.h
@@ -25,12 +25,18 @@
 #ifndef HAL_PAL_LLD_H

 #define HAL_PAL_LLD_H

 

+#include "stm32_gpio.h"

+

 #if HAL_USE_PAL || defined(__DOXYGEN__)

 

 /*===========================================================================*/

 /* Unsupported modes and specific modes                                      */

 /*===========================================================================*/

 

+/* Specifies palInit() without parameter, required until all platforms will

+   be updated to the new style.*/

+#define PAL_NEW_INIT

+

 #undef PAL_MODE_RESET

 #undef PAL_MODE_UNCONNECTED

 #undef PAL_MODE_INPUT

@@ -223,109 +229,6 @@
 /** @} */

 

 /**

- * @brief   STM32 GPIO registers block.

- */

-typedef struct {

-

-  volatile uint32_t     MODER;

-  volatile uint32_t     OTYPER;

-  volatile uint32_t     OSPEEDR;

-  volatile uint32_t     PUPDR;

-  volatile uint32_t     IDR;

-  volatile uint32_t     ODR;

-  volatile union {

-    uint32_t            W;

-    struct {

-      uint16_t          set;

-      uint16_t          clear;

-    } H;

-  } BSRR;

-  volatile uint32_t     LOCKR;

-  volatile uint32_t     AFRL;

-  volatile uint32_t     AFRH;

-  volatile uint32_t     BRR;

-  volatile uint32_t     ASCR;

-} stm32_gpio_t;

-

-/**

- * @brief   GPIO port setup info.

- */

-typedef struct {

-  /** Initial value for MODER register.*/

-  uint32_t              moder;

-  /** Initial value for OTYPER register.*/

-  uint32_t              otyper;

-  /** Initial value for OSPEEDR register.*/

-  uint32_t              ospeedr;

-  /** Initial value for PUPDR register.*/

-  uint32_t              pupdr;

-  /** Initial value for ODR register.*/

-  uint32_t              odr;

-  /** Initial value for AFRL register.*/

-  uint32_t              afrl;

-  /** Initial value for AFRH register.*/

-  uint32_t              afrh;

-  /** Initial value for ASCR register.*/

-  uint32_t              ascr;

-  /** Initial value for LOCKR register.*/

-  uint32_t              lockr;

-} stm32_gpio_setup_t;

-

-/**

- * @brief   STM32 GPIO static initializer.

- * @details An instance of this structure must be passed to @p palInit() at

- *          system startup time in order to initialize the digital I/O

- *          subsystem. This represents only the initial setup, specific pads

- *          or whole ports can be reprogrammed at later time.

- */

-typedef struct {

-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)

-  /** @brief Port A setup data.*/

-  stm32_gpio_setup_t    PAData;

-#endif

-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)

-  /** @brief Port B setup data.*/

-  stm32_gpio_setup_t    PBData;

-#endif

-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)

-  /** @brief Port C setup data.*/

-  stm32_gpio_setup_t    PCData;

-#endif

-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)

-  /** @brief Port D setup data.*/

-  stm32_gpio_setup_t    PDData;

-#endif

-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)

-  /** @brief Port E setup data.*/

-  stm32_gpio_setup_t    PEData;

-#endif

-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)

-  /** @brief Port F setup data.*/

-  stm32_gpio_setup_t    PFData;

-#endif

-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)

-  /** @brief Port G setup data.*/

-  stm32_gpio_setup_t    PGData;

-#endif

-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)

-  /** @brief Port H setup data.*/

-  stm32_gpio_setup_t    PHData;

-#endif

-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)

-  /** @brief Port I setup data.*/

-  stm32_gpio_setup_t    PIData;

-#endif

-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)

-  /** @brief Port I setup data.*/

-  stm32_gpio_setup_t    PJData;

-#endif

-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)

-  /** @brief Port I setup data.*/

-  stm32_gpio_setup_t    PKData;

-#endif

-} PALConfig;

-

-/**

  * @brief   Type of digital I/O port sized unsigned integer.

  */

 typedef uint32_t ioportmask_t;

@@ -451,7 +354,7 @@ typedef uint32_t iopadid_t;
  *

  * @notapi

  */

-#define pal_lld_init(config) _pal_lld_init(config)

+#define pal_lld_init() _pal_lld_init()

 

 /**

  * @brief   Reads an I/O port.

@@ -608,14 +511,13 @@ typedef uint32_t iopadid_t;
   &_pal_events[PAL_PAD(line)]

 

 #if !defined(__DOXYGEN__)

-extern const PALConfig pal_default_config;

 extern palevent_t _pal_events[16];

 #endif

 

 #ifdef __cplusplus

 extern "C" {

 #endif

-  void _pal_lld_init(const PALConfig *config);

+  void _pal_lld_init(void);

   void _pal_lld_setgroupmode(ioportid_t port,

                              ioportmask_t mask,

                              iomode_t mode);

diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.c b/os/hal/ports/STM32/STM32L4xx/hal_lld.c
index 5b6be0999..d4022262b 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.c
@@ -109,9 +109,11 @@ static void hal_lld_backup_domain_init(void) {
  */

 void hal_lld_init(void) {

 

-  /* Reset of all peripherals.*/

+  /* Reset of all peripherals.

+     Note, GPIOs are not reset because initialized before this point in

+     board files.*/

   rccResetAHB1(~0);

-  rccResetAHB2(~0);

+  rccResetAHB2(~STM32_GPIO_EN_MASK);

   rccResetAHB3(~0);

   rccResetAPB1R1(~RCC_APB1RSTR1_PWRRST);

   rccResetAPB1R2(~0);

diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index 81826c5ac..ce60cfda9 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -2125,6 +2125,7 @@
 

 /* Various helpers.*/

 #include "nvic.h"

+#include "stm32_isr.h"

 #include "stm32_dma.h"

 #include "stm32_rcc.h"