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authorGiovanni Di Sirio <gdisirio@gmail.com>2015-08-02 14:52:05 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2015-08-02 14:52:05 +0000
commit814f557d2f39ff5655556d036a36076f36bc121d (patch)
tree38a860ad26445f8db97eefd47c3896670e66bba1 /os/hal/ports
parent4d7be5bf04f6784d92e3f9a9e389cd4dde3e237f (diff)
downloadChibiOS-814f557d2f39ff5655556d036a36076f36bc121d.tar.gz
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Registry updated for STM32F7xx.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8145 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports')
-rw-r--r--os/hal/ports/STM32/STM32F0xx/stm32_registry.h37
-rw-r--r--os/hal/ports/STM32/STM32F1xx/stm32_registry.h35
-rw-r--r--os/hal/ports/STM32/STM32F37x/stm32_registry.h10
-rw-r--r--os/hal/ports/STM32/STM32F3xx/stm32_registry.h30
-rw-r--r--os/hal/ports/STM32/STM32F4xx/stm32_registry.h28
-rw-r--r--os/hal/ports/STM32/STM32F7xx/stm32_registry.h146
-rw-r--r--os/hal/ports/STM32/STM32L0xx/stm32_registry.h9
-rw-r--r--os/hal/ports/STM32/STM32L1xx/stm32_registry.h7
8 files changed, 297 insertions, 5 deletions
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
index 088d56d59..a9a59acbd 100644
--- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h
@@ -101,6 +101,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -121,6 +123,7 @@
#define STM32_I2C2_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -219,6 +222,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -311,6 +316,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -334,6 +341,7 @@
#define STM32_I2C2_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -446,6 +454,8 @@
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#if defined(STM32F072xB) || defined(STM32F078xx)
@@ -532,6 +542,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -546,6 +558,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -638,6 +651,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -720,6 +735,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -734,6 +751,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -816,6 +834,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -896,6 +916,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -910,6 +932,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -997,6 +1020,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1084,6 +1109,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#if defined(STM32F030x8)
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
@@ -1111,6 +1138,7 @@
#define STM32_I2C2_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1207,11 +1235,15 @@
#define STM32_HAS_UART4 TRUE
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 TRUE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
#else
#define STM32_HAS_USART3 FALSE
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
#endif
/* USB attributes.*/
@@ -1292,6 +1324,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -1314,6 +1348,7 @@
#define STM32_I2C2_TX_DMA_CHN 0x00000000
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1426,6 +1461,8 @@
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_registry.h b/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
index 8d04b3492..f694c79c3 100644
--- a/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F1xx/stm32_registry.h
@@ -81,6 +81,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -89,6 +91,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -172,6 +175,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -245,6 +250,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -256,6 +263,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -348,6 +356,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -417,6 +427,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -425,6 +437,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -493,6 +506,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -562,6 +577,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -573,6 +590,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -650,6 +668,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -726,6 +746,8 @@
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -737,6 +759,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -850,6 +873,8 @@
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -926,6 +951,8 @@
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -937,6 +964,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1050,6 +1078,8 @@
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -1126,6 +1156,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -1137,6 +1169,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1230,6 +1263,8 @@
#define STM32_HAS_UART5 TRUE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F37x/stm32_registry.h b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
index 43ffc9d63..be68d5497 100644
--- a/os/hal/ports/STM32/STM32F37x/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F37x/stm32_registry.h
@@ -86,6 +86,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -103,6 +105,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -215,6 +218,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -291,6 +296,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -308,6 +315,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -420,6 +428,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
index 02f095809..26857c93c 100644
--- a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
@@ -93,6 +93,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -109,6 +111,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -290,6 +293,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -303,6 +308,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -464,6 +470,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -483,6 +491,8 @@
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -637,6 +647,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -656,6 +668,8 @@
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -813,6 +827,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -830,6 +846,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1001,6 +1018,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -1019,6 +1038,8 @@
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1177,6 +1198,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -1190,6 +1213,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1350,6 +1374,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -1367,6 +1393,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -1542,6 +1569,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -1555,6 +1584,7 @@
#define STM32_HAS_I2C2 FALSE
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
index 9e34b7ce3..54471483d 100644
--- a/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F4xx/stm32_registry.h
@@ -122,6 +122,8 @@
#define STM32_HAS_GPIOF TRUE
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_GPIOI TRUE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHB1ENR_GPIOAEN | \
RCC_AHB1ENR_GPIOBEN | \
RCC_AHB1ENR_GPIOCEN | \
@@ -154,6 +156,8 @@
#define STM32_I2C3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_I2C3_TX_DMA_CHN 0x00030000
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -321,6 +325,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_USART6_TX_DMA_CHN 0x55000000
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE
@@ -420,6 +427,8 @@
#define STM32_HAS_GPIOF TRUE
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_GPIOI TRUE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHB1ENR_GPIOAEN | \
RCC_AHB1ENR_GPIOBEN | \
RCC_AHB1ENR_GPIOCEN | \
@@ -452,6 +461,8 @@
#define STM32_I2C3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_I2C3_TX_DMA_CHN 0x00030000
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#if !defined(STM32F2XX)
@@ -605,6 +616,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_USART6_TX_DMA_CHN 0x55000000
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE
@@ -693,6 +707,8 @@
#define STM32_HAS_GPIOF FALSE
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHB1ENR_GPIOAEN | \
RCC_AHB1ENR_GPIOBEN | \
RCC_AHB1ENR_GPIOCEN | \
@@ -721,6 +737,8 @@
#define STM32_I2C3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_I2C3_TX_DMA_CHN 0x00030000
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -844,6 +862,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_USART6_TX_DMA_CHN 0x55000000
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE
@@ -914,6 +935,8 @@
#define STM32_HAS_GPIOF FALSE
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHB1ENR_GPIOAEN | \
RCC_AHB1ENR_GPIOBEN | \
RCC_AHB1ENR_GPIOCEN | \
@@ -943,6 +966,8 @@
#define STM32_I2C3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_I2C3_TX_DMA_CHN 0x00030000
+#define STM32_HAS_I2C4 FALSE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -1073,6 +1098,9 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_USART6_TX_DMA_CHN 0x55000000
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
#define STM32_HAS_OTG1 TRUE
diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
index 7025ad7bb..2ed95fc0e 100644
--- a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
@@ -61,13 +61,37 @@
#define STM32_HAS_SDADC3 FALSE
/* CAN attributes.*/
+#define STM32_CAN_MAX_FILTERS 28
+
#define STM32_HAS_CAN1 TRUE
+#define STM32_CAN1_TX_HANDLER Vector8C
+#define STM32_CAN1_RX0_HANDLER Vector90
+#define STM32_CAN1_RX1_HANDLER Vector94
+#define STM32_CAN1_SCE_HANDLER Vector98
+#define STM32_CAN1_TX_NUMBER 19
+#define STM32_CAN1_RX0_NUMBER 20
+#define STM32_CAN1_RX1_NUMBER 21
+#define STM32_CAN1_SCE_NUMBER 22
+
#define STM32_HAS_CAN2 TRUE
-#define STM32_CAN_MAX_FILTERS 28
+#define STM32_CAN2_TX_HANDLER Vector13C
+#define STM32_CAN2_RX0_HANDLER Vector140
+#define STM32_CAN2_RX1_HANDLER Vector144
+#define STM32_CAN2_SCE_HANDLER Vector148
+#define STM32_CAN2_TX_NUMBER 63
+#define STM32_CAN2_RX0_NUMBER 64
+#define STM32_CAN2_RX1_NUMBER 65
+#define STM32_CAN2_SCE_NUMBER 66
/* DAC attributes.*/
-#define STM32_HAS_DAC1_CH1 FALSE
-#define STM32_HAS_DAC1_CH2 FALSE
+#define STM32_HAS_DAC1_CH1 TRUE
+#define STM32_DAC1_CH1_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
+#define STM32_DAC1_CH1_DMA_CHN 0x00070000
+
+#define STM32_HAS_DAC1_CH2 TRUE
+#define STM32_DAC1_CH2_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 6)
+#define STM32_DAC1_CH2_DMA_CHN 0x00700000
+
#define STM32_HAS_DAC2_CH1 FALSE
#define STM32_HAS_DAC2_CH2 FALSE
@@ -78,6 +102,8 @@
/* ETH attributes.*/
#define STM32_HAS_ETH TRUE
+#define STM32_ETH_HANDLER Vector134
+#define STM32_ETH_NUMBER 61
/* EXTI attributes.*/
#define STM32_EXTI_NUM_CHANNELS 23
@@ -92,6 +118,8 @@
#define STM32_HAS_GPIOF TRUE
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_GPIOI TRUE
+#define STM32_HAS_GPIOJ TRUE
+#define STM32_HAS_GPIOK TRUE
#define STM32_GPIO_EN_MASK (RCC_AHB1ENR_GPIOAEN | \
RCC_AHB1ENR_GPIOBEN | \
RCC_AHB1ENR_GPIOCEN | \
@@ -100,10 +128,16 @@
RCC_AHB1ENR_GPIOFEN | \
RCC_AHB1ENR_GPIOGEN | \
RCC_AHB1ENR_GPIOHEN | \
- RCC_AHB1ENR_GPIOIEN)
+ RCC_AHB1ENR_GPIOIEN | \
+ RCC_AHB1ENR_GPIOJEN | \
+ RCC_AHB1ENR_GPIOKEN)
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
+#define STM32_I2C1_EVENT_HANDLER VectorBC
+#define STM32_I2C1_ERROR_HANDLER VectorC0
+#define STM32_I2C1_EVENT_NUMBER 31
+#define STM32_I2C1_ERROR_NUMBER 32
#define STM32_I2C1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 0) |\
STM32_DMA_STREAM_ID_MSK(1, 5))
#define STM32_I2C1_RX_DMA_CHN 0x00100001
@@ -112,6 +146,10 @@
#define STM32_I2C1_TX_DMA_CHN 0x11000000
#define STM32_HAS_I2C2 TRUE
+#define STM32_I2C2_EVENT_HANDLER VectorC4
+#define STM32_I2C2_ERROR_HANDLER VectorC8
+#define STM32_I2C2_EVENT_NUMBER 33
+#define STM32_I2C2_ERROR_NUMBER 34
#define STM32_I2C2_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 3))
#define STM32_I2C2_RX_DMA_CHN 0x00007700
@@ -119,11 +157,25 @@
#define STM32_I2C2_TX_DMA_CHN 0x70000000
#define STM32_HAS_I2C3 TRUE
+#define STM32_I2C3_EVENT_HANDLER Vector160
+#define STM32_I2C3_ERROR_HANDLER Vector164
+#define STM32_I2C3_EVENT_NUMBER 72
+#define STM32_I2C3_ERROR_NUMBER 73
#define STM32_I2C3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
#define STM32_I2C3_RX_DMA_CHN 0x00000300
#define STM32_I2C3_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_I2C3_TX_DMA_CHN 0x00030000
+#define STM32_HAS_I2C4 TRUE
+#define STM32_I2C4_EVENT_HANDLER Vector1BC
+#define STM32_I2C4_ERROR_HANDLER Vector1C0
+#define STM32_I2C4_EVENT_NUMBER 95
+#define STM32_I2C4_ERROR_NUMBER 96
+#define STM32_I2C4_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
+#define STM32_I2C4_RX_DMA_CHN 0x00000200
+#define STM32_I2C4_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
+#define STM32_I2C4_TX_DMA_CHN 0x00200000
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
@@ -133,6 +185,8 @@
/* SDIO attributes.*/
#define STM32_HAS_SDIO TRUE
+#define STM32_SDIO_HANDLER Vector104
+#define STM32_SDIO_NUMBER 49
#define STM32_SDC_SDIO_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 3) |\
STM32_DMA_STREAM_ID_MSK(2, 6))
#define STM32_SDC_SDIO_DMA_CHN 0x04004000
@@ -188,58 +242,90 @@
#define STM32_HAS_TIM1 TRUE
#define STM32_TIM1_IS_32BITS FALSE
#define STM32_TIM1_CHANNELS 4
+#define STM32_TIM1_UP_HANDLER VectorA4
+#define STM32_TIM1_CC_HANDLER VectorAC
+#define STM32_TIM1_UP_NUMBER 25
+#define STM32_TIM1_CC_NUMBER 27
#define STM32_HAS_TIM2 TRUE
#define STM32_TIM2_IS_32BITS TRUE
#define STM32_TIM2_CHANNELS 4
+#define STM32_TIM2_HANDLER VectorB0
+#define STM32_TIM2_NUMBER 28
#define STM32_HAS_TIM3 TRUE
#define STM32_TIM3_IS_32BITS FALSE
#define STM32_TIM3_CHANNELS 4
+#define STM32_TIM3_HANDLER VectorB4
+#define STM32_TIM3_NUMBER 29
#define STM32_HAS_TIM4 TRUE
#define STM32_TIM4_IS_32BITS FALSE
#define STM32_TIM4_CHANNELS 4
+#define STM32_TIM4_HANDLER VectorB8
+#define STM32_TIM4_NUMBER 30
#define STM32_HAS_TIM5 TRUE
#define STM32_TIM5_IS_32BITS TRUE
#define STM32_TIM5_CHANNELS 4
+#define STM32_TIM5_HANDLER Vector108
+#define STM32_TIM5_NUMBER 50
#define STM32_HAS_TIM6 TRUE
#define STM32_TIM6_IS_32BITS FALSE
#define STM32_TIM6_CHANNELS 0
+#define STM32_TIM6_HANDLER Vector118
+#define STM32_TIM6_NUMBER 54
#define STM32_HAS_TIM7 TRUE
#define STM32_TIM7_IS_32BITS FALSE
#define STM32_TIM7_CHANNELS 0
+#define STM32_TIM7_HANDLER Vector11C
+#define STM32_TIM7_NUMBER 55
#define STM32_HAS_TIM8 TRUE
#define STM32_TIM8_IS_32BITS FALSE
#define STM32_TIM8_CHANNELS 6
+#define STM32_TIM8_UP_HANDLER VectorF0
+#define STM32_TIM8_CC_HANDLER VectorF8
+#define STM32_TIM8_UP_NUMBER 44
+#define STM32_TIM8_CC_NUMBER 46
#define STM32_HAS_TIM9 TRUE
#define STM32_TIM9_IS_32BITS FALSE
#define STM32_TIM9_CHANNELS 2
+#define STM32_TIM9_HANDLER VectorA0
+#define STM32_TIM9_NUMBER 24
#define STM32_HAS_TIM10 TRUE
#define STM32_TIM10_IS_32BITS FALSE
#define STM32_TIM10_CHANNELS 2
+#define STM32_TIM10_HANDLER VectorA4 /* Note: same as STM32_TIM1_UP */
+#define STM32_TIM10_NUMBER 25 /* Note: same as STM32_TIM1_UP */
#define STM32_HAS_TIM11 TRUE
#define STM32_TIM11_IS_32BITS FALSE
#define STM32_TIM11_CHANNELS 2
+#define STM32_TIM11_HANDLER VectorA8
+#define STM32_TIM11_NUMBER 26
#define STM32_HAS_TIM12 TRUE
#define STM32_TIM12_IS_32BITS FALSE
#define STM32_TIM12_CHANNELS 2
+#define STM32_TIM12_HANDLER VectorEC
+#define STM32_TIM12_NUMBER 43
#define STM32_HAS_TIM13 TRUE
#define STM32_TIM13_IS_32BITS FALSE
#define STM32_TIM13_CHANNELS 2
+#define STM32_TIM13_HANDLER VectorF0 /* Note: same as STM32_TIM8_UP */
+#define STM32_TIM13_NUMBER 44 /* Note: same as STM32_TIM8_UP */
#define STM32_HAS_TIM14 TRUE
#define STM32_TIM14_IS_32BITS FALSE
#define STM32_TIM14_CHANNELS 2
+#define STM32_TIM14_HANDLER VectorF4
+#define STM32_TIM14_NUMBER 45
#define STM32_HAS_TIM15 FALSE
#define STM32_HAS_TIM16 FALSE
@@ -252,6 +338,8 @@
/* USART attributes.*/
#define STM32_HAS_USART1 TRUE
+#define STM32_USART1_HANDLER VectorD4
+#define STM32_USART1_NUMBER 37
#define STM32_USART1_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 5))
#define STM32_USART1_RX_DMA_CHN 0x00400400
@@ -259,12 +347,16 @@
#define STM32_USART1_TX_DMA_CHN 0x40000000
#define STM32_HAS_USART2 TRUE
+#define STM32_USART2_HANDLER VectorD8
+#define STM32_USART2_NUMBER 38
#define STM32_USART2_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 5)
#define STM32_USART2_RX_DMA_CHN 0x00400000
#define STM32_USART2_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 6)
#define STM32_USART2_TX_DMA_CHN 0x04000000
#define STM32_HAS_USART3 TRUE
+#define STM32_USART3_HANDLER VectorDC
+#define STM32_USART3_NUMBER 39
#define STM32_USART3_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 1)
#define STM32_USART3_RX_DMA_CHN 0x00000040
#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 3) |\
@@ -272,18 +364,24 @@
#define STM32_USART3_TX_DMA_CHN 0x00074000
#define STM32_HAS_UART4 TRUE
+#define STM32_UART4_HANDLER Vector110
+#define STM32_UART4_NUMBER 52
#define STM32_UART4_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 2)
#define STM32_UART4_RX_DMA_CHN 0x00000400
#define STM32_UART4_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 4)
#define STM32_UART4_TX_DMA_CHN 0x00040000
#define STM32_HAS_UART5 TRUE
+#define STM32_UART5_HANDLER Vector114
+#define STM32_UART5_NUMBER 53
#define STM32_UART5_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 0)
#define STM32_UART5_RX_DMA_CHN 0x00000004
#define STM32_UART5_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 7)
#define STM32_UART5_TX_DMA_CHN 0x40000000
#define STM32_HAS_USART6 TRUE
+#define STM32_USART6_HANDLER Vector15C
+#define STM32_USART6_NUMBER 71
#define STM32_USART6_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 1) |\
STM32_DMA_STREAM_ID_MSK(2, 2))
#define STM32_USART6_RX_DMA_CHN 0x00000550
@@ -291,10 +389,36 @@
STM32_DMA_STREAM_ID_MSK(2, 7))
#define STM32_USART6_TX_DMA_CHN 0x55000000
+#define STM32_HAS_UART7 TRUE
+#define STM32_UART7_HANDLER Vector188
+#define STM32_UART7_NUMBER 83
+#define STM32_UART7_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 3)
+#define STM32_UART7_RX_DMA_CHN 0x00005000
+#define STM32_UART7_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 1)
+#define STM32_UART7_TX_DMA_CHN 0x00000050
+
+#define STM32_HAS_UART8 TRUE
+#define STM32_UART8_HANDLER Vector18C
+#define STM32_UART8_NUMBER 83
+#define STM32_UART8_RX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 6)
+#define STM32_UART8_RX_DMA_CHN 0x05000000
+#define STM32_UART8_TX_DMA_MSK STM32_DMA_STREAM_ID_MSK(1, 0)
+#define STM32_UART8_TX_DMA_CHN 0x00000005
+
/* USB attributes.*/
#define STM32_HAS_USB FALSE
+
#define STM32_HAS_OTG1 TRUE
+#define STM32_OTG1_HANDLER Vector14C
+#define STM32_OTG1_NUMBER 67
+
#define STM32_HAS_OTG2 TRUE
+#define STM32_OTG2_HANDLER Vector174
+#define STM32_OTG2_EP1OUT_HANDLER Vector168
+#define STM32_OTG2_EP1IN_HANDLER Vector16C
+#define STM32_OTG2_NUMBER 77
+#define STM32_OTG2_EP1OUT_NUMBER 74
+#define STM32_OTG2_EP1IN_NUMBER 75
/* LTDC attributes.*/
#define STM32_HAS_LTDC TRUE
@@ -305,6 +429,8 @@
/* FSMC attributes.*/
#define STM32_HAS_FSMC TRUE
#define STM32_FSMC_IS_FMC TRUE
+#define STM32_FSMC_HANDLER Vector100
+#define STM32_FSMC_NUMBER 48
#define STM32_FSMC_DMA_MSK (STM32_DMA_STREAM_ID_MSK(2, 0) |\
STM32_DMA_STREAM_ID_MSK(2, 1) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\
@@ -313,7 +439,17 @@
STM32_DMA_STREAM_ID_MSK(2, 5) |\
STM32_DMA_STREAM_ID_MSK(2, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 7))
-#define STM32_FSMC_DMA_CHN 0x03010201
+#define STM32_FSMC_DMA_CHN 0x00000000
+
+/* LTDC attributes.*/
+#define STM32_LTDC_EV_HANDLER Vector1A0
+#define STM32_LTDC_ER_HANDLER Vector1A4
+#define STM32_LTDC_EV_NUMBER 88
+#define STM32_LTDC_ER_NUMBER 89
+
+/* DMA2D attributes.*/
+#define STM32_DMA2D_HANDLER Vector1A8
+#define STM32_DMA2D_NUMBER 90
/* CRC attributes.*/
#define STM32_HAS_CRC TRUE
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
index a4bb997ac..27ee03883 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
@@ -108,6 +108,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH TRUE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_IOPENR_GPIOAEN | \
RCC_IOPENR_GPIOBEN | \
RCC_IOPENR_GPIOCEN | \
@@ -134,6 +136,7 @@
#define STM32_I2C2_TX_DMA_CHN 0x00007000
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -234,6 +237,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB FALSE
@@ -331,6 +336,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH TRUE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_IOPENR_GPIOAEN | \
RCC_IOPENR_GPIOBEN | \
RCC_IOPENR_GPIOCEN | \
@@ -564,6 +571,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH TRUE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_IOPENR_GPIOAEN | \
RCC_IOPENR_GPIOBEN | \
RCC_IOPENR_GPIOCEN | \
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
index 5dc7d21c7..f04dff789 100644
--- a/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L1xx/stm32_registry.h
@@ -78,6 +78,8 @@
#define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH TRUE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \
@@ -95,6 +97,7 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_HAS_I2C3 FALSE
+#define STM32_HAS_I2C4 FALSE
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
@@ -191,6 +194,8 @@
#define STM32_HAS_UART4 FALSE
#define STM32_HAS_UART5 FALSE
#define STM32_HAS_USART6 FALSE
+#define STM32_HAS_UART7 FALSE
+#define STM32_HAS_UART8 FALSE
/* USB attributes.*/
#define STM32_HAS_USB TRUE
@@ -259,6 +264,8 @@
#define STM32_HAS_GPIOG TRUE
#define STM32_HAS_GPIOH TRUE
#define STM32_HAS_GPIOI FALSE
+#define STM32_HAS_GPIOJ FALSE
+#define STM32_HAS_GPIOK FALSE
#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
RCC_AHBENR_GPIOBEN | \
RCC_AHBENR_GPIOCEN | \