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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-12-09 11:29:20 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-12-09 11:29:20 +0000
commita4aff3dd04faf5857819f496753255f888655ec9 (patch)
tree5107750ffc0cac1b0781a2286962d3f098fd3938 /os/hal/ports/STM32F37x
parent6c57849d532dc63ade01d96c1a1a32ce53d7be18 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6563 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32F37x')
-rw-r--r--os/hal/ports/STM32F37x/adc_lld.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/os/hal/ports/STM32F37x/adc_lld.c b/os/hal/ports/STM32F37x/adc_lld.c
index 2317aef25..54679b62f 100644
--- a/os/hal/ports/STM32F37x/adc_lld.c
+++ b/os/hal/ports/STM32F37x/adc_lld.c
@@ -156,14 +156,14 @@ static void adc_lld_serve_dma_interrupt(ADCDriver *adcp, uint32_t flags) {
/* It is possible that the conversion group has already be reset by the
ADC error handler, in this case this interrupt is spurious.*/
if (adcp->grpp != NULL) {
- if ((flags & STM32_DMA_ISR_HTIF) != 0) {
- /* Half transfer processing.*/
- _adc_isr_half_code(adcp);
- }
if ((flags & STM32_DMA_ISR_TCIF) != 0) {
/* Transfer complete processing.*/
_adc_isr_full_code(adcp);
}
+ else if ((flags & STM32_DMA_ISR_HTIF) != 0) {
+ /* Half transfer processing.*/
+ _adc_isr_half_code(adcp);
+ }
}
}
}
@@ -522,16 +522,16 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
mode = adcp->dmamode;
if (grpp->circular) {
mode |= STM32_DMA_CR_CIRC;
- }
- if (adcp->depth > 1) {
- /* If the buffer depth is greater than one then the half transfer interrupt
- interrupt is enabled in order to allows streaming processing.*/
- mode |= STM32_DMA_CR_HTIE;
+ if (adcp->depth > 1) {
+ /* If circular buffer depth > 1, then the half transfer interrupt
+ is enabled in order to allow streaming processing.*/
+ mode |= STM32_DMA_CR_HTIE;
+ }
}
dmaStreamSetMemory0(adcp->dmastp, adcp->samples);
dmaStreamSetTransactionSize(adcp->dmastp,
- (uint32_t)grpp->num_channels *
- (uint32_t)adcp->depth);
+ (uint32_t)grpp->num_channels *
+ (uint32_t)adcp->depth);
dmaStreamSetMode(adcp->dmastp, mode);
dmaStreamEnable(adcp->dmastp);