git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6563 35acf78f-673a-0410-8e92-d51de3d6d3f4

7 files changed, 63 insertions, 72 deletions

diff --git a/os/hal/include/adc.h b/os/hal/include/adc.h
index 23d767732..626840c5e 100644
--- a/os/hal/include/adc.h
+++ b/os/hal/include/adc.h
@@ -197,16 +197,8 @@ typedef enum {
     adc_lld_stop_conversion(adcp);                                          \

     if ((adcp)->grpp->end_cb != NULL) {                                     \

       (adcp)->state = ADC_COMPLETE;                                         \

-      if ((adcp)->depth > 1) {                                              \

-        /* Invokes the callback passing the 2nd half of the buffer.*/       \

-        size_t half = (adcp)->depth / 2;                                    \

-        size_t half_index = half * (adcp)->grpp->num_channels;              \

-        (adcp)->grpp->end_cb(adcp, (adcp)->samples + half_index, half);     \

-      }                                                                     \

-      else {                                                                \

-        /* Invokes the callback passing the whole buffer.*/                 \

-        (adcp)->grpp->end_cb(adcp, (adcp)->samples, (adcp)->depth);         \

-      }                                                                     \

+      /* Invoke the callback passing the whole buffer.*/                    \

+      (adcp)->grpp->end_cb(adcp, (adcp)->samples, (adcp)->depth);           \

       if ((adcp)->state == ADC_COMPLETE) {                                  \

         (adcp)->state = ADC_READY;                                          \

         (adcp)->grpp = NULL;                                                \

diff --git a/os/hal/ports/STM32F0xx/adc_lld.c b/os/hal/ports/STM32F0xx/adc_lld.c
index b2aae96f1..8bca93f05 100644
--- a/os/hal/ports/STM32F0xx/adc_lld.c
+++ b/os/hal/ports/STM32F0xx/adc_lld.c
@@ -79,14 +79,14 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
     /* It is possible that the conversion group has already be reset by the

        ADC error handler, in this case this interrupt is spurious.*/

     if (adcp->grpp != NULL) {

-      if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-        /* Half transfer processing.*/

-        _adc_isr_half_code(adcp);

-      }

       if ((flags & STM32_DMA_ISR_TCIF) != 0) {

         /* Transfer complete processing.*/

         _adc_isr_full_code(adcp);

       }

+      else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+        /* Half transfer processing.*/

+        _adc_isr_half_code(adcp);

+      }

     }

   }

 }

@@ -252,11 +252,11 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   mode = adcp->dmamode;

   if (grpp->circular) {

     mode |= STM32_DMA_CR_CIRC;

-  }

-  if (adcp->depth > 1) {

-    /* If the buffer depth is greater than one then the half transfer interrupt

-       interrupt is enabled in order to allows streaming processing.*/

-    mode |= STM32_DMA_CR_HTIE;

+    if (adcp->depth > 1) {

+      /* If circular buffer depth > 1, then the half transfer interrupt

+         is enabled in order to allow streaming processing.*/

+      mode |= STM32_DMA_CR_HTIE;

+    }

   }

   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);

   dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *

diff --git a/os/hal/ports/STM32F1xx/adc_lld.c b/os/hal/ports/STM32F1xx/adc_lld.c
index f51ce13f8..956cdf2de 100644
--- a/os/hal/ports/STM32F1xx/adc_lld.c
+++ b/os/hal/ports/STM32F1xx/adc_lld.c
@@ -62,14 +62,14 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
     _adc_isr_error_code(adcp, ADC_ERR_DMAFAILURE);

   }

   else {

-    if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-      /* Half transfer processing.*/

-      _adc_isr_half_code(adcp);

-    }

     if ((flags & STM32_DMA_ISR_TCIF) != 0) {

       /* Transfer complete processing.*/

       _adc_isr_full_code(adcp);

     }

+    else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+      /* Half transfer processing.*/

+      _adc_isr_half_code(adcp);

+    }

   }

 }

 

@@ -180,23 +180,22 @@ void adc_lld_stop(ADCDriver *adcp) {
  * @notapi

  */

 void adc_lld_start_conversion(ADCDriver *adcp) {

-  uint32_t mode, n, cr2;

+  uint32_t mode, cr2;

   const ADCConversionGroup *grpp = adcp->grpp;

 

   /* DMA setup.*/

   mode = adcp->dmamode;

-  if (grpp->circular)

+  if (grpp->circular) {

     mode |= STM32_DMA_CR_CIRC;

-  if (adcp->depth > 1) {

-    /* If the buffer depth is greater than one then the half transfer interrupt

-       interrupt is enabled in order to allows streaming processing.*/

-    mode |= STM32_DMA_CR_HTIE;

-    n = (uint32_t)grpp->num_channels * (uint32_t)adcp->depth;

+    if (adcp->depth > 1) {

+      /* If circular buffer depth > 1, then the half transfer interrupt

+         is enabled in order to allow streaming processing.*/

+      mode |= STM32_DMA_CR_HTIE;

+    }

   }

-  else

-    n = (uint32_t)grpp->num_channels;

   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);

-  dmaStreamSetTransactionSize(adcp->dmastp, n);

+  dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *

+                                            (uint32_t)adcp->depth);

   dmaStreamSetMode(adcp->dmastp, mode);

   dmaStreamEnable(adcp->dmastp);

 

diff --git a/os/hal/ports/STM32F30x/adc_lld.c b/os/hal/ports/STM32F30x/adc_lld.c
index ff8eb0fec..26fdcebf1 100644
--- a/os/hal/ports/STM32F30x/adc_lld.c
+++ b/os/hal/ports/STM32F30x/adc_lld.c
@@ -191,14 +191,14 @@ static void adc_lld_serve_dma_interrupt(ADCDriver *adcp, uint32_t flags) {
     /* It is possible that the conversion group has already be reset by the

        ADC error handler, in this case this interrupt is spurious.*/

     if (adcp->grpp != NULL) {

-      if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-        /* Half transfer processing.*/

-        _adc_isr_half_code(adcp);

-      }

       if ((flags & STM32_DMA_ISR_TCIF) != 0) {

         /* Transfer complete processing.*/

         _adc_isr_full_code(adcp);

       }

+      else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+        /* Half transfer processing.*/

+        _adc_isr_half_code(adcp);

+      }

     }

   }

 }

@@ -471,14 +471,14 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
 #else

     cfgr |= ADC_CFGR_DMACFG_CIRCULAR;

 #endif

+    if (adcp->depth > 1) {

+      /* If circular buffer depth > 1, then the half transfer interrupt

+         is enabled in order to allow streaming processing.*/

+      dmamode |= STM32_DMA_CR_HTIE;

+    }

   }

 

   /* DMA setup.*/

-  if (adcp->depth > 1) {

-    /* If the buffer depth is greater than one then the half transfer interrupt

-       interrupt is enabled in order to allows streaming processing.*/

-    dmamode |= STM32_DMA_CR_HTIE;

-  }

   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);

 #if STM32_ADC_DUAL_MODE

   dmaStreamSetTransactionSize(adcp->dmastp, ((uint32_t)grpp->num_channels/2) *

diff --git a/os/hal/ports/STM32F37x/adc_lld.c b/os/hal/ports/STM32F37x/adc_lld.c
index 2317aef25..54679b62f 100644
--- a/os/hal/ports/STM32F37x/adc_lld.c
+++ b/os/hal/ports/STM32F37x/adc_lld.c
@@ -156,14 +156,14 @@ static void adc_lld_serve_dma_interrupt(ADCDriver *adcp, uint32_t flags) {
     /* It is possible that the conversion group has already be reset by the

        ADC error handler, in this case this interrupt is spurious.*/

     if (adcp->grpp != NULL) {

-      if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-        /* Half transfer processing.*/

-        _adc_isr_half_code(adcp);

-      }

       if ((flags & STM32_DMA_ISR_TCIF) != 0) {

         /* Transfer complete processing.*/

         _adc_isr_full_code(adcp);

       }

+      else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+        /* Half transfer processing.*/

+        _adc_isr_half_code(adcp);

+      }

     }

   }

 }

@@ -522,16 +522,16 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   mode = adcp->dmamode;

   if (grpp->circular) {

     mode |= STM32_DMA_CR_CIRC;

-  }

-  if (adcp->depth > 1) {

-    /* If the buffer depth is greater than one then the half transfer interrupt

-       interrupt is enabled in order to allows streaming processing.*/

-    mode |= STM32_DMA_CR_HTIE;

+    if (adcp->depth > 1) {

+      /* If circular buffer depth > 1, then the half transfer interrupt

+         is enabled in order to allow streaming processing.*/

+      mode |= STM32_DMA_CR_HTIE;

+    }

   }

   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);

   dmaStreamSetTransactionSize(adcp->dmastp,

-			      (uint32_t)grpp->num_channels * 

-			      (uint32_t)adcp->depth);

+                              (uint32_t)grpp->num_channels * 

+                              (uint32_t)adcp->depth);

   dmaStreamSetMode(adcp->dmastp, mode);

   dmaStreamEnable(adcp->dmastp);

 

diff --git a/os/hal/ports/STM32F4xx/adc_lld.c b/os/hal/ports/STM32F4xx/adc_lld.c
index 724dc2938..85cb485bc 100644
--- a/os/hal/ports/STM32F4xx/adc_lld.c
+++ b/os/hal/ports/STM32F4xx/adc_lld.c
@@ -84,14 +84,14 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
     /* It is possible that the conversion group has already be reset by the

        ADC error handler, in this case this interrupt is spurious.*/

     if (adcp->grpp != NULL) {

-      if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-        /* Half transfer processing.*/

-        _adc_isr_half_code(adcp);

-      }

       if ((flags & STM32_DMA_ISR_TCIF) != 0) {

         /* Transfer complete processing.*/

         _adc_isr_full_code(adcp);

       }

+      else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+        /* Half transfer processing.*/

+        _adc_isr_half_code(adcp);

+      }

     }

   }

 }

@@ -154,7 +154,7 @@ OSAL_IRQ_HANDLER(ADC1_2_3_IRQHandler) {
   /* TODO: Add here analog watchdog handling.*/

 #endif /* STM32_ADC_USE_ADC3 */

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -323,11 +323,11 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   mode = adcp->dmamode;

   if (grpp->circular) {

     mode |= STM32_DMA_CR_CIRC;

-  }

-  if (adcp->depth > 1) {

-    /* If the buffer depth is greater than one then the half transfer interrupt

-       interrupt is enabled in order to allows streaming processing.*/

-    mode |= STM32_DMA_CR_HTIE;

+    if (adcp->depth > 1) {

+      /* If circular buffer depth > 1, then the half transfer interrupt

+         is enabled in order to allow streaming processing.*/

+      mode |= STM32_DMA_CR_HTIE;

+    }

   }

   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);

   dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *

diff --git a/os/hal/ports/STM32L1xx/adc_lld.c b/os/hal/ports/STM32L1xx/adc_lld.c
index bce7e3725..1f4649c9c 100644
--- a/os/hal/ports/STM32L1xx/adc_lld.c
+++ b/os/hal/ports/STM32L1xx/adc_lld.c
@@ -65,14 +65,14 @@ static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {
     /* It is possible that the conversion group has already be reset by the

        ADC error handler, in this case this interrupt is spurious.*/

     if (adcp->grpp != NULL) {

-      if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-        /* Half transfer processing.*/

-        _adc_isr_half_code(adcp);

-      }

       if ((flags & STM32_DMA_ISR_TCIF) != 0) {

         /* Transfer complete processing.*/

         _adc_isr_full_code(adcp);

       }

+      else if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+        /* Half transfer processing.*/

+        _adc_isr_half_code(adcp);

+      }

     }

   }

 }

@@ -204,11 +204,11 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
   mode = adcp->dmamode;

   if (grpp->circular) {

     mode |= STM32_DMA_CR_CIRC;

-  }

-  if (adcp->depth > 1) {

-    /* If the buffer depth is greater than one then the half transfer interrupt

-       interrupt is enabled in order to allows streaming processing.*/

-    mode |= STM32_DMA_CR_HTIE;

+    if (adcp->depth > 1) {

+      /* If circular buffer depth > 1, then the half transfer interrupt

+         is enabled in order to allow streaming processing.*/

+      mode |= STM32_DMA_CR_HTIE;

+    }

   }

   dmaStreamSetMemory0(adcp->dmastp, adcp->samples);

   dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *