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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2019-06-30 07:16:02 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2019-06-30 07:16:02 +0000 |
| commit | a9b5eab94a4e3b2e2bb9215111954e2845500d7a (patch) | |
| tree | 5062e78305bc54ab4b98ab12f08d2bebd5040703 /os/hal/ports/STM32/STM32L1xx/hal_lld.c | |
| parent | e8fb1f777f38f1dc5368c03ff2990bd3404cfc18 (diff) | |
| download | ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.tar.gz ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.tar.bz2 ChibiOS-a9b5eab94a4e3b2e2bb9215111954e2845500d7a.zip | |
Fixed bug #1035.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12854 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
Diffstat (limited to 'os/hal/ports/STM32/STM32L1xx/hal_lld.c')
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/hal_lld.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32L1xx/hal_lld.c b/os/hal/ports/STM32/STM32L1xx/hal_lld.c index 4ca3335de..cef14c816 100644 --- a/os/hal/ports/STM32/STM32L1xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L1xx/hal_lld.c @@ -57,7 +57,7 @@ static void hal_lld_backup_domain_init(void) { PWR->CR |= PWR_CR_DBP;
/* Reset BKP domain if different clock source selected.*/
- if ((RCC->CSR & STM32_RTCSEL_MASK) != STM32_RTCSEL){
+ if ((RCC->CSR & STM32_RTCSEL_MASK) != STM32_RTCSEL) {
/* Backup domain reset.*/
RCC->CSR |= RCC_CSR_RTCRST;
RCC->CSR &= ~RCC_CSR_RTCRST;
@@ -210,9 +210,15 @@ void stm32_clock_init(void) { /* Flash setup and final clock selection.*/
#if defined(STM32_FLASHBITS1)
FLASH->ACR = STM32_FLASHBITS1;
+ while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+ (STM32_FLASHBITS1 & FLASH_ACR_LATENCY_Msk)) {
+ }
#endif
#if defined(STM32_FLASHBITS2)
FLASH->ACR = STM32_FLASHBITS2;
+ while ((FLASH->ACR & FLASH_ACR_LATENCY_Msk) !=
+ (STM32_FLASHBITS2 & FLASH_ACR_LATENCY_Msk)) {
+ }
#endif
/* Switching to the configured clock source if it is different from MSI.*/
|